mainmenu "Linux/SuperH Kernel Configuration"
config SUPERH
- bool
- default y
+ def_bool y
select EMBEDDED
+ select HAVE_CLK
+ select HAVE_IDE
+ select HAVE_OPROFILE
+ select HAVE_GENERIC_DMA_COHERENT
+ select HAVE_IOREMAP_PROT if MMU
+ select HAVE_ARCH_TRACEHOOK
+ select HAVE_DMA_API_DEBUG
+ select HAVE_PERF_COUNTERS
+ select RTC_LIB
+ select GENERIC_ATOMIC64
help
The SuperH is a RISC processor targeted for use in embedded systems
and consumer electronics; it was also used in the Sega Dreamcast
gaming console. The SuperH port has a home page at
<http://www.linux-sh.org/>.
+config SUPERH32
+ def_bool ARCH = "sh"
+ select HAVE_KPROBES
+ select HAVE_KRETPROBES
+ select HAVE_FUNCTION_TRACER
+ select HAVE_FTRACE_MCOUNT_RECORD
+ select HAVE_DYNAMIC_FTRACE
+ select HAVE_FUNCTION_TRACE_MCOUNT_TEST
+ select HAVE_ARCH_KGDB
+ select ARCH_HIBERNATION_POSSIBLE if MMU
+
+config SUPERH64
+ def_bool ARCH = "sh64"
+
+config ARCH_DEFCONFIG
+ string
+ default "arch/sh/configs/shx3_defconfig" if SUPERH32
+ default "arch/sh/configs/cayman_defconfig" if SUPERH64
+
config RWSEM_GENERIC_SPINLOCK
- bool
- default y
+ def_bool y
config RWSEM_XCHGADD_ALGORITHM
bool
+config GENERIC_BUG
+ def_bool y
+ depends on BUG && SUPERH32
+
+config GENERIC_CSUM
+ def_bool y
+ depends on SUPERH64
+
config GENERIC_FIND_NEXT_BIT
- bool
- default y
+ def_bool y
config GENERIC_HWEIGHT
- bool
- default y
+ def_bool y
config GENERIC_HARDIRQS
- bool
- default y
+ def_bool y
+
+config GENERIC_HARDIRQS_NO__DO_IRQ
+ def_bool y
config GENERIC_IRQ_PROBE
- bool
- default y
+ def_bool y
+
+config IRQ_PER_CPU
+ def_bool y
+
+config GENERIC_GPIO
+ def_bool n
config GENERIC_CALIBRATE_DELAY
bool
- default y
config GENERIC_IOMAP
bool
config GENERIC_TIME
- def_bool n
+ def_bool y
-config ARCH_MAY_HAVE_PC_FDC
- bool
+config GENERIC_CLOCKEVENTS
+ def_bool y
-config STACKTRACE_SUPPORT
+config GENERIC_CLOCKEVENTS_BROADCAST
bool
- default y
-config LOCKDEP_SUPPORT
- bool
- default y
+config GENERIC_CMOS_UPDATE
+ def_bool y
+ depends on SH_SH03 || SH_DREAMCAST
-source "init/Kconfig"
+config GENERIC_LOCKBREAK
+ def_bool y
+ depends on SMP && PREEMPT
-menu "System type"
-
-config SOLUTION_ENGINE
+config SYS_SUPPORTS_PM
bool
+ depends on !SMP
-choice
- prompt "SuperH system type"
- default SH_UNKNOWN
-
-config SH_SOLUTION_ENGINE
- bool "SolutionEngine"
- select SOLUTION_ENGINE
- help
- Select SolutionEngine if configuring for a Hitachi SH7709
- or SH7750 evaluation board.
+config ARCH_SUSPEND_POSSIBLE
+ def_bool n
-config SH_7751_SOLUTION_ENGINE
- bool "SolutionEngine7751"
- select SOLUTION_ENGINE
- select CPU_SUBTYPE_SH7751
- help
- Select 7751 SolutionEngine if configuring for a Hitachi SH7751
- evaluation board.
+config ARCH_HIBERNATION_POSSIBLE
+ def_bool n
-config SH_7300_SOLUTION_ENGINE
- bool "SolutionEngine7300"
- select SOLUTION_ENGINE
- select CPU_SUBTYPE_SH7300
- help
- Select 7300 SolutionEngine if configuring for a Hitachi
- SH7300(SH-Mobile V) evaluation board.
+config SYS_SUPPORTS_APM_EMULATION
+ bool
+ select ARCH_SUSPEND_POSSIBLE
-config SH_7343_SOLUTION_ENGINE
- bool "SolutionEngine7343"
- select SOLUTION_ENGINE
- select CPU_SUBTYPE_SH7343
- help
- Select 7343 SolutionEngine if configuring for a Hitachi
- SH7343 (SH-Mobile 3AS) evaluation board.
+config SYS_SUPPORTS_SMP
+ bool
-config SH_73180_SOLUTION_ENGINE
- bool "SolutionEngine73180"
- select SOLUTION_ENGINE
- select CPU_SUBTYPE_SH73180
- help
- Select 73180 SolutionEngine if configuring for a Hitachi
- SH73180(SH-Mobile 3) evaluation board.
+config SYS_SUPPORTS_NUMA
+ bool
-config SH_7751_SYSTEMH
- bool "SystemH7751R"
- select CPU_SUBTYPE_SH7751R
- help
- Select SystemH if you are configuring for a Renesas SystemH
- 7751R evaluation board.
+config SYS_SUPPORTS_PCI
+ bool
-config SH_HP6XX
- bool "HP6XX"
- help
- Select HP6XX if configuring for a HP jornada HP6xx.
- More information (hardware only) at
- <http://www.hp.com/jornada/>.
+config SYS_SUPPORTS_CMT
+ bool
-config SH_EC3104
- bool "EC3104"
- help
- Select EC3104 if configuring for a system with an Eclipse
- International EC3104 chip, e.g. the Harris AD2000.
+config SYS_SUPPORTS_MTU2
+ bool
-config SH_SATURN
- bool "Saturn"
- select CPU_SUBTYPE_SH7604
- help
- Select Saturn if configuring for a SEGA Saturn.
+config SYS_SUPPORTS_TMU
+ bool
-config SH_DREAMCAST
- bool "Dreamcast"
- select CPU_SUBTYPE_SH7091
- help
- Select Dreamcast if configuring for a SEGA Dreamcast.
- More information at
- <http://www.m17n.org/linux-sh/dreamcast/>. There is a
- Dreamcast project is at <http://linuxdc.sourceforge.net/>.
+config STACKTRACE_SUPPORT
+ def_bool y
-config SH_BIGSUR
- bool "BigSur"
+config LOCKDEP_SUPPORT
+ def_bool y
-config SH_MPC1211
- bool "Interface MPC1211"
- help
- CTP/PCI-SH02 is a CPU module computer that is produced
- by Interface Corporation.
- More information at <http://www.interface.co.jp>
+config HAVE_LATENCYTOP_SUPPORT
+ def_bool y
+ depends on !SMP
-config SH_SH03
- bool "Interface CTP/PCI-SH03"
- help
- CTP/PCI-SH03 is a CPU module computer that is produced
- by Interface Corporation.
- More information at <http://www.interface.co.jp>
+config ARCH_HAS_ILOG2_U32
+ def_bool n
-config SH_SECUREEDGE5410
- bool "SecureEdge5410"
- select CPU_SUBTYPE_SH7751R
- help
- Select SecureEdge5410 if configuring for a SnapGear SH board.
- This includes both the OEM SecureEdge products as well as the
- SME product line.
+config ARCH_HAS_ILOG2_U64
+ def_bool n
-config SH_HS7751RVOIP
- bool "HS7751RVOIP"
- select CPU_SUBTYPE_SH7751R
- help
- Select HS7751RVOIP if configuring for a Renesas Technology
- Sales VoIP board.
+config ARCH_NO_VIRT_TO_BUS
+ def_bool y
-config SH_7710VOIPGW
- bool "SH7710-VOIP-GW"
- select CPU_SUBTYPE_SH7710
- help
- Select this option to build a kernel for the SH7710 based
- VOIP GW.
+config ARCH_HAS_DEFAULT_IDLE
+ def_bool y
-config SH_RTS7751R2D
- bool "RTS7751R2D"
- select CPU_SUBTYPE_SH7751R
- help
- Select RTS7751R2D if configuring for a Renesas Technology
- Sales SH-Graphics board.
+config ARCH_HAS_CPU_IDLE_WAIT
+ def_bool y
-config SH_R7780RP
- bool "R7780RP-1"
- select CPU_SUBTYPE_SH7780
- help
- Select R7780RP-1 if configuring for a Renesas Solutions
- HIGHLANDER board.
+config IO_TRAPPED
+ bool
-config SH_EDOSK7705
- bool "EDOSK7705"
- select CPU_SUBTYPE_SH7705
+source "init/Kconfig"
-config SH_SH4202_MICRODEV
- bool "SH4-202 MicroDev"
- select CPU_SUBTYPE_SH4_202
- help
- Select SH4-202 MicroDev if configuring for a SuperH MicroDev board
- with an SH4-202 CPU.
+source "kernel/Kconfig.freezer"
-config SH_LANDISK
- bool "LANDISK"
- select CPU_SUBTYPE_SH7751R
- help
- I-O DATA DEVICE, INC. "LANDISK Series" support.
+menu "System type"
-config SH_TITAN
- bool "TITAN"
- select CPU_SUBTYPE_SH7751R
- help
- Select Titan if you are configuring for a Nimble Microsystems
- NetEngine NP51R.
+#
+# Processor families
+#
+config CPU_SH2
+ bool
-config SH_SHMIN
- bool "SHMIN"
- select CPU_SUBTYPE_SH7706
- help
- Select SHMIN if configuring for the SHMIN board.
+config CPU_SH2A
+ bool
+ select CPU_SH2
-config SH_7206_SOLUTION_ENGINE
- bool "SolutionEngine7206"
- select CPU_SUBTYPE_SH7206
- help
- Select 7206 SolutionEngine if configuring for a Hitachi SH7206
- evaluation board.
+config CPU_SH3
+ bool
+ select CPU_HAS_INTEVT
+ select CPU_HAS_SR_RB
+ select SYS_SUPPORTS_TMU
-config SH_7619_SOLUTION_ENGINE
- bool "SolutionEngine7619"
- select CPU_SUBTYPE_SH7619
- help
- Select 7619 SolutionEngine if configuring for a Hitachi SH7619
- evaluation board.
+config CPU_SH4
+ bool
+ select CPU_HAS_INTEVT
+ select CPU_HAS_SR_RB
+ select CPU_HAS_FPU if !CPU_SH4AL_DSP
+ select SYS_SUPPORTS_TMU
-config SH_UNKNOWN
- bool "BareCPU"
- help
- "Bare CPU" aka "unknown" means an SH-based system which is not one
- of the specific ones mentioned above, which means you need to enter
- all sorts of stuff like CONFIG_MEMORY_START because the config
- system doesn't already know what it is. You get a machine vector
- without any platform-specific code in it, so things like the RTC may
- not work.
+config CPU_SH4A
+ bool
+ select CPU_SH4
- This option is for the early stages of porting to a new machine.
+config CPU_SH4AL_DSP
+ bool
+ select CPU_SH4A
+ select CPU_HAS_DSP
-endchoice
+config CPU_SH5
+ bool
+ select CPU_HAS_FPU
+ select SYS_SUPPORTS_TMU
-source "arch/sh/mm/Kconfig"
+config CPU_SHX2
+ bool
-config CF_ENABLER
- bool "Compact Flash Enabler support"
- depends on SH_SOLUTION_ENGINE || SH_UNKNOWN || SH_SH03
- ---help---
- Compact Flash is a small, removable mass storage device introduced
- in 1994 originally as a PCMCIA device. If you say `Y' here, you
- compile in support for Compact Flash devices directly connected to
- a SuperH processor. A Compact Flash FAQ is available at
- <http://www.compactflash.org/faqs/faq.htm>.
+config CPU_SHX3
+ bool
- If your board has "Directly Connected" CompactFlash at area 5 or 6,
- you may want to enable this option. Then, you can use CF as
- primary IDE drive (only tested for SanDisk).
+config ARCH_SHMOBILE
+ bool
+ select ARCH_SUSPEND_POSSIBLE
- If in doubt, select 'N'.
+if SUPERH32
choice
- prompt "Compact Flash Connection Area"
- depends on CF_ENABLER
- default CF_AREA6
+ prompt "Processor sub-type selection"
-config CF_AREA5
- bool "Area5"
- help
- If your board has "Directly Connected" CompactFlash, You should
- select the area where your CF is connected to.
+#
+# Processor subtypes
+#
- - "Area5" if CompactFlash is connected to Area 5 (0x14000000)
- - "Area6" if it is connected to Area 6 (0x18000000)
+# SH-2 Processor Support
- "Area6" will work for most boards.
+config CPU_SUBTYPE_SH7619
+ bool "Support SH7619 processor"
+ select CPU_SH2
+ select SYS_SUPPORTS_CMT
-config CF_AREA6
- bool "Area6"
+# SH-2A Processor Support
-endchoice
+config CPU_SUBTYPE_SH7201
+ bool "Support SH7201 processor"
+ select CPU_SH2A
+ select CPU_HAS_FPU
+ select SYS_SUPPORTS_MTU2
+
+config CPU_SUBTYPE_SH7203
+ bool "Support SH7203 processor"
+ select CPU_SH2A
+ select CPU_HAS_FPU
+ select SYS_SUPPORTS_CMT
+ select SYS_SUPPORTS_MTU2
-config CF_BASE_ADDR
- hex
- depends on CF_ENABLER
- default "0xb8000000" if CF_AREA6
- default "0xb4000000" if CF_AREA5
+config CPU_SUBTYPE_SH7206
+ bool "Support SH7206 processor"
+ select CPU_SH2A
+ select SYS_SUPPORTS_CMT
+ select SYS_SUPPORTS_MTU2
-menu "Processor features"
+config CPU_SUBTYPE_SH7263
+ bool "Support SH7263 processor"
+ select CPU_SH2A
+ select CPU_HAS_FPU
+ select SYS_SUPPORTS_CMT
+ select SYS_SUPPORTS_MTU2
-choice
- prompt "Endianess selection"
- default CPU_LITTLE_ENDIAN
+config CPU_SUBTYPE_MXG
+ bool "Support MX-G processor"
+ select CPU_SH2A
+ select SYS_SUPPORTS_MTU2
help
- Some SuperH machines can be configured for either little or big
- endian byte order. These modes require different kernels.
+ Select MX-G if running on an R8A03022BG part.
-config CPU_LITTLE_ENDIAN
- bool "Little Endian"
+# SH-3 Processor Support
-config CPU_BIG_ENDIAN
- bool "Big Endian"
+config CPU_SUBTYPE_SH7705
+ bool "Support SH7705 processor"
+ select CPU_SH3
-endchoice
+config CPU_SUBTYPE_SH7706
+ bool "Support SH7706 processor"
+ select CPU_SH3
+ help
+ Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU.
-config SH_FPU
- bool "FPU support"
- depends on !CPU_SH3
- default y
+config CPU_SUBTYPE_SH7707
+ bool "Support SH7707 processor"
+ select CPU_SH3
help
- Selecting this option will enable support for SH processors that
- have FPU units (ie, SH77xx).
+ Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU.
- This option must be set in order to enable the FPU.
+config CPU_SUBTYPE_SH7708
+ bool "Support SH7708 processor"
+ select CPU_SH3
+ help
+ Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or
+ if you have a 100 Mhz SH-3 HD6417708R CPU.
-config SH_FPU_EMU
- bool "FPU emulation support"
- depends on !SH_FPU && EXPERIMENTAL
- default n
+config CPU_SUBTYPE_SH7709
+ bool "Support SH7709 processor"
+ select CPU_SH3
help
- Selecting this option will enable support for software FPU emulation.
- Most SH-3 users will want to say Y here, whereas most SH-4 users will
- want to say N.
+ Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU.
-config SH_DSP
- bool "DSP support"
- default y if SH4AL_DSP || !CPU_SH4
- default n
+config CPU_SUBTYPE_SH7710
+ bool "Support SH7710 processor"
+ select CPU_SH3
+ select CPU_HAS_DSP
help
- Selecting this option will enable support for SH processors that
- have DSP units (ie, SH2-DSP, SH3-DSP, and SH4AL-DSP).
+ Select SH7710 if you have a SH3-DSP SH7710 CPU.
- This option must be set in order to enable the DSP.
+config CPU_SUBTYPE_SH7712
+ bool "Support SH7712 processor"
+ select CPU_SH3
+ select CPU_HAS_DSP
+ help
+ Select SH7712 if you have a SH3-DSP SH7712 CPU.
-config SH_ADC
- bool "ADC support"
- depends on CPU_SH3
- default y
+config CPU_SUBTYPE_SH7720
+ bool "Support SH7720 processor"
+ select CPU_SH3
+ select CPU_HAS_DSP
+ select SYS_SUPPORTS_CMT
help
- Selecting this option will allow the Linux kernel to use SH3 on-chip
- ADC module.
+ Select SH7720 if you have a SH3-DSP SH7720 CPU.
- If unsure, say N.
+config CPU_SUBTYPE_SH7721
+ bool "Support SH7721 processor"
+ select CPU_SH3
+ select CPU_HAS_DSP
+ select SYS_SUPPORTS_CMT
+ help
+ Select SH7721 if you have a SH3-DSP SH7721 CPU.
+
+# SH-4 Processor Support
+
+config CPU_SUBTYPE_SH7750
+ bool "Support SH7750 processor"
+ select CPU_SH4
+ help
+ Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU.
+
+config CPU_SUBTYPE_SH7091
+ bool "Support SH7091 processor"
+ select CPU_SH4
+ help
+ Select SH7091 if you have an SH-4 based Sega device (such as
+ the Dreamcast, Naomi, and Naomi 2).
+
+config CPU_SUBTYPE_SH7750R
+ bool "Support SH7750R processor"
+ select CPU_SH4
+
+config CPU_SUBTYPE_SH7750S
+ bool "Support SH7750S processor"
+ select CPU_SH4
+
+config CPU_SUBTYPE_SH7751
+ bool "Support SH7751 processor"
+ select CPU_SH4
+ help
+ Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU,
+ or if you have a HD6417751R CPU.
+
+config CPU_SUBTYPE_SH7751R
+ bool "Support SH7751R processor"
+ select CPU_SH4
+
+config CPU_SUBTYPE_SH7760
+ bool "Support SH7760 processor"
+ select CPU_SH4
+
+config CPU_SUBTYPE_SH4_202
+ bool "Support SH4-202 processor"
+ select CPU_SH4
+
+# SH-4A Processor Support
+
+config CPU_SUBTYPE_SH7723
+ bool "Support SH7723 processor"
+ select CPU_SH4A
+ select CPU_SHX2
+ select ARCH_SHMOBILE
+ select ARCH_SPARSEMEM_ENABLE
+ select SYS_SUPPORTS_CMT
+ help
+ Select SH7723 if you have an SH-MobileR2 CPU.
+
+config CPU_SUBTYPE_SH7724
+ bool "Support SH7724 processor"
+ select CPU_SH4A
+ select CPU_SHX2
+ select ARCH_SHMOBILE
+ select ARCH_SPARSEMEM_ENABLE
+ select SYS_SUPPORTS_CMT
+ help
+ Select SH7724 if you have an SH-MobileR2R CPU.
+
+config CPU_SUBTYPE_SH7763
+ bool "Support SH7763 processor"
+ select CPU_SH4A
+ help
+ Select SH7763 if you have a SH4A SH7763(R5S77631) CPU.
+
+config CPU_SUBTYPE_SH7770
+ bool "Support SH7770 processor"
+ select CPU_SH4A
+
+config CPU_SUBTYPE_SH7780
+ bool "Support SH7780 processor"
+ select CPU_SH4A
+
+config CPU_SUBTYPE_SH7785
+ bool "Support SH7785 processor"
+ select CPU_SH4A
+ select CPU_SHX2
+ select ARCH_SPARSEMEM_ENABLE
+ select SYS_SUPPORTS_NUMA
+
+config CPU_SUBTYPE_SH7786
+ bool "Support SH7786 processor"
+ select CPU_SH4A
+ select CPU_SHX3
+ select CPU_HAS_PTEAEX
+ select ARCH_SPARSEMEM_ENABLE
+ select SYS_SUPPORTS_NUMA
+ select SYS_SUPPORTS_SMP
+ select GENERIC_CLOCKEVENTS_BROADCAST if SMP
+
+config CPU_SUBTYPE_SHX3
+ bool "Support SH-X3 processor"
+ select CPU_SH4A
+ select CPU_SHX3
+ select ARCH_SPARSEMEM_ENABLE
+ select SYS_SUPPORTS_NUMA
+ select SYS_SUPPORTS_SMP
+ select GENERIC_CLOCKEVENTS_BROADCAST if SMP
+
+# SH4AL-DSP Processor Support
+
+config CPU_SUBTYPE_SH7343
+ bool "Support SH7343 processor"
+ select CPU_SH4AL_DSP
+ select ARCH_SHMOBILE
+ select SYS_SUPPORTS_CMT
+
+config CPU_SUBTYPE_SH7722
+ bool "Support SH7722 processor"
+ select CPU_SH4AL_DSP
+ select CPU_SHX2
+ select ARCH_SHMOBILE
+ select ARCH_SPARSEMEM_ENABLE
+ select SYS_SUPPORTS_NUMA
+ select SYS_SUPPORTS_CMT
+
+config CPU_SUBTYPE_SH7366
+ bool "Support SH7366 processor"
+ select CPU_SH4AL_DSP
+ select CPU_SHX2
+ select ARCH_SHMOBILE
+ select ARCH_SPARSEMEM_ENABLE
+ select SYS_SUPPORTS_NUMA
+ select SYS_SUPPORTS_CMT
-config SH_STORE_QUEUES
- bool "Support for Store Queues"
- depends on CPU_SH4
- help
- Selecting this option will enable an in-kernel API for manipulating
- the store queues integrated in the SH-4 processors.
+endchoice
-config CPU_HAS_INTEVT
- bool
+endif
-config CPU_HAS_PINT_IRQ
- bool
+if SUPERH64
-config CPU_HAS_MASKREG_IRQ
- bool
+choice
+ prompt "Processor sub-type selection"
-config CPU_HAS_INTC2_IRQ
- bool
+# SH-5 Processor Support
-config CPU_HAS_SR_RB
- bool "CPU has SR.RB"
- depends on CPU_SH3 || CPU_SH4
- default y
- help
- This will enable the use of SR.RB register bank usage. Processors
- that are lacking this bit must have another method in place for
- accomplishing what is taken care of by the banked registers.
+config CPU_SUBTYPE_SH5_101
+ bool "Support SH5-101 processor"
+ select CPU_SH5
- See <file:Documentation/sh/register-banks.txt> for further
- information on SR.RB and register banking in the kernel in general.
+config CPU_SUBTYPE_SH5_103
+ bool "Support SH5-103 processor"
+ select CPU_SH5
-config CPU_HAS_PTEA
- bool
+endchoice
-endmenu
+endif
-menu "Timer support"
-depends on !GENERIC_TIME
+source "arch/sh/mm/Kconfig"
+
+source "arch/sh/Kconfig.cpu"
-config SH_TMU
- bool "TMU timer support"
- depends on CPU_SH3 || CPU_SH4
- default y
- help
- This enables the use of the TMU as the system timer.
+source "arch/sh/boards/Kconfig"
-config SH_CMT
- bool "CMT timer support"
- depends on CPU_SH2
+menu "Timer and clock configuration"
+
+config SH_TIMER_TMU
+ bool "TMU timer driver"
+ depends on SYS_SUPPORTS_TMU
default y
help
- This enables the use of the CMT as the system timer.
+ This enables the build of the TMU timer driver.
-config SH_MTU2
- bool "MTU2 timer support"
- depends on CPU_SH2A
- default n
+config SH_TIMER_CMT
+ bool "CMT timer driver"
+ depends on SYS_SUPPORTS_CMT
+ default y
help
- This enables the use of the MTU2 as the system timer.
-
-endmenu
-
-source "arch/sh/boards/renesas/hs7751rvoip/Kconfig"
-
-source "arch/sh/boards/renesas/rts7751r2d/Kconfig"
-
-source "arch/sh/boards/renesas/r7780rp/Kconfig"
+ This enables build of the CMT timer driver.
-config SH_TIMER_IRQ
- int
- default "28" if CPU_SUBTYPE_SH7780
- default "86" if CPU_SUBTYPE_SH7619
- default "140" if CPU_SUBTYPE_SH7206
- default "16"
-
-config NO_IDLE_HZ
- bool "Dynamic tick timer"
+config SH_TIMER_MTU2
+ bool "MTU2 timer driver"
+ depends on SYS_SUPPORTS_MTU2
+ default y
help
- Select this option if you want to disable continuous timer ticks
- and have them programmed to occur as required. This option saves
- power as the system can remain in idle state for longer.
-
- By default dynamic tick is disabled during the boot, and can be
- manually enabled with:
-
- echo 1 > /sys/devices/system/timer/timer0/dyn_tick
-
- Alternatively, if you want dynamic tick automatically enabled
- during boot, pass "dyntick=enable" via the kernel command string.
-
- Please note that dynamic tick may affect the accuracy of
- timekeeping on some platforms depending on the implementation.
+ This enables build of the MTU2 timer driver.
config SH_PCLK_FREQ
int "Peripheral clock frequency (in Hz)"
- default "27000000" if CPU_SUBTYPE_SH73180 || CPU_SUBTYPE_SH7343
+ default "27000000" if CPU_SUBTYPE_SH7343
default "31250000" if CPU_SUBTYPE_SH7619
- default "33333333" if CPU_SUBTYPE_SH7300 || CPU_SUBTYPE_SH7770 || \
+ default "32000000" if CPU_SUBTYPE_SH7722
+ default "33333333" if CPU_SUBTYPE_SH7770 || CPU_SUBTYPE_SH7723 || \
CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7705 || \
- CPU_SUBTYPE_SH7206
- default "50000000" if CPU_SUBTYPE_SH7750 || CPU_SUBTYPE_SH7780
- default "60000000" if CPU_SUBTYPE_SH7751
+ CPU_SUBTYPE_SH7203 || CPU_SUBTYPE_SH7206 || \
+ CPU_SUBTYPE_SH7263 || CPU_SUBTYPE_MXG || \
+ CPU_SUBTYPE_SH7786 || CPU_SUBTYPE_SH7724
+ default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R
default "66000000" if CPU_SUBTYPE_SH4_202
+ default "50000000"
help
This option is used to specify the peripheral clock frequency.
This is necessary for determining the reference clock value on
platforms lacking an RTC.
+config SH_CLK_CPG
+ def_bool y
+
+config SH_CLK_CPG_LEGACY
+ depends on SH_CLK_CPG
+ def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE
+
config SH_CLK_MD
int "CPU Mode Pin Setting"
- depends on CPU_SUBTYPE_SH7619 || CPU_SUBTYPE_SH7206
+ depends on CPU_SH2
+ default 6 if CPU_SUBTYPE_SH7206
+ default 5 if CPU_SUBTYPE_SH7619
+ default 0
help
- MD2 - MD0 Setting.
+ MD2 - MD0 pin setting.
+
+source "kernel/time/Kconfig"
+
+endmenu
menu "CPU Frequency scaling"
depends on CPU_FREQ
select CPU_FREQ_TABLE
help
- This adds the cpufreq driver for SuperH. At present, only
- the SH-4 is supported.
+ This adds the cpufreq driver for SuperH. Any CPU that supports
+ clock rate rounding through the clock framework can use this
+ driver. While it will make the kernel slightly larger, this is
+ harmless for CPUs that don't support rate rounding. The driver
+ will also generate a notice in the boot log before disabling
+ itself if the CPU in question is not capable of rate rounding.
For details, take a look at <file:Documentation/cpu-freq>.
endmenu
-source "arch/sh/drivers/dma/Kconfig"
-
-source "arch/sh/cchips/Kconfig"
-
-config HEARTBEAT
- bool "Heartbeat LED"
- depends on SH_MPC1211 || SH_SH03 || \
- SH_BIGSUR || SOLUTION_ENGINE || \
- SH_RTS7751R2D || SH_SH4202_MICRODEV || SH_LANDISK
- help
- Use the power-on LED on your machine as a load meter. The exact
- behavior is platform-dependent, but normally the flash frequency is
- a hyperbolic function of the 5-minute load average.
-
source "arch/sh/drivers/Kconfig"
endmenu
-config ISA_DMA_API
- bool
- depends on SH_MPC1211
- default y
-
menu "Kernel features"
source kernel/Kconfig.hz
config KEXEC
bool "kexec system call (EXPERIMENTAL)"
- depends on EXPERIMENTAL
+ depends on SUPERH32 && EXPERIMENTAL && MMU
help
kexec is a system call that implements the ability to shutdown your
current kernel, and to start another kernel. It is like a reboot
support. As of this writing the exact hardware interface is
strongly in flux, so no good recommendation can be made.
+config CRASH_DUMP
+ bool "kernel crash dumps (EXPERIMENTAL)"
+ depends on SUPERH32 && EXPERIMENTAL
+ help
+ Generate crash dump after being started by kexec.
+ This should be normally only set in special crash dump kernels
+ which are loaded in the main kernel with kexec-tools into
+ a specially reserved region and then later executed after
+ a crash by kdump/kexec. The crash dump kernel must be compiled
+ to a memory address not used by the main kernel using
+ MEMORY_START.
+
+ For more details see Documentation/kdump/kdump.txt
+
+config KEXEC_JUMP
+ bool "kexec jump (EXPERIMENTAL)"
+ depends on SUPERH32 && KEXEC && HIBERNATION && EXPERIMENTAL
+ help
+ Jump between original kernel and kexeced kernel and invoke
+ code via KEXEC
+
+config SECCOMP
+ bool "Enable seccomp to safely compute untrusted bytecode"
+ depends on PROC_FS
+ help
+ This kernel feature is useful for number crunching applications
+ that may need to compute untrusted bytecode during their
+ execution. By using pipes or other transports made available to
+ the process as file descriptors supporting the read/write
+ syscalls, it's possible to isolate those applications in
+ their own address space using seccomp. Once seccomp is
+ enabled via prctl, it cannot be disabled and the task is only
+ allowed to execute a few safe syscalls defined by each seccomp
+ mode.
+
+ If unsure, say N.
+
config SMP
bool "Symmetric multi-processing support"
+ depends on SYS_SUPPORTS_SMP
+ select USE_GENERIC_SMP_HELPERS
---help---
This enables support for systems with more than one CPU. If you have
a system with only one CPU, like most personal computers, say N. If
People using multiprocessor machines who say Y here should also say
Y to "Enhanced Real Time Clock Support", below.
- See also the <file:Documentation/smp.txt>,
- <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available
- at <http://www.tldp.org/docs.html#howto>.
+ See also <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO
+ available at <http://www.tldp.org/docs.html#howto>.
If you don't know what to do here, say N.
int "Maximum number of CPUs (2-32)"
range 2 32
depends on SMP
+ default "4" if CPU_SUBTYPE_SHX3
default "2"
help
This allows you to specify the maximum number of CPUs which this
source "kernel/Kconfig.preempt"
-config CPU_HAS_SR_RB
- bool "CPU has SR.RB"
- depends on CPU_SH3 || CPU_SH4
- default y
+config GUSA
+ def_bool y
+ depends on !SMP && SUPERH32
help
- This will enable the use of SR.RB register bank usage. Processors
- that are lacking this bit must have another method in place for
- accomplishing what is taken care of by the banked registers.
+ This enables support for gUSA (general UserSpace Atomicity).
+ This is the default implementation for both UP and non-ll/sc
+ CPUs, and is used by the libc, amongst others.
+
+ For additional information, design information can be found
+ in <http://lc.linux.or.jp/lc2002/papers/niibe0919p.pdf>.
- See <file:Documentation/sh/register-banks.txt> for further
- information on SR.RB and register banking in the kernel in general.
+ This should only be disabled for special cases where alternate
+ atomicity implementations exist.
-config NODES_SHIFT
- int
- default "1"
- depends on NEED_MULTIPLE_NODES
+config GUSA_RB
+ bool "Implement atomic operations by roll-back (gRB) (EXPERIMENTAL)"
+ depends on GUSA && CPU_SH3 || (CPU_SH4 && !CPU_SH4A)
+ help
+ Enabling this option will allow the kernel to implement some
+ atomic operations using a software implementation of load-locked/
+ store-conditional (LLSC). On machines which do not have hardware
+ LLSC, this should be more efficient than the other alternative of
+ disabling interrupts around the atomic sequence.
+
+config SPARSE_IRQ
+ bool "Support sparse irq numbering"
+ depends on EXPERIMENTAL
+ help
+ This enables support for sparse irqs. This is useful in general
+ as most CPUs have a fairly sparse array of IRQ vectors, which
+ the irq_desc then maps directly on to. Systems with a high
+ number of off-chip IRQs will want to treat this as
+ experimental until they have been independently verified.
+
+ If you don't know what to do here, say N.
endmenu
menu "Boot options"
config ZERO_PAGE_OFFSET
- hex "Zero page offset"
- default "0x00004000" if SH_MPC1211 || SH_SH03
+ hex
+ default "0x00010000" if PAGE_SIZE_64KB || SH_RTS7751R2D || \
+ SH_7751_SOLUTION_ENGINE
+ default "0x00004000" if PAGE_SIZE_16KB || SH_SH03
+ default "0x00002000" if PAGE_SIZE_8KB
default "0x00001000"
help
This sets the default offset of zero page.
config BOOT_LINK_OFFSET
- hex "Link address offset for booting"
+ hex
+ default "0x00210000" if SH_SHMIN
+ default "0x00400000" if SH_CAYMAN
+ default "0x00810000" if SH_7780_SOLUTION_ENGINE
+ default "0x009e0000" if SH_TITAN
+ default "0x01800000" if SH_SDK7780
+ default "0x02000000" if SH_EDOSK7760
default "0x00800000"
help
This option allows you to set the link address offset of the zImage.
This can be useful if you are on a board which has a small amount of
memory.
+config ENTRY_OFFSET
+ hex
+ default "0x00001000" if PAGE_SIZE_4KB
+ default "0x00002000" if PAGE_SIZE_8KB
+ default "0x00004000" if PAGE_SIZE_16KB
+ default "0x00010000" if PAGE_SIZE_64KB
+ default "0x00000000"
+
config UBC_WAKEUP
bool "Wakeup UBC on startup"
+ depends on CPU_SH4 && !CPU_SH4A
help
Selecting this option will wakeup the User Break Controller (UBC) on
startup. Although the UBC is left in an awake state when the processor
menu "Bus options"
-# Even on SuperH devices which don't have an ISA bus,
-# this variable helps the PCMCIA modules handle
-# IRQ requesting properly -- Greg Banks.
-#
-# Though we're generally not interested in it when
-# we're not using PCMCIA, so we make it dependent on
-# PCMCIA outright. -- PFM.
-config ISA
- bool
- default y if PCMCIA
- help
- Find out whether you have ISA slots on your motherboard. ISA is the
- name of a bus system, i.e. the way the CPU talks to the other stuff
- inside your box. Other bus systems are PCI, EISA, MicroChannel
- (MCA) or VESA. ISA is an older system, now being displaced by PCI;
- newer boards don't support it. If you have ISA, say Y, otherwise N.
-
-config EISA
- bool
- ---help---
- The Extended Industry Standard Architecture (EISA) bus was
- developed as an open alternative to the IBM MicroChannel bus.
-
- The EISA bus provided some of the features of the IBM MicroChannel
- bus while maintaining backward compatibility with cards made for
- the older ISA bus. The EISA bus saw limited use between 1988 and
- 1995 when it was made obsolete by the PCI bus.
-
- Say Y here if you are building a kernel for an EISA-based machine.
-
- Otherwise, say N.
-
-config MCA
- bool
- help
- MicroChannel Architecture is found in some IBM PS/2 machines and
- laptops. It is a bus system similar to PCI or ISA. See
- <file:Documentation/mca.txt> (and especially the web page given
- there) before attempting to build an MCA bus kernel.
-
-config SBUS
- bool
-
config SUPERHYWAY
tristate "SuperHyway Bus support"
depends on CPU_SUBTYPE_SH4_202
+config MAPLE
+ bool "Maple Bus support"
+ depends on SH_DREAMCAST
+ help
+ The Maple Bus is SEGA's serial communication bus for peripherals
+ on the Dreamcast. Without this bus support you won't be able to
+ get your Dreamcast keyboard etc to work, so most users
+ probably want to say 'Y' here, unless you are only using the
+ Dreamcast with a serial line terminal or a remote network
+ connection.
+
source "arch/sh/drivers/pci/Kconfig"
+source "drivers/pci/pcie/Kconfig"
+
source "drivers/pci/Kconfig"
source "drivers/pcmcia/Kconfig"
menu "Power management options (EXPERIMENTAL)"
depends on EXPERIMENTAL
-source kernel/power/Kconfig
+source "kernel/power/Kconfig"
+
+source "drivers/cpuidle/Kconfig"
-config APM
- bool "Advanced Power Management Emulation"
- depends on PM
endmenu
source "net/Kconfig"
source "fs/Kconfig"
-source "arch/sh/oprofile/Kconfig"
-
source "arch/sh/Kconfig.debug"
source "security/Kconfig"