SH: convert migor to soc-camera as platform-device

[safe/jmp/linux-2.6] / arch / sh / Kconfig

diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index c815975..586cd04 100644 (file)
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -174,7 +174,6 @@ config CPU_SH4
        bool
        select CPU_HAS_INTEVT
        select CPU_HAS_SR_RB
-       select CPU_HAS_PTEA if !CPU_SH4A || CPU_SHX2
        select CPU_HAS_FPU if !CPU_SH4AL_DSP
        select SYS_SUPPORTS_TMU
 
@@ -503,8 +502,7 @@ config SH_PCLK_FREQ
                              CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7705 || \
                              CPU_SUBTYPE_SH7203 || CPU_SUBTYPE_SH7206 || \
                              CPU_SUBTYPE_SH7263 || CPU_SUBTYPE_MXG    || \
-                             CPU_SUBTYPE_SH7786
-       default "41666666" if CPU_SUBTYPE_SH7724
+                             CPU_SUBTYPE_SH7786 || CPU_SUBTYPE_SH7724
        default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R
        default "66000000" if CPU_SUBTYPE_SH4_202
        default "50000000"
@@ -518,7 +516,7 @@ config SH_CLK_CPG
 
 config SH_CLK_CPG_LEGACY
        depends on SH_CLK_CPG
-       def_bool y if !CPU_SUBTYPE_SH7785
+       def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE
 
 config SH_CLK_MD
        int "CPU Mode Pin Setting"
@@ -680,6 +678,18 @@ config GUSA_RB
          LLSC, this should be more efficient than the other alternative of
          disabling interrupts around the atomic sequence.
 
+config SPARSE_IRQ
+       bool "Support sparse irq numbering"
+       depends on EXPERIMENTAL
+       help
+         This enables support for sparse irqs. This is useful in general
+         as most CPUs have a fairly sparse array of IRQ vectors, which
+         the irq_desc then maps directly on to. Systems with a high
+         number of off-chip IRQs will want to treat this as
+         experimental until they have been independently verified.
+
+         If you don't know what to do here, say N.
+
 endmenu
 
 menu "Boot options"