mainmenu "Linux/SuperH Kernel Configuration"
config SUPERH
- bool
- default y
+ def_bool y
select EMBEDDED
+ select HAVE_CLK
+ select HAVE_IDE
+ select HAVE_OPROFILE
+ select HAVE_GENERIC_DMA_COHERENT
help
The SuperH is a RISC processor targeted for use in embedded systems
and consumer electronics; it was also used in the Sega Dreamcast
gaming console. The SuperH port has a home page at
<http://www.linux-sh.org/>.
+config SUPERH32
+ def_bool !SUPERH64
+
+config SUPERH64
+ def_bool y if CPU_SH5
+
+config ARCH_DEFCONFIG
+ string
+ default "arch/sh/configs/shx3_defconfig" if SUPERH32
+ default "arch/sh/configs/cayman_defconfig" if SUPERH64
+
config RWSEM_GENERIC_SPINLOCK
- bool
- default y
+ def_bool y
config RWSEM_XCHGADD_ALGORITHM
bool
config GENERIC_BUG
def_bool y
- depends on BUG
+ depends on BUG && SUPERH32
config GENERIC_FIND_NEXT_BIT
- bool
- default y
+ def_bool y
config GENERIC_HWEIGHT
- bool
- default y
+ def_bool y
config GENERIC_HARDIRQS
- bool
- default y
+ def_bool y
+
+config GENERIC_HARDIRQS_NO__DO_IRQ
+ def_bool y
config GENERIC_IRQ_PROBE
- bool
- default y
+ def_bool y
config GENERIC_CALIBRATE_DELAY
- bool
- default y
+ def_bool y
config GENERIC_IOMAP
bool
config GENERIC_CLOCKEVENTS
def_bool n
+config GENERIC_LOCKBREAK
+ def_bool y
+ depends on SMP && PREEMPT
+
config SYS_SUPPORTS_PM
bool
config SYS_SUPPORTS_PCI
bool
-config ARCH_MAY_HAVE_PC_FDC
- bool
-
config STACKTRACE_SUPPORT
- bool
- default y
+ def_bool y
config LOCKDEP_SUPPORT
- bool
- default y
+ def_bool y
config ARCH_HAS_ILOG2_U32
- bool
- default n
+ def_bool n
config ARCH_HAS_ILOG2_U64
- bool
- default n
+ def_bool n
config ARCH_NO_VIRT_TO_BUS
def_bool y
+config IO_TRAPPED
+ bool
+
source "init/Kconfig"
+source "kernel/Kconfig.freezer"
+
menu "System type"
-source "arch/sh/mm/Kconfig"
+#
+# Processor families
+#
+config CPU_SH2
+ bool
+
+config CPU_SH2A
+ bool
+ select CPU_SH2
+
+config CPU_SH3
+ bool
+ select CPU_HAS_INTEVT
+ select CPU_HAS_SR_RB
+
+config CPU_SH4
+ bool
+ select CPU_HAS_INTEVT
+ select CPU_HAS_SR_RB
+ select CPU_HAS_PTEA if !CPU_SH4A || CPU_SHX2
+ select CPU_HAS_FPU if !CPU_SH4AL_DSP
+
+config CPU_SH4A
+ bool
+ select CPU_SH4
+
+config CPU_SH4AL_DSP
+ bool
+ select CPU_SH4A
+ select CPU_HAS_DSP
+
+config CPU_SH5
+ bool
+ select CPU_HAS_FPU
+
+config CPU_SHX2
+ bool
-menu "Processor features"
+config CPU_SHX3
+ bool
choice
- prompt "Endianess selection"
- default CPU_LITTLE_ENDIAN
- help
- Some SuperH machines can be configured for either little or big
- endian byte order. These modes require different kernels.
+ prompt "Processor sub-type selection"
-config CPU_LITTLE_ENDIAN
- bool "Little Endian"
+#
+# Processor subtypes
+#
-config CPU_BIG_ENDIAN
- bool "Big Endian"
+# SH-2 Processor Support
-endchoice
+config CPU_SUBTYPE_SH7619
+ bool "Support SH7619 processor"
+ select CPU_SH2
-config SH_FPU
- bool "FPU support"
- depends on CPU_HAS_FPU
- default y
- help
- Selecting this option will enable support for SH processors that
- have FPU units (ie, SH77xx).
+# SH-2A Processor Support
- This option must be set in order to enable the FPU.
+config CPU_SUBTYPE_SH7203
+ bool "Support SH7203 processor"
+ select CPU_SH2A
+ select CPU_HAS_FPU
-config SH_FPU_EMU
- bool "FPU emulation support"
- depends on !SH_FPU && EXPERIMENTAL
- default n
+config CPU_SUBTYPE_SH7206
+ bool "Support SH7206 processor"
+ select CPU_SH2A
+
+config CPU_SUBTYPE_SH7263
+ bool "Support SH7263 processor"
+ select CPU_SH2A
+ select CPU_HAS_FPU
+
+config CPU_SUBTYPE_MXG
+ bool "Support MX-G processor"
+ select CPU_SH2A
help
- Selecting this option will enable support for software FPU emulation.
- Most SH-3 users will want to say Y here, whereas most SH-4 users will
- want to say N.
+ Select MX-G if running on an R8A03022BG part.
-config SH_DSP
- bool "DSP support"
- depends on CPU_HAS_DSP
- default y
+# SH-3 Processor Support
+
+config CPU_SUBTYPE_SH7705
+ bool "Support SH7705 processor"
+ select CPU_SH3
+
+config CPU_SUBTYPE_SH7706
+ bool "Support SH7706 processor"
+ select CPU_SH3
help
- Selecting this option will enable support for SH processors that
- have DSP units (ie, SH2-DSP, SH3-DSP, and SH4AL-DSP).
+ Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU.
- This option must be set in order to enable the DSP.
+config CPU_SUBTYPE_SH7707
+ bool "Support SH7707 processor"
+ select CPU_SH3
+ help
+ Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU.
-config SH_ADC
- bool "ADC support"
- depends on CPU_SH3
- default y
+config CPU_SUBTYPE_SH7708
+ bool "Support SH7708 processor"
+ select CPU_SH3
help
- Selecting this option will allow the Linux kernel to use SH3 on-chip
- ADC module.
+ Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or
+ if you have a 100 Mhz SH-3 HD6417708R CPU.
- If unsure, say N.
+config CPU_SUBTYPE_SH7709
+ bool "Support SH7709 processor"
+ select CPU_SH3
+ help
+ Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU.
-config SH_STORE_QUEUES
- bool "Support for Store Queues"
- depends on CPU_SH4
+config CPU_SUBTYPE_SH7710
+ bool "Support SH7710 processor"
+ select CPU_SH3
+ select CPU_HAS_DSP
help
- Selecting this option will enable an in-kernel API for manipulating
- the store queues integrated in the SH-4 processors.
+ Select SH7710 if you have a SH3-DSP SH7710 CPU.
-config SPECULATIVE_EXECUTION
- bool "Speculative subroutine return"
- depends on CPU_SUBTYPE_SH7780 && EXPERIMENTAL
+config CPU_SUBTYPE_SH7712
+ bool "Support SH7712 processor"
+ select CPU_SH3
+ select CPU_HAS_DSP
help
- This enables support for a speculative instruction fetch for
- subroutine return. There are various pitfalls associated with
- this, as outlined in the SH7780 hardware manual.
+ Select SH7712 if you have a SH3-DSP SH7712 CPU.
- If unsure, say N.
+config CPU_SUBTYPE_SH7720
+ bool "Support SH7720 processor"
+ select CPU_SH3
+ select CPU_HAS_DSP
+ help
+ Select SH7720 if you have a SH3-DSP SH7720 CPU.
-config CPU_HAS_INTEVT
- bool
+config CPU_SUBTYPE_SH7721
+ bool "Support SH7721 processor"
+ select CPU_SH3
+ select CPU_HAS_DSP
+ help
+ Select SH7721 if you have a SH3-DSP SH7721 CPU.
-config CPU_HAS_MASKREG_IRQ
- bool
+# SH-4 Processor Support
-config CPU_HAS_IPR_IRQ
- bool
+config CPU_SUBTYPE_SH7750
+ bool "Support SH7750 processor"
+ select CPU_SH4
+ help
+ Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU.
-config CPU_HAS_SR_RB
- bool "CPU has SR.RB"
- depends on CPU_SH3 || CPU_SH4
- default y
+config CPU_SUBTYPE_SH7091
+ bool "Support SH7091 processor"
+ select CPU_SH4
help
- This will enable the use of SR.RB register bank usage. Processors
- that are lacking this bit must have another method in place for
- accomplishing what is taken care of by the banked registers.
+ Select SH7091 if you have an SH-4 based Sega device (such as
+ the Dreamcast, Naomi, and Naomi 2).
- See <file:Documentation/sh/register-banks.txt> for further
- information on SR.RB and register banking in the kernel in general.
+config CPU_SUBTYPE_SH7750R
+ bool "Support SH7750R processor"
+ select CPU_SH4
-config CPU_HAS_PTEA
- bool
+config CPU_SUBTYPE_SH7750S
+ bool "Support SH7750S processor"
+ select CPU_SH4
-config CPU_HAS_DSP
- bool
+config CPU_SUBTYPE_SH7751
+ bool "Support SH7751 processor"
+ select CPU_SH4
+ help
+ Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU,
+ or if you have a HD6417751R CPU.
-config CPU_HAS_FPU
- bool
+config CPU_SUBTYPE_SH7751R
+ bool "Support SH7751R processor"
+ select CPU_SH4
-endmenu
+config CPU_SUBTYPE_SH7760
+ bool "Support SH7760 processor"
+ select CPU_SH4
-menu "Board support"
+config CPU_SUBTYPE_SH4_202
+ bool "Support SH4-202 processor"
+ select CPU_SH4
-config SOLUTION_ENGINE
- bool
+# SH-4A Processor Support
-config SH_SOLUTION_ENGINE
- bool "SolutionEngine"
- select SOLUTION_ENGINE
- select CPU_HAS_IPR_IRQ
- depends on CPU_SUBTYPE_SH7709 || CPU_SUBTYPE_SH7750
- help
- Select SolutionEngine if configuring for a Hitachi SH7709
- or SH7750 evaluation board.
-
-config SH_7206_SOLUTION_ENGINE
- bool "SolutionEngine7206"
- select SOLUTION_ENGINE
- depends on CPU_SUBTYPE_SH7206
- help
- Select 7206 SolutionEngine if configuring for a Hitachi SH7206
- evaluation board.
-
-config SH_7619_SOLUTION_ENGINE
- bool "SolutionEngine7619"
- select SOLUTION_ENGINE
- depends on CPU_SUBTYPE_SH7619
- help
- Select 7619 SolutionEngine if configuring for a Hitachi SH7619
- evaluation board.
-
-config SH_7722_SOLUTION_ENGINE
- bool "SolutionEngine7722"
- select SOLUTION_ENGINE
- depends on CPU_SUBTYPE_SH7722
- help
- Select 7722 SolutionEngine if configuring for a Hitachi SH772
- evaluation board.
-
-config SH_7751_SOLUTION_ENGINE
- bool "SolutionEngine7751"
- select SOLUTION_ENGINE
- select CPU_HAS_IPR_IRQ
- depends on CPU_SUBTYPE_SH7751
- help
- Select 7751 SolutionEngine if configuring for a Hitachi SH7751
- evaluation board.
-
-config SH_7780_SOLUTION_ENGINE
- bool "SolutionEngine7780"
- select SOLUTION_ENGINE
- select SYS_SUPPORTS_PCI
- depends on CPU_SUBTYPE_SH7780
- help
- Select 7780 SolutionEngine if configuring for a Renesas SH7780
- evaluation board.
-
-config SH_7343_SOLUTION_ENGINE
- bool "SolutionEngine7343"
- select SOLUTION_ENGINE
- depends on CPU_SUBTYPE_SH7343
- help
- Select 7343 SolutionEngine if configuring for a Hitachi
- SH7343 (SH-Mobile 3AS) evaluation board.
-
-config SH_7751_SYSTEMH
- bool "SystemH7751R"
- depends on CPU_SUBTYPE_SH7751R
- help
- Select SystemH if you are configuring for a Renesas SystemH
- 7751R evaluation board.
-
-config SH_HP6XX
- bool "HP6XX"
- select SYS_SUPPORTS_APM_EMULATION
- select HD6446X_SERIES
- depends on CPU_SUBTYPE_SH7709
- help
- Select HP6XX if configuring for a HP jornada HP6xx.
- More information (hardware only) at
- <http://www.hp.com/jornada/>.
-
-config SH_DREAMCAST
- bool "Dreamcast"
- select SYS_SUPPORTS_PCI
- depends on CPU_SUBTYPE_SH7091
- help
- Select Dreamcast if configuring for a SEGA Dreamcast.
- More information at
- <http://www.m17n.org/linux-sh/dreamcast/>. There is a
- Dreamcast project is at <http://linuxdc.sourceforge.net/>.
-
-config SH_MPC1211
- bool "Interface MPC1211"
- depends on CPU_SUBTYPE_SH7751 && BROKEN
- help
- CTP/PCI-SH02 is a CPU module computer that is produced
- by Interface Corporation.
- More information at <http://www.interface.co.jp>
-
-config SH_SH03
- bool "Interface CTP/PCI-SH03"
- depends on CPU_SUBTYPE_SH7751
- select CPU_HAS_IPR_IRQ
- select SYS_SUPPORTS_PCI
- help
- CTP/PCI-SH03 is a CPU module computer that is produced
- by Interface Corporation.
- More information at <http://www.interface.co.jp>
-
-config SH_SECUREEDGE5410
- bool "SecureEdge5410"
- depends on CPU_SUBTYPE_SH7751R
- select CPU_HAS_IPR_IRQ
- select SYS_SUPPORTS_PCI
- help
- Select SecureEdge5410 if configuring for a SnapGear SH board.
- This includes both the OEM SecureEdge products as well as the
- SME product line.
-
-config SH_HS7751RVOIP
- bool "HS7751RVOIP"
- depends on CPU_SUBTYPE_SH7751R
- help
- Select HS7751RVOIP if configuring for a Renesas Technology
- Sales VoIP board.
-
-config SH_7710VOIPGW
- bool "SH7710-VOIP-GW"
- depends on CPU_SUBTYPE_SH7710
- help
- Select this option to build a kernel for the SH7710 based
- VOIP GW.
-
-config SH_RTS7751R2D
- bool "RTS7751R2D"
- depends on CPU_SUBTYPE_SH7751R
- select SYS_SUPPORTS_PCI
- help
- Select RTS7751R2D if configuring for a Renesas Technology
- Sales SH-Graphics board.
-
-config SH_HIGHLANDER
- bool "Highlander"
- depends on CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785
- select SYS_SUPPORTS_PCI
-
-config SH_EDOSK7705
- bool "EDOSK7705"
- depends on CPU_SUBTYPE_SH7705
-
-config SH_SH4202_MICRODEV
- bool "SH4-202 MicroDev"
- depends on CPU_SUBTYPE_SH4_202
+config CPU_SUBTYPE_SH7723
+ bool "Support SH7723 processor"
+ select CPU_SH4A
+ select CPU_SHX2
+ select ARCH_SPARSEMEM_ENABLE
help
- Select SH4-202 MicroDev if configuring for a SuperH MicroDev board
- with an SH4-202 CPU.
+ Select SH7723 if you have an SH-MobileR2 CPU.
-config SH_LANDISK
- bool "LANDISK"
- depends on CPU_SUBTYPE_SH7751R
- select SYS_SUPPORTS_PCI
+config CPU_SUBTYPE_SH7763
+ bool "Support SH7763 processor"
+ select CPU_SH4A
help
- I-O DATA DEVICE, INC. "LANDISK Series" support.
+ Select SH7763 if you have a SH4A SH7763(R5S77631) CPU.
-config SH_TITAN
- bool "TITAN"
- depends on CPU_SUBTYPE_SH7751R
- select CPU_HAS_IPR_IRQ
- select SYS_SUPPORTS_PCI
- help
- Select Titan if you are configuring for a Nimble Microsystems
- NetEngine NP51R.
+config CPU_SUBTYPE_SH7770
+ bool "Support SH7770 processor"
+ select CPU_SH4A
-config SH_SHMIN
- bool "SHMIN"
- depends on CPU_SUBTYPE_SH7706
- select CPU_HAS_IPR_IRQ
- help
- Select SHMIN if configuring for the SHMIN board.
+config CPU_SUBTYPE_SH7780
+ bool "Support SH7780 processor"
+ select CPU_SH4A
-config SH_LBOX_RE2
- bool "L-BOX RE2"
- depends on CPU_SUBTYPE_SH7751R
- select SYS_SUPPORTS_PCI
- help
- Select L-BOX RE2 if configuring for the NTT COMWARE L-BOX RE2.
+config CPU_SUBTYPE_SH7785
+ bool "Support SH7785 processor"
+ select CPU_SH4A
+ select CPU_SHX2
+ select ARCH_SPARSEMEM_ENABLE
+ select SYS_SUPPORTS_NUMA
-config SH_X3PROTO
- bool "SH-X3 Prototype board"
- depends on CPU_SUBTYPE_SHX3
+config CPU_SUBTYPE_SHX3
+ bool "Support SH-X3 processor"
+ select CPU_SH4A
+ select CPU_SHX3
+ select ARCH_SPARSEMEM_ENABLE
+ select SYS_SUPPORTS_NUMA
+ select SYS_SUPPORTS_SMP
-config SH_MAGIC_PANEL_R2
- bool "Magic Panel R2"
- depends on CPU_SUBTYPE_SH7720
- help
- Select Magic Panel R2 if configuring for Magic Panel R2.
+# SH4AL-DSP Processor Support
-endmenu
+config CPU_SUBTYPE_SH7343
+ bool "Support SH7343 processor"
+ select CPU_SH4AL_DSP
+
+config CPU_SUBTYPE_SH7722
+ bool "Support SH7722 processor"
+ select CPU_SH4AL_DSP
+ select CPU_SHX2
+ select ARCH_SPARSEMEM_ENABLE
+ select SYS_SUPPORTS_NUMA
+
+config CPU_SUBTYPE_SH7366
+ bool "Support SH7366 processor"
+ select CPU_SH4AL_DSP
+ select CPU_SHX2
+ select ARCH_SPARSEMEM_ENABLE
+ select SYS_SUPPORTS_NUMA
+
+# SH-5 Processor Support
+
+config CPU_SUBTYPE_SH5_101
+ bool "Support SH5-101 processor"
+ select CPU_SH5
+
+config CPU_SUBTYPE_SH5_103
+ bool "Support SH5-103 processor"
+ select CPU_SH5
+
+endchoice
+
+source "arch/sh/mm/Kconfig"
+
+source "arch/sh/Kconfig.cpu"
-source "arch/sh/boards/renesas/hs7751rvoip/Kconfig"
-source "arch/sh/boards/renesas/rts7751r2d/Kconfig"
-source "arch/sh/boards/renesas/r7780rp/Kconfig"
-source "arch/sh/boards/magicpanelr2/Kconfig"
+source "arch/sh/boards/Kconfig"
menu "Timer and clock configuration"
config SH_TMU
- bool "TMU timer support"
+ def_bool y
+ prompt "TMU timer support"
depends on CPU_SH3 || CPU_SH4
select GENERIC_TIME
select GENERIC_CLOCKEVENTS
- default y
help
This enables the use of the TMU as the system timer.
config SH_CMT
- bool "CMT timer support"
- depends on CPU_SH2
- default y
+ def_bool y
+ prompt "CMT timer support"
+ depends on CPU_SH2 && !CPU_SUBTYPE_MXG
help
This enables the use of the CMT as the system timer.
config SH_MTU2
- bool "MTU2 timer support"
+ def_bool n
+ prompt "MTU2 timer support"
depends on CPU_SH2A
- default n
help
This enables the use of the MTU2 as the system timer.
config SH_TIMER_IRQ
int
- default "28" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785
+ default "28" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785 || \
+ CPU_SUBTYPE_SH7763
default "86" if CPU_SUBTYPE_SH7619
default "140" if CPU_SUBTYPE_SH7206
+ default "142" if CPU_SUBTYPE_SH7203
+ default "238" if CPU_SUBTYPE_MXG
default "16"
config SH_PCLK_FREQ
default "27000000" if CPU_SUBTYPE_SH7343
default "31250000" if CPU_SUBTYPE_SH7619
default "32000000" if CPU_SUBTYPE_SH7722
- default "33333333" if CPU_SUBTYPE_SH7770 || \
+ default "33333333" if CPU_SUBTYPE_SH7770 || CPU_SUBTYPE_SH7723 || \
CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7705 || \
- CPU_SUBTYPE_SH7206
+ CPU_SUBTYPE_SH7203 || CPU_SUBTYPE_SH7206 || \
+ CPU_SUBTYPE_SH7263 || CPU_SUBTYPE_MXG
default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R
default "66000000" if CPU_SUBTYPE_SH4_202
default "50000000"
config SH_CLK_MD
int "CPU Mode Pin Setting"
- depends on CPU_SUBTYPE_SH7619 || CPU_SUBTYPE_SH7206
+ depends on CPU_SH2
default 6 if CPU_SUBTYPE_SH7206
default 5 if CPU_SUBTYPE_SH7619
default 0
config ISA_DMA_API
bool
- depends on SH_MPC1211
- default y
menu "Kernel features"
config KEXEC
bool "kexec system call (EXPERIMENTAL)"
- depends on EXPERIMENTAL
+ depends on SUPERH32 && EXPERIMENTAL
help
kexec is a system call that implements the ability to shutdown your
current kernel, and to start another kernel. It is like a reboot
config CRASH_DUMP
bool "kernel crash dumps (EXPERIMENTAL)"
- depends on EXPERIMENTAL
+ depends on SUPERH32 && EXPERIMENTAL
help
Generate crash dump after being started by kexec.
This should be normally only set in special crash dump kernels
For more details see Documentation/kdump/kdump.txt
+config SECCOMP
+ bool "Enable seccomp to safely compute untrusted bytecode"
+ depends on PROC_FS
+ default y
+ help
+ This kernel feature is useful for number crunching applications
+ that may need to compute untrusted bytecode during their
+ execution. By using pipes or other transports made available to
+ the process as file descriptors supporting the read/write
+ syscalls, it's possible to isolate those applications in
+ their own address space using seccomp. Once seccomp is
+ enabled via prctl, it cannot be disabled and the task is only
+ allowed to execute a few safe syscalls defined by each seccomp
+ mode.
+
+ If unsure, say N.
+
config SMP
bool "Symmetric multi-processing support"
depends on SYS_SUPPORTS_SMP
+ select USE_GENERIC_SMP_HELPERS
---help---
This enables support for systems with more than one CPU. If you have
a system with only one CPU, like most personal computers, say N. If
People using multiprocessor machines who say Y here should also say
Y to "Enhanced Real Time Clock Support", below.
- See also the <file:Documentation/smp.txt>,
- <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available
- at <http://www.tldp.org/docs.html#howto>.
+ See also <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO
+ available at <http://www.tldp.org/docs.html#howto>.
If you don't know what to do here, say N.
config GUSA
def_bool y
- depends on !SMP
+ depends on !SMP && SUPERH32
help
This enables support for gUSA (general UserSpace Atomicity).
This is the default implementation for both UP and non-ll/sc
This should only be disabled for special cases where alternate
atomicity implementations exist.
+config GUSA_RB
+ bool "Implement atomic operations by roll-back (gRB) (EXPERIMENTAL)"
+ depends on GUSA && CPU_SH3 || (CPU_SH4 && !CPU_SH4A)
+ help
+ Enabling this option will allow the kernel to implement some
+ atomic operations using a software implemention of load-locked/
+ store-conditional (LLSC). On machines which do not have hardware
+ LLSC, this should be more efficient than the other alternative of
+ disabling insterrupts around the atomic sequence.
+
endmenu
menu "Boot options"
config ZERO_PAGE_OFFSET
hex "Zero page offset"
- default "0x00004000" if SH_MPC1211 || SH_SH03
+ default "0x00004000" if SH_SH03
default "0x00010000" if PAGE_SIZE_64KB
default "0x00002000" if PAGE_SIZE_8KB
default "0x00001000"
config UBC_WAKEUP
bool "Wakeup UBC on startup"
- depends on CPU_SH4
+ depends on CPU_SH4 && !CPU_SH4A
help
Selecting this option will wakeup the User Break Controller (UBC) on
startup. Although the UBC is left in an awake state when the processor
menu "Power management options (EXPERIMENTAL)"
depends on EXPERIMENTAL && SYS_SUPPORTS_PM
+config ARCH_SUSPEND_POSSIBLE
+ def_bool y
+ depends on !SMP
+
source kernel/power/Kconfig
endmenu
source "fs/Kconfig"
-source "arch/sh/oprofile/Kconfig"
-
source "arch/sh/Kconfig.debug"
source "security/Kconfig"
git://ftp.safe.ca / safe / jmp / linux-2.6 / blobdiff