#include <asm/spu.h>
#include <asm/spu_priv1.h>
#include <asm/firmware.h>
+#include <asm/setjmp.h>
+#include <asm/reg.h>
#ifdef CONFIG_PPC64
#include <asm/hvcall.h>
#include <asm/paca.h>
-#include <asm/iseries/it_lp_reg_save.h>
#endif
#include "nonstdio.h"
#define skipbl xmon_skipbl
#ifdef CONFIG_SMP
-cpumask_t cpus_in_xmon = CPU_MASK_NONE;
+static cpumask_t cpus_in_xmon = CPU_MASK_NONE;
static unsigned long xmon_taken = 1;
static int xmon_owner;
static int xmon_gate;
#endif /* CONFIG_SMP */
-static unsigned long in_xmon = 0;
+static unsigned long in_xmon __read_mostly = 0;
static unsigned long adrs;
static int size = 1;
static int termch;
static char tmpstr[128];
-#define JMP_BUF_LEN 23
static long bus_error_jmp[JMP_BUF_LEN];
static int catch_memory_errors;
static long *xmon_fault_jmp[NR_CPUS];
-#define setjmp xmon_setjmp
-#define longjmp xmon_longjmp
/* Breakpoint stuff */
struct bpt {
static void dump(void);
static void prdump(unsigned long, long);
static int ppc_inst_dump(unsigned long, long, int);
+static void dump_log_buf(void);
static void backtrace(struct pt_regs *);
static void excprint(struct pt_regs *);
static void prregs(struct pt_regs *);
static void dump_tlb_44x(void);
#endif
-int xmon_no_auto_backtrace;
+static int xmon_no_auto_backtrace;
extern void xmon_enter(void);
extern void xmon_leave(void);
-extern long setjmp(long *);
-extern void longjmp(long *, long);
-extern void xmon_save_regs(struct pt_regs *);
-
#ifdef CONFIG_PPC64
#define REG "%.16lx"
#define REGS_PER_LINE 4
di dump instructions\n\
df dump float values\n\
dd dump double values\n\
+ dl dump the kernel log buffer\n\
dr dump stream of raw bytes\n\
e print exception information\n\
f flush cache\n\
{
xmon_speaker = 0;
}
+
+int cpus_are_in_xmon(void)
+{
+ return !cpus_empty(cpus_in_xmon);
+}
+#endif
+
+static inline int unrecoverable_excp(struct pt_regs *regs)
+{
+#ifdef CONFIG_4xx
+ /* We have no MSR_RI bit on 4xx, so we simply return false */
+ return 0;
+#else
+ return ((regs->msr & MSR_RI) == 0);
#endif
+}
static int xmon_core(struct pt_regs *regs, int fromipi)
{
bp = NULL;
if ((regs->msr & (MSR_IR|MSR_PR|MSR_SF)) == (MSR_IR|MSR_SF))
bp = at_breakpoint(regs->nip);
- if (bp || (regs->msr & MSR_RI) == 0)
+ if (bp || unrecoverable_excp(regs))
fromipi = 0;
if (!fromipi) {
cpu, BP_NUM(bp));
xmon_print_symbol(regs->nip, " ", ")\n");
}
- if ((regs->msr & MSR_RI) == 0)
+ if (unrecoverable_excp(regs))
printf("WARNING: exception is not recoverable, "
"can't continue\n");
release_output_lock();
printf("Stopped at breakpoint %x (", BP_NUM(bp));
xmon_print_symbol(regs->nip, " ", ")\n");
}
- if ((regs->msr & MSR_RI) == 0)
+ if (unrecoverable_excp(regs))
printf("WARNING: exception is not recoverable, "
"can't continue\n");
remove_bpts();
in_xmon = 0;
#endif
+#ifdef CONFIG_BOOKE
+ if (regs->msr & MSR_DE) {
+ bp = at_breakpoint(regs->nip);
+ if (bp != NULL) {
+ regs->nip = (unsigned long) &bp->instr[0];
+ atomic_inc(&bp->ref_count);
+ }
+ }
+#else
if ((regs->msr & (MSR_IR|MSR_PR|MSR_SF)) == (MSR_IR|MSR_SF)) {
bp = at_breakpoint(regs->nip);
if (bp != NULL) {
}
}
}
-
+#endif
insert_cpu_bpts();
local_irq_restore(flags);
struct pt_regs regs;
if (excp == NULL) {
- xmon_save_regs(®s);
+ ppc_save_regs(®s);
excp = ®s;
}
{
if ((regs->msr & (MSR_IR|MSR_PR|MSR_SF)) != (MSR_IR|MSR_SF))
return 0;
- if (iabr == 0)
+ if (iabr == NULL)
return 0;
xmon_core(regs, 0);
return 1;
}
}
+#ifdef CONFIG_BOOKE
+static int do_step(struct pt_regs *regs)
+{
+ regs->msr |= MSR_DE;
+ mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) | DBCR0_IC | DBCR0_IDM);
+ return 1;
+}
+#else
/*
* Step a single instruction.
* Some instructions we emulate, others we execute with MSR_SE set.
regs->msr |= MSR_SE;
return 1;
}
+#endif
static void bootcmds(void)
{
} else {
/* assume a breakpoint address */
bp = at_breakpoint(a);
- if (bp == 0) {
+ if (bp == NULL) {
printf("No breakpoint at %x\n", a);
break;
}
static int xmon_depth_to_print = 64;
-#ifdef CONFIG_PPC64
-#define LRSAVE_OFFSET 0x10
-#define REG_FRAME_MARKER 0x7265677368657265ul /* "regshere" */
-#define MARKER_OFFSET 0x60
+#define LRSAVE_OFFSET (STACK_FRAME_LR_SAVE * sizeof(unsigned long))
+#define MARKER_OFFSET (STACK_FRAME_MARKER * sizeof(unsigned long))
+
+#ifdef __powerpc64__
#define REGS_OFFSET 0x70
#else
-#define LRSAVE_OFFSET 4
-#define REG_FRAME_MARKER 0x72656773
-#define MARKER_OFFSET 8
#define REGS_OFFSET 16
#endif
/* Look for "regshere" marker to see if this is
an exception frame. */
if (mread(sp + MARKER_OFFSET, &marker, sizeof(unsigned long))
- && marker == REG_FRAME_MARKER) {
+ && marker == STACK_FRAME_REGS_MARKER) {
if (mread(sp + REGS_OFFSET, ®s, sizeof(regs))
!= sizeof(regs)) {
printf("Couldn't read registers at %lx\n",
static void print_bug_trap(struct pt_regs *regs)
{
+#ifdef CONFIG_BUG
const struct bug_entry *bug;
unsigned long addr;
#else
printf("kernel BUG at %p!\n", (void *)bug->bug_addr);
#endif
+#endif /* CONFIG_BUG */
}
-void excprint(struct pt_regs *fp)
+static void excprint(struct pt_regs *fp)
{
unsigned long trap;
print_bug_trap(fp);
}
-void prregs(struct pt_regs *fp)
+static void prregs(struct pt_regs *fp)
{
int n, trap;
unsigned long base;
printf("dar = "REG" dsisr = %.8lx\n", fp->dar, fp->dsisr);
}
-void cacheflush(void)
+static void cacheflush(void)
{
int cmd;
unsigned long nflush;
catch_memory_errors = 0;
}
-unsigned long
+static unsigned long
read_spr(int n)
{
unsigned int instrs[2];
return ret;
}
-void
+static void
write_spr(int n, unsigned long val)
{
unsigned int instrs[2];
extern char exc_prolog;
extern char dec_exc;
-void super_regs(void)
+static void super_regs(void)
{
int cmd;
unsigned long val;
if (firmware_has_feature(FW_FEATURE_ISERIES)) {
struct paca_struct *ptrPaca;
struct lppaca *ptrLpPaca;
- struct ItLpRegSave *ptrLpRegSave;
/* Dump out relevant Paca data areas. */
printf("Paca: \n");
ptrLpPaca->saved_srr0, ptrLpPaca->saved_srr1);
printf(" Saved Gpr3=%.16lx Saved Gpr4=%.16lx \n",
ptrLpPaca->saved_gpr3, ptrLpPaca->saved_gpr4);
- printf(" Saved Gpr5=%.16lx \n", ptrLpPaca->saved_gpr5);
-
- printf(" Local Processor Register Save Area (LpRegSave): \n");
- ptrLpRegSave = ptrPaca->reg_save_ptr;
- printf(" Saved Sprg0=%.16lx Saved Sprg1=%.16lx \n",
- ptrLpRegSave->xSPRG0, ptrLpRegSave->xSPRG0);
- printf(" Saved Sprg2=%.16lx Saved Sprg3=%.16lx \n",
- ptrLpRegSave->xSPRG2, ptrLpRegSave->xSPRG3);
- printf(" Saved Msr =%.16lx Saved Nia =%.16lx \n",
- ptrLpRegSave->xMSR, ptrLpRegSave->xNIA);
+ printf(" Saved Gpr5=%.16lx \n",
+ ptrLpPaca->gpr5_dword.saved_gpr5);
}
#endif
/*
* Stuff for reading and writing memory safely
*/
-int
+static int
mread(unsigned long adrs, void *buf, int size)
{
volatile int n;
return n;
}
-int
+static int
mwrite(unsigned long adrs, void *buf, int size)
{
volatile int n;
#define SWAP(a, b, t) ((t) = (a), (a) = (b), (b) = (t))
-void
+static void
byterev(unsigned char *val, int size)
{
int t;
" x exit this mode\n"
"";
-void
+static void
memex(void)
{
int cmd, inc, i, nslash;
}
}
-int
+static int
bsesc(void)
{
int c;
#define isxdigit(c) (('0' <= (c) && (c) <= '9') \
|| ('a' <= (c) && (c) <= 'f') \
|| ('A' <= (c) && (c) <= 'F'))
-void
+static void
dump(void)
{
int c;
nidump = MAX_DUMP;
adrs += ppc_inst_dump(adrs, nidump, 1);
last_cmd = "di\n";
+ } else if (c == 'l') {
+ dump_log_buf();
} else if (c == 'r') {
scanhex(&ndump);
if (ndump == 0)
}
}
-void
+static void
prdump(unsigned long adrs, long ndump)
{
long n, m, c, r, nr;
typedef int (*instruction_dump_func)(unsigned long inst, unsigned long addr);
-int
+static int
generic_inst_dump(unsigned long adr, long count, int praddr,
instruction_dump_func dump_func)
{
return adr - first_adr;
}
-int
+static int
ppc_inst_dump(unsigned long adr, long count, int praddr)
{
return generic_inst_dump(adr, count, praddr, print_insn_powerpc);
xmon_print_symbol(addr, "\t# ", "");
}
+void
+dump_log_buf(void)
+{
+ const unsigned long size = 128;
+ unsigned long end, addr;
+ unsigned char buf[size + 1];
+
+ addr = 0;
+ buf[size] = '\0';
+
+ if (setjmp(bus_error_jmp) != 0) {
+ printf("Unable to lookup symbol __log_buf!\n");
+ return;
+ }
+
+ catch_memory_errors = 1;
+ sync();
+ addr = kallsyms_lookup_name("__log_buf");
+
+ if (! addr)
+ printf("Symbol __log_buf not found!\n");
+ else {
+ end = addr + (1 << CONFIG_LOG_BUF_SHIFT);
+ while (addr < end) {
+ if (! mread(addr, buf, size)) {
+ printf("Can't read memory at address 0x%lx\n", addr);
+ break;
+ }
+
+ printf("%s", buf);
+
+ if (strlen(buf) < size)
+ break;
+
+ addr += size;
+ }
+ }
+
+ sync();
+ /* wait a little while to see if we get a machine check */
+ __delay(200);
+ catch_memory_errors = 0;
+}
/*
* Memory operations - move, set, print differences
static unsigned long mcount; /* # bytes to affect */
static unsigned long mdiffs; /* max # differences to print */
-void
+static void
memops(int cmd)
{
scanhex((void *)&mdest);
}
}
-void
+static void
memdiffs(unsigned char *p1, unsigned char *p2, unsigned nb, unsigned maxpr)
{
unsigned n, prt;
static unsigned mend;
static unsigned mask;
-void
+static void
memlocate(void)
{
unsigned a, n;
static unsigned long mskip = 0x1000;
static unsigned long mlim = 0xffffffff;
-void
+static void
memzcan(void)
{
unsigned char v;
printf("%.8x\n", a - mskip);
}
-void proccall(void)
+static void proccall(void)
{
unsigned long args[8];
unsigned long ret;
return 1;
}
-void
+static void
scannl(void)
{
int c;
c = inchar();
}
-int hexdigit(int c)
+static int hexdigit(int c)
{
if( '0' <= c && c <= '9' )
return c - '0';
static char line[256];
static char *lineptr;
-void
+static void
flush_input(void)
{
lineptr = NULL;
}
-int
+static int
inchar(void)
{
if (lineptr == NULL || *lineptr == 0) {
return *lineptr++;
}
-void
+static void
take_input(char *str)
{
lineptr = str;
printf("%s", after);
}
-#ifdef CONFIG_PPC64
+#ifdef CONFIG_PPC_BOOK3S_64
static void dump_slb(void)
{
int i;
- unsigned long tmp;
+ unsigned long esid,vsid,valid;
+ unsigned long llp;
printf("SLB contents of cpu %x\n", smp_processor_id());
- for (i = 0; i < SLB_NUM_ENTRIES; i++) {
- asm volatile("slbmfee %0,%1" : "=r" (tmp) : "r" (i));
- printf("%02d %016lx ", i, tmp);
-
- asm volatile("slbmfev %0,%1" : "=r" (tmp) : "r" (i));
- printf("%016lx\n", tmp);
+ for (i = 0; i < mmu_slb_size; i++) {
+ asm volatile("slbmfee %0,%1" : "=r" (esid) : "r" (i));
+ asm volatile("slbmfev %0,%1" : "=r" (vsid) : "r" (i));
+ valid = (esid & SLB_ESID_V);
+ if (valid | esid | vsid) {
+ printf("%02d %016lx %016lx", i, esid, vsid);
+ if (valid) {
+ llp = vsid & SLB_VSID_LLP;
+ if (vsid & SLB_VSID_B_1T) {
+ printf(" 1T ESID=%9lx VSID=%13lx LLP:%3lx \n",
+ GET_ESID_1T(esid),
+ (vsid & ~SLB_VSID_B) >> SLB_VSID_SHIFT_1T,
+ llp);
+ } else {
+ printf(" 256M ESID=%9lx VSID=%13lx LLP:%3lx \n",
+ GET_ESID(esid),
+ (vsid & ~SLB_VSID_B) >> SLB_VSID_SHIFT,
+ llp);
+ }
+ } else
+ printf("\n");
+ }
}
}
}
}
#endif /* CONFIG_44x */
-void xmon_init(int enable)
+
+static void xmon_init(int enable)
{
#ifdef CONFIG_PPC_ISERIES
if (firmware_has_feature(FW_FEATURE_ISERIES))
DUMP_FIELD(spu, "0x%lx", ls_size);
DUMP_FIELD(spu, "0x%x", node);
DUMP_FIELD(spu, "0x%lx", flags);
- DUMP_FIELD(spu, "0x%lx", dar);
- DUMP_FIELD(spu, "0x%lx", dsisr);
DUMP_FIELD(spu, "%d", class_0_pending);
+ DUMP_FIELD(spu, "0x%lx", class_0_dar);
+ DUMP_FIELD(spu, "0x%lx", class_1_dar);
+ DUMP_FIELD(spu, "0x%lx", class_1_dsisr);
DUMP_FIELD(spu, "0x%lx", irqs[0]);
DUMP_FIELD(spu, "0x%lx", irqs[1]);
DUMP_FIELD(spu, "0x%lx", irqs[2]);