#include <linux/kdev_t.h>
#include <linux/delay.h>
#include <linux/seq_file.h>
-#include <linux/root_dev.h>
#include <asm/system.h>
#include <asm/time.h>
#include "mpc85xx.h"
#ifdef CONFIG_CPM2
+#include <linux/fs_enet_pd.h>
#include <asm/cpm2.h>
#include <sysdev/cpm2_pic.h>
#include <asm/fs_pd.h>
#endif
#ifdef CONFIG_PCI
-int
-mpc85xx_exclude_device(u_char bus, u_char devfn)
+static int mpc85xx_exclude_device(u_char bus, u_char devfn)
{
if (bus == 0 && PCI_SLOT(devfn) == 0)
return PCIBIOS_DEVICE_NOT_FOUND;
else
return PCIBIOS_SUCCESSFUL;
}
-
-void __init
-mpc85xx_pcibios_fixup(void)
-{
- struct pci_dev *dev = NULL;
-
- for_each_pci_dev(dev)
- pci_read_irq_line(dev);
-}
#endif /* CONFIG_PCI */
#ifdef CONFIG_CPM2
-static void cpm2_cascade(unsigned int irq, struct irq_desc *desc,
- struct pt_regs *regs)
+static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
{
int cascade_irq;
- while ((cascade_irq = cpm2_get_irq(regs)) >= 0) {
- generic_handle_irq(cascade_irq, regs);
+ while ((cascade_irq = cpm2_get_irq()) >= 0) {
+ generic_handle_irq(cascade_irq);
}
desc->chip->eoi(irq);
}
#endif /* CONFIG_CPM2 */
-void __init mpc85xx_ads_pic_init(void)
+static void __init mpc85xx_ads_pic_init(void)
{
struct mpic *mpic;
struct resource r;
* Setup the architecture
*/
#ifdef CONFIG_CPM2
-static void init_fcc_ioports(void)
+void init_fcc_ioports(struct fs_platform_info *fpi)
{
- struct immap *immap;
- struct io_port *io;
+ struct io_port *io = cpm2_map(im_ioport);
+ int fcc_no = fs_get_fcc_index(fpi->fs_no);
+ int target;
u32 tempval;
- immap = cpm2_immr;
-
- io = &immap->im_ioport;
- /* FCC2/3 are on the ports B/C. */
- tempval = in_be32(&io->iop_pdirb);
- tempval &= ~PB2_DIRB0;
- tempval |= PB2_DIRB1;
- out_be32(&io->iop_pdirb, tempval);
-
- tempval = in_be32(&io->iop_psorb);
- tempval &= ~PB2_PSORB0;
- tempval |= PB2_PSORB1;
- out_be32(&io->iop_psorb, tempval);
-
- tempval = in_be32(&io->iop_pparb);
- tempval |= (PB2_DIRB0 | PB2_DIRB1);
- out_be32(&io->iop_pparb, tempval);
-
- tempval = in_be32(&io->iop_pdirb);
- tempval &= ~PB3_DIRB0;
- tempval |= PB3_DIRB1;
- out_be32(&io->iop_pdirb, tempval);
-
- tempval = in_be32(&io->iop_psorb);
- tempval &= ~PB3_PSORB0;
- tempval |= PB3_PSORB1;
- out_be32(&io->iop_psorb, tempval);
-
- tempval = in_be32(&io->iop_pparb);
- tempval |= (PB3_DIRB0 | PB3_DIRB1);
- out_be32(&io->iop_pparb, tempval);
-
- tempval = in_be32(&io->iop_pdirc);
- tempval |= PC3_DIRC1;
- out_be32(&io->iop_pdirc, tempval);
-
- tempval = in_be32(&io->iop_pparc);
- tempval |= PC3_DIRC1;
- out_be32(&io->iop_pparc, tempval);
+ switch(fcc_no) {
+ case 1:
+ tempval = in_be32(&io->iop_pdirb);
+ tempval &= ~PB2_DIRB0;
+ tempval |= PB2_DIRB1;
+ out_be32(&io->iop_pdirb, tempval);
+
+ tempval = in_be32(&io->iop_psorb);
+ tempval &= ~PB2_PSORB0;
+ tempval |= PB2_PSORB1;
+ out_be32(&io->iop_psorb, tempval);
+
+ tempval = in_be32(&io->iop_pparb);
+ tempval |= (PB2_DIRB0 | PB2_DIRB1);
+ out_be32(&io->iop_pparb, tempval);
+
+ target = CPM_CLK_FCC2;
+ break;
+ case 2:
+ tempval = in_be32(&io->iop_pdirb);
+ tempval &= ~PB3_DIRB0;
+ tempval |= PB3_DIRB1;
+ out_be32(&io->iop_pdirb, tempval);
+
+ tempval = in_be32(&io->iop_psorb);
+ tempval &= ~PB3_PSORB0;
+ tempval |= PB3_PSORB1;
+ out_be32(&io->iop_psorb, tempval);
+
+ tempval = in_be32(&io->iop_pparb);
+ tempval |= (PB3_DIRB0 | PB3_DIRB1);
+ out_be32(&io->iop_pparb, tempval);
+
+ tempval = in_be32(&io->iop_pdirc);
+ tempval |= PC3_DIRC1;
+ out_be32(&io->iop_pdirc, tempval);
+
+ tempval = in_be32(&io->iop_pparc);
+ tempval |= PC3_DIRC1;
+ out_be32(&io->iop_pparc, tempval);
+
+ target = CPM_CLK_FCC3;
+ break;
+ default:
+ printk(KERN_ERR "init_fcc_ioports: invalid FCC number\n");
+ return;
+ }
/* Port C has clocks...... */
tempval = in_be32(&io->iop_psorc);
- tempval &= ~(CLK_TRX);
+ tempval &= ~(PC_CLK(fpi->clk_rx - 8) | PC_CLK(fpi->clk_tx - 8));
out_be32(&io->iop_psorc, tempval);
tempval = in_be32(&io->iop_pdirc);
- tempval &= ~(CLK_TRX);
+ tempval &= ~(PC_CLK(fpi->clk_rx - 8) | PC_CLK(fpi->clk_tx - 8));
out_be32(&io->iop_pdirc, tempval);
tempval = in_be32(&io->iop_pparc);
- tempval |= (CLK_TRX);
+ tempval |= (PC_CLK(fpi->clk_rx - 8) | PC_CLK(fpi->clk_tx - 8));
out_be32(&io->iop_pparc, tempval);
+ cpm2_unmap(io);
+
/* Configure Serial Interface clock routing.
- * First, clear all FCC bits to zero,
+ * First, clear FCC bits to zero,
* then set the ones we want.
*/
- immap->im_cpmux.cmx_fcr &= ~(CPMUX_CLK_MASK);
- immap->im_cpmux.cmx_fcr |= CPMUX_CLK_ROUTE;
+ cpm2_clk_setup(target, fpi->clk_rx, CPM_CLK_RX);
+ cpm2_clk_setup(target, fpi->clk_tx, CPM_CLK_TX);
}
#endif
#ifdef CONFIG_CPM2
cpm2_reset();
- init_fcc_ioports();
#endif
#ifdef CONFIG_PCI
for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
add_bridge(np);
-
- ppc_md.pcibios_fixup = mpc85xx_pcibios_fixup;
ppc_md.pci_exclude_device = mpc85xx_exclude_device;
#endif
-
-#ifdef CONFIG_ROOT_NFS
- ROOT_DEV = Root_NFS;
-#else
- ROOT_DEV = Root_HDA1;
-#endif
}
-void mpc85xx_ads_show_cpuinfo(struct seq_file *m)
+static void mpc85xx_ads_show_cpuinfo(struct seq_file *m)
{
uint pvid, svid, phid1;
uint memsize = total_memory;
*/
static int __init mpc85xx_ads_probe(void)
{
- /* We always match for now, eventually we should look at the flat
- dev tree to ensure this is the board we are suppose to run on
- */
- return 1;
+ unsigned long root = of_get_flat_dt_root();
+
+ return of_flat_dt_is_compatible(root, "MPC85xxADS");
}
define_machine(mpc85xx_ads) {
git://ftp.safe.ca / safe / jmp / linux-2.6 / blobdiff