Merge commit 'origin/master' into next
[safe/jmp/linux-2.6] / arch / powerpc / include / asm / paca.h
index 6493a39..c8a3cbf 100644 (file)
@@ -43,6 +43,7 @@ struct task_struct;
  * processor.
  */
 struct paca_struct {
+#ifdef CONFIG_PPC_BOOK3S
        /*
         * Because hw_cpu_id, unlike other paca fields, is accessed
         * routinely from other CPUs (from the IRQ code), we stick to
@@ -51,7 +52,7 @@ struct paca_struct {
         */
 
        struct lppaca *lppaca_ptr;      /* Pointer to LpPaca for PLIC */
-
+#endif /* CONFIG_PPC_BOOK3S */
        /*
         * MAGIC: the spinlock functions in arch/powerpc/lib/locks.c 
         * load lock_token and paca_index with a single lwz
@@ -62,13 +63,18 @@ struct paca_struct {
        u16 paca_index;                 /* Logical processor number */
 
        u64 kernel_toc;                 /* Kernel TOC address */
+       u64 kernelbase;                 /* Base address of kernel */
+       u64 kernel_msr;                 /* MSR while running in kernel */
+#ifdef CONFIG_PPC_STD_MMU_64
        u64 stab_real;                  /* Absolute address of segment table */
        u64 stab_addr;                  /* Virtual address of segment table */
+#endif /* CONFIG_PPC_STD_MMU_64 */
        void *emergency_sp;             /* pointer to emergency stack */
        u64 data_offset;                /* per cpu data offset */
        s16 hw_cpu_id;                  /* Physical processor number */
        u8 cpu_start;                   /* At startup, processor spins until */
                                        /* this becomes non-zero. */
+#ifdef CONFIG_PPC_STD_MMU_64
        struct slb_shadow *slb_shadow_ptr;
 
        /*
@@ -79,11 +85,13 @@ struct paca_struct {
        u64 exmc[10];           /* used for machine checks */
        u64 exslb[10];          /* used for SLB/segment table misses
                                 * on the linear mapping */
-
-       mm_context_t context;
+       /* SLB related definitions */
        u16 vmalloc_sllp;
        u16 slb_cache_ptr;
        u16 slb_cache[SLB_CACHE_ENTRIES];
+#endif /* CONFIG_PPC_STD_MMU_64 */
+
+       mm_context_t context;
 
        /*
         * then miscellaneous read-write fields
@@ -97,6 +105,7 @@ struct paca_struct {
        u8 soft_enabled;                /* irq soft-enable flag */
        u8 hard_enabled;                /* set if irqs are enabled in MSR */
        u8 io_sync;                     /* writel() needs spin_unlock sync */
+       u8 perf_counter_pending;        /* PM interrupt while soft-disabled */
 
        /* Stuff for accurate time accounting */
        u64 user_time;                  /* accumulated usermode TB ticks */