MIPS: Malta: Convert IRQ controller lock to raw spinlock.

[safe/jmp/linux-2.6] / arch / mips / mti-malta / malta-int.c

diff --git a/arch/mips/mti-malta/malta-int.c b/arch/mips/mti-malta/malta-int.c
index 377a925..2cb5ae7 100644 (file)
--- a/arch/mips/mti-malta/malta-int.c
+++ b/arch/mips/mti-malta/malta-int.c
@@ -52,7 +52,7 @@ static unsigned long _msc01_biu_base;
 static unsigned long _gcmp_base;
 static unsigned int ipi_map[NR_CPUS];
 
-static DEFINE_SPINLOCK(mips_irq_lock);
+static DEFINE_RAW_SPINLOCK(mips_irq_lock);
 
 static inline int mips_pcibios_iack(void)
 {
@@ -103,7 +103,7 @@ static inline int get_int(void)
 {
        unsigned long flags;
        int irq;
-       spin_lock_irqsave(&mips_irq_lock, flags);
+       raw_spin_lock_irqsave(&mips_irq_lock, flags);
 
        irq = mips_pcibios_iack();
 
@@ -113,7 +113,7 @@ static inline int get_int(void)
         * on an SMP system,  so leave it up to the generic code...
         */
 
-       spin_unlock_irqrestore(&mips_irq_lock, flags);
+       raw_spin_unlock_irqrestore(&mips_irq_lock, flags);
 
        return irq;
 }
@@ -411,6 +411,11 @@ static struct gic_intr_map gic_intr_map[GIC_NUM_INTRS] = {
  */
 int __init gcmp_probe(unsigned long addr, unsigned long size)
 {
+       if (mips_revision_sconid != MIPS_REVISION_SCON_ROCIT) {
+               gcmp_present = 0;
+               return gcmp_present;
+       }
+
        if (gcmp_present >= 0)
                return gcmp_present;
 
@@ -479,9 +484,14 @@ void __init arch_init_irq(void)
                GCMPGCB(GICBA) = GIC_BASE_ADDR | GCMP_GCB_GICBA_EN_MSK;
                gic_present = 1;
        } else {
-               _msc01_biu_base = (unsigned long) ioremap_nocache(MSC01_BIU_REG_BASE, MSC01_BIU_ADDRSPACE_SZ);
-               gic_present = (REG(_msc01_biu_base, MSC01_SC_CFG) &
-               MSC01_SC_CFG_GICPRES_MSK) >> MSC01_SC_CFG_GICPRES_SHF;
+               if (mips_revision_sconid == MIPS_REVISION_SCON_ROCIT) {
+                       _msc01_biu_base = (unsigned long)
+                                       ioremap_nocache(MSC01_BIU_REG_BASE,
+                                               MSC01_BIU_ADDRSPACE_SZ);
+                       gic_present = (REG(_msc01_biu_base, MSC01_SC_CFG) &
+                                       MSC01_SC_CFG_GICPRES_MSK) >>
+                                       MSC01_SC_CFG_GICPRES_SHF;
+               }
        }
        if (gic_present)
                pr_debug("GIC present\n");