[MIPS] Enable -ffunction-sections sections.

[safe/jmp/linux-2.6] / arch / mips / mips-boards / atlas / atlas_int.c

diff --git a/arch/mips/mips-boards/atlas/atlas_int.c b/arch/mips/mips-boards/atlas/atlas_int.c
index a020a3c..6fb29c3 100644 (file)
--- a/arch/mips/mips-boards/atlas/atlas_int.c
+++ b/arch/mips/mips-boards/atlas/atlas_int.c
@@ -32,6 +32,7 @@
 #include <linux/slab.h>
 #include <linux/interrupt.h>
 #include <linux/kernel_stat.h>
+#include <linux/kernel.h>
 
 #include <asm/gdb-stub.h>
 #include <asm/io.h>
@@ -62,16 +63,6 @@ void enable_atlas_irq(unsigned int irq_nr)
        iob();
 }
 
-static unsigned int startup_atlas_irq(unsigned int irq)
-{
-       enable_atlas_irq(irq);
-       return 0; /* never anything pending */
-}
-
-#define shutdown_atlas_irq     disable_atlas_irq
-
-#define mask_and_ack_atlas_irq disable_atlas_irq
-
 static void end_atlas_irq(unsigned int irq)
 {
        if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
@@ -79,12 +70,12 @@ static void end_atlas_irq(unsigned int irq)
 }
 
 static struct irq_chip atlas_irq_type = {
-       .typename = "Atlas",
-       .startup = startup_atlas_irq,
-       .shutdown = shutdown_atlas_irq,
-       .enable = enable_atlas_irq,
-       .disable = disable_atlas_irq,
-       .ack = mask_and_ack_atlas_irq,
+       .name = "Atlas",
+       .ack = disable_atlas_irq,
+       .mask = disable_atlas_irq,
+       .mask_ack = disable_atlas_irq,
+       .unmask = enable_atlas_irq,
+       .eoi = enable_atlas_irq,
        .end = end_atlas_irq,
 };
 
@@ -101,7 +92,7 @@ static inline int ls1bit32(unsigned int x)
        return b;
 }
 
-static inline void atlas_hw0_irqdispatch(struct pt_regs *regs)
+static inline void atlas_hw0_irqdispatch(void)
 {
        unsigned long int_status;
        int irq;
@@ -116,12 +107,12 @@ static inline void atlas_hw0_irqdispatch(struct pt_regs *regs)
 
        DEBUG_INT("atlas_hw0_irqdispatch: irq=%d\n", irq);
 
-       do_IRQ(irq, regs);
+       do_IRQ(irq);
 }
 
 static inline int clz(unsigned long x)
 {
-       __asm__ (
+       __asm__(
        "       .set    push                                    \n"
        "       .set    mips32                                  \n"
        "       clz     %0, %1                                  \n"
@@ -188,7 +179,7 @@ static inline unsigned int irq_ffs(unsigned int pending)
  * then we just return, if multiple IRQs are pending then we will just take
  * another exception, big deal.
  */
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+asmlinkage void plat_irq_dispatch(void)
 {
        unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
        int irq;
@@ -196,14 +187,14 @@ asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
        irq = irq_ffs(pending);
 
        if (irq == MIPSCPU_INT_ATLAS)
-               atlas_hw0_irqdispatch(regs);
+               atlas_hw0_irqdispatch();
        else if (irq >= 0)
-               do_IRQ(MIPSCPU_INT_BASE + irq, regs);
+               do_IRQ(MIPS_CPU_IRQ_BASE + irq);
        else
-               spurious_interrupt(regs);
+               spurious_interrupt();
 }
 
-static inline void init_atlas_irqs (int base)
+static inline void init_atlas_irqs(int base)
 {
        int i;
 
@@ -217,13 +208,8 @@ static inline void init_atlas_irqs (int base)
         */
        atlas_hw0_icregs->intrsten = 0xffffffff;
 
-       for (i = ATLAS_INT_BASE; i <= ATLAS_INT_END; i++) {
-               irq_desc[i].status      = IRQ_DISABLED;
-               irq_desc[i].action      = 0;
-               irq_desc[i].depth       = 1;
-               irq_desc[i].chip        = &atlas_irq_type;
-               spin_lock_init(&irq_desc[i].lock);
-       }
+       for (i = ATLAS_INT_BASE; i <= ATLAS_INT_END; i++)
+               set_irq_chip_and_handler(i, &atlas_irq_type, handle_level_irq);
 }
 
 static struct irqaction atlasirq = {
@@ -235,7 +221,7 @@ msc_irqmap_t __initdata msc_irqmap[] = {
        {MSC01C_INT_TMR,                MSC01_IRQ_EDGE, 0},
        {MSC01C_INT_PCI,                MSC01_IRQ_LEVEL, 0},
 };
-int __initdata msc_nr_irqs = sizeof(msc_irqmap) / sizeof(*msc_irqmap);
+int __initdata msc_nr_irqs = ARRAY_SIZE(msc_irqmap);
 
 msc_irqmap_t __initdata msc_eicirqmap[] = {
        {MSC01E_INT_SW0,                MSC01_IRQ_LEVEL, 0},
@@ -246,41 +232,41 @@ msc_irqmap_t __initdata msc_eicirqmap[] = {
        {MSC01E_INT_PERFCTR,            MSC01_IRQ_LEVEL, 0},
        {MSC01E_INT_CPUCTR,             MSC01_IRQ_LEVEL, 0}
 };
-int __initdata msc_nr_eicirqs = sizeof(msc_eicirqmap) / sizeof(*msc_eicirqmap);
+int __initdata msc_nr_eicirqs = ARRAY_SIZE(msc_eicirqmap);
 
 void __init arch_init_irq(void)
 {
        init_atlas_irqs(ATLAS_INT_BASE);
 
        if (!cpu_has_veic)
-               mips_cpu_irq_init(MIPSCPU_INT_BASE);
+               mips_cpu_irq_init();
 
        switch(mips_revision_corid) {
        case MIPS_REVISION_CORID_CORE_MSC:
        case MIPS_REVISION_CORID_CORE_FPGA2:
        case MIPS_REVISION_CORID_CORE_FPGA3:
+       case MIPS_REVISION_CORID_CORE_FPGA4:
        case MIPS_REVISION_CORID_CORE_24K:
        case MIPS_REVISION_CORID_CORE_EMUL_MSC:
                if (cpu_has_veic)
-                       init_msc_irqs (MSC01E_INT_BASE,
-                                      msc_eicirqmap, msc_nr_eicirqs);
+                       init_msc_irqs(MSC01E_INT_BASE, MSC01E_INT_BASE,
+                                     msc_eicirqmap, msc_nr_eicirqs);
                else
-                       init_msc_irqs (MSC01C_INT_BASE,
-                                      msc_irqmap, msc_nr_irqs);
+                       init_msc_irqs(MSC01E_INT_BASE, MSC01C_INT_BASE,
+                                     msc_irqmap, msc_nr_irqs);
        }
 
-
        if (cpu_has_veic) {
-               set_vi_handler (MSC01E_INT_ATLAS, atlas_hw0_irqdispatch);
-               setup_irq (MSC01E_INT_BASE + MSC01E_INT_ATLAS, &atlasirq);
+               set_vi_handler(MSC01E_INT_ATLAS, atlas_hw0_irqdispatch);
+               setup_irq(MSC01E_INT_BASE + MSC01E_INT_ATLAS, &atlasirq);
        } else if (cpu_has_vint) {
-               set_vi_handler (MIPSCPU_INT_ATLAS, atlas_hw0_irqdispatch);
+               set_vi_handler(MIPSCPU_INT_ATLAS, atlas_hw0_irqdispatch);
 #ifdef CONFIG_MIPS_MT_SMTC
-               setup_irq_smtc (MIPSCPU_INT_BASE + MIPSCPU_INT_ATLAS,
-                               &atlasirq, (0x100 << MIPSCPU_INT_ATLAS));
+               setup_irq_smtc(MIPS_CPU_IRQ_BASE + MIPSCPU_INT_ATLAS,
+                              &atlasirq, (0x100 << MIPSCPU_INT_ATLAS));
 #else /* Not SMTC */
-               setup_irq(MIPSCPU_INT_BASE + MIPSCPU_INT_ATLAS, &atlasirq);
+               setup_irq(MIPS_CPU_IRQ_BASE + MIPSCPU_INT_ATLAS, &atlasirq);
 #endif /* CONFIG_MIPS_MT_SMTC */
        } else
-               setup_irq(MIPSCPU_INT_BASE + MIPSCPU_INT_ATLAS, &atlasirq);
+               setup_irq(MIPS_CPU_IRQ_BASE + MIPSCPU_INT_ATLAS, &atlasirq);
 }