AMD IOMMU: implement lazy IO/TLB flushing

[safe/jmp/linux-2.6] / arch / mips / kernel / proc.c

diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
index efd2d13..36f0653 100644 (file)
--- a/arch/mips/kernel/proc.c
+++ b/arch/mips/kernel/proc.c
@@ -60,6 +60,9 @@ static int show_cpuinfo(struct seq_file *m, void *v)
                      cpu_has_dsp ? " dsp" : "",
                      cpu_has_mipsmt ? " mt" : ""
                );
+       seq_printf(m, "shadow register sets\t: %d\n",
+                      cpu_data[n].srsets);
+       seq_printf(m, "core\t\t\t: %d\n", cpu_data[n].core);
 
        sprintf(fmt, "VCE%%c exceptions\t\t: %s\n",
                cpu_has_vce ? "%u" : "not available");
@@ -87,7 +90,7 @@ static void c_stop(struct seq_file *m, void *v)
 {
 }
 
-struct seq_operations cpuinfo_op = {
+const struct seq_operations cpuinfo_op = {
        .start  = c_start,
        .next   = c_next,
        .stop   = c_stop,