Merge branch 'linus' into cont_syslog

[safe/jmp/linux-2.6] / arch / mips / include / asm / mipsregs.h

diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index edda1da..c6e3c93 100644 (file)
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -135,6 +135,12 @@
 #define FPU_CSR_COND7   0x80000000      /* $fcc7 */
 
 /*
+ * Bits 18 - 20 of the FPU Status Register will be read as 0,
+ * and should be written as zero.
+ */
+#define FPU_CSR_RSVD   0x001c0000
+
+/*
  * X the exception cause indicator
  * E the exception enable
  * S the sticky/flag bit
@@ -161,7 +167,8 @@
 #define FPU_CSR_UDF_S   0x00000008
 #define FPU_CSR_INE_S   0x00000004
 
-/* rounding mode */
+/* Bits 0 and 1 of FPU Status Register specify the rounding mode */
+#define FPU_CSR_RM     0x00000003
 #define FPU_CSR_RN      0x0     /* nearest */
 #define FPU_CSR_RZ      0x1     /* towards zero */
 #define FPU_CSR_RU      0x2     /* towards +Infinity */
@@ -251,6 +258,14 @@
 #define PL_256M                28
 
 /*
+ * PageGrain bits
+ */
+#define PG_RIE         (_ULCAST_(1) <<  31)
+#define PG_XIE         (_ULCAST_(1) <<  30)
+#define PG_ELPA                (_ULCAST_(1) <<  29)
+#define PG_ESP         (_ULCAST_(1) <<  28)
+
+/*
  * R4x00 interrupt enable / cause bits
  */
 #define IE_SW0          (_ULCAST_(1) <<  8)
@@ -830,6 +845,9 @@ do {                                                                        \
 #define read_c0_pagemask()     __read_32bit_c0_register($5, 0)
 #define write_c0_pagemask(val) __write_32bit_c0_register($5, 0, val)
 
+#define read_c0_pagegrain()    __read_32bit_c0_register($5, 1)
+#define write_c0_pagegrain(val)        __write_32bit_c0_register($5, 1, val)
+
 #define read_c0_wired()                __read_32bit_c0_register($6, 0)
 #define write_c0_wired(val)    __write_32bit_c0_register($6, 0, val)