[ARM] pxa: remove spi cs gpio direction to avoid clash with driver

[safe/jmp/linux-2.6] / arch / mips / dec / kn01-berr.c

diff --git a/arch/mips/dec/kn01-berr.c b/arch/mips/dec/kn01-berr.c
index b9271db..94d23b4 100644 (file)
--- a/arch/mips/dec/kn01-berr.c
+++ b/arch/mips/dec/kn01-berr.c
@@ -1,6 +1,4 @@
 /*
- *     linux/arch/mips/dec/kn01-berr.c
- *
  *     Bus error event handling code for DECstation/DECsystem 3100
  *     and 2100 (KN01) systems equipped with parity error detection
  *     logic.
@@ -20,8 +18,10 @@
 #include <linux/types.h>
 
 #include <asm/inst.h>
+#include <asm/irq_regs.h>
 #include <asm/mipsregs.h>
 #include <asm/page.h>
+#include <asm/ptrace.h>
 #include <asm/system.h>
 #include <asm/traps.h>
 #include <asm/uaccess.h>
@@ -46,7 +46,7 @@
  * There is no default value -- it has to be initialized.
  */
 u16 cached_kn01_csr;
-DEFINE_SPINLOCK(kn01_lock);
+static DEFINE_RAW_SPINLOCK(kn01_lock);
 
 
 static inline void dec_kn01_be_ack(void)
@@ -54,12 +54,12 @@ static inline void dec_kn01_be_ack(void)
        volatile u16 *csr = (void *)CKSEG1ADDR(KN01_SLOT_BASE + KN01_CSR);
        unsigned long flags;
 
-       spin_lock_irqsave(&kn01_lock, flags);
+       raw_spin_lock_irqsave(&kn01_lock, flags);
 
        *csr = cached_kn01_csr | KN01_CSR_MEMERR;       /* Clear bus IRQ. */
        iob();
 
-       spin_unlock_irqrestore(&kn01_lock, flags);
+       raw_spin_unlock_irqrestore(&kn01_lock, flags);
 }
 
 static int dec_kn01_be_backend(struct pt_regs *regs, int is_fixup, int invoker)
@@ -150,10 +150,10 @@ int dec_kn01_be_handler(struct pt_regs *regs, int is_fixup)
        return dec_kn01_be_backend(regs, is_fixup, 0);
 }
 
-irqreturn_t dec_kn01_be_interrupt(int irq, void *dev_id,
-                                   struct pt_regs *regs)
+irqreturn_t dec_kn01_be_interrupt(int irq, void *dev_id)
 {
        volatile u16 *csr = (void *)CKSEG1ADDR(KN01_SLOT_BASE + KN01_CSR);
+       struct pt_regs *regs = get_irq_regs();
        int action;
 
        if (!(*csr & KN01_CSR_MEMERR))
@@ -182,7 +182,7 @@ void __init dec_kn01_be_init(void)
        volatile u16 *csr = (void *)CKSEG1ADDR(KN01_SLOT_BASE + KN01_CSR);
        unsigned long flags;
 
-       spin_lock_irqsave(&kn01_lock, flags);
+       raw_spin_lock_irqsave(&kn01_lock, flags);
 
        /* Preset write-only bits of the Control Register cache. */
        cached_kn01_csr = *csr;
@@ -194,7 +194,7 @@ void __init dec_kn01_be_init(void)
        *csr = cached_kn01_csr;
        iob();
 
-       spin_unlock_irqrestore(&kn01_lock, flags);
+       raw_spin_unlock_irqrestore(&kn01_lock, flags);
 
        /* Clear any leftover errors from the firmware. */
        dec_kn01_be_ack();