MIPS: Add support for Texas Instruments AR7 System-on-a-Chip
[safe/jmp/linux-2.6] / arch / mips / Makefile
index 28c55f6..861da51 100644 (file)
@@ -14,8 +14,6 @@
 
 KBUILD_DEFCONFIG := ip22_defconfig
 
-cflags-y := -ffunction-sections
-
 #
 # Select the object file format to substitute into the linker script.
 #
@@ -50,6 +48,9 @@ ifneq ($(SUBARCH),$(ARCH))
   endif
 endif
 
+cflags-y := -ffunction-sections
+cflags-y += $(call cc-option, -mno-check-zero-division)
+
 ifdef CONFIG_32BIT
 ld-emul                        = $(32bit-emul)
 vmlinux-32             = vmlinux
@@ -144,6 +145,10 @@ cflags-$(CONFIG_CPU_SB1)   += $(call cc-option,-march=sb1,-march=r5000) \
 cflags-$(CONFIG_CPU_R8000)     += -march=r8000 -Wa,--trap
 cflags-$(CONFIG_CPU_R10000)    += $(call cc-option,-march=r10000,-march=r8000) \
                        -Wa,--trap
+cflags-$(CONFIG_CPU_CAVIUM_OCTEON) += $(call cc-option,-march=octeon) -Wa,--trap
+ifeq (,$(findstring march=octeon, $(cflags-$(CONFIG_CPU_CAVIUM_OCTEON))))
+cflags-$(CONFIG_CPU_CAVIUM_OCTEON) += -Wa,-march=octeon
+endif
 
 cflags-$(CONFIG_CPU_R4000_WORKAROUNDS) += $(call cc-option,-mfix-r4000,)
 cflags-$(CONFIG_CPU_R4400_WORKAROUNDS) += $(call cc-option,-mfix-r4400,)
@@ -162,13 +167,19 @@ libs-$(CONFIG_ARC)                += arch/mips/fw/arc/
 libs-$(CONFIG_CFE)             += arch/mips/fw/cfe/
 libs-$(CONFIG_SNIPROM)         += arch/mips/fw/sni/
 libs-y                         += arch/mips/fw/lib/
-libs-$(CONFIG_SIBYTE_CFE)      += arch/mips/sibyte/cfe/
 
 #
 # Board-dependent options and extra files
 #
 
 #
+# Texas Instruments AR7
+#
+core-$(CONFIG_AR7)             += arch/mips/ar7/
+cflags-$(CONFIG_AR7)           += -I$(srctree)/arch/mips/include/asm/mach-ar7
+load-$(CONFIG_AR7)             += 0xffffffff94100000
+
+#
 # Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
 #
 core-$(CONFIG_MACH_JAZZ)       += arch/mips/jazz/
@@ -179,89 +190,88 @@ load-$(CONFIG_MACH_JAZZ)  += 0xffffffff80080000
 # Common Alchemy Au1x00 stuff
 #
 core-$(CONFIG_SOC_AU1X00)      += arch/mips/alchemy/common/
-cflags-$(CONFIG_SOC_AU1X00)    += -I$(srctree)/arch/mips/include/asm/mach-au1x00
 
 #
 # AMD Alchemy Pb1000 eval board
 #
-libs-$(CONFIG_MIPS_PB1000)     += arch/mips/alchemy/pb1000/
+core-$(CONFIG_MIPS_PB1000)     += arch/mips/alchemy/devboards/
 cflags-$(CONFIG_MIPS_PB1000)   += -I$(srctree)/arch/mips/include/asm/mach-pb1x00
 load-$(CONFIG_MIPS_PB1000)     += 0xffffffff80100000
 
 #
 # AMD Alchemy Pb1100 eval board
 #
-libs-$(CONFIG_MIPS_PB1100)     += arch/mips/alchemy/pb1100/
+core-$(CONFIG_MIPS_PB1100)     += arch/mips/alchemy/devboards/
 cflags-$(CONFIG_MIPS_PB1100)   += -I$(srctree)/arch/mips/include/asm/mach-pb1x00
 load-$(CONFIG_MIPS_PB1100)     += 0xffffffff80100000
 
 #
 # AMD Alchemy Pb1500 eval board
 #
-libs-$(CONFIG_MIPS_PB1500)     += arch/mips/alchemy/pb1500/
+core-$(CONFIG_MIPS_PB1500)     += arch/mips/alchemy/devboards/
 cflags-$(CONFIG_MIPS_PB1500)   += -I$(srctree)/arch/mips/include/asm/mach-pb1x00
 load-$(CONFIG_MIPS_PB1500)     += 0xffffffff80100000
 
 #
 # AMD Alchemy Pb1550 eval board
 #
-libs-$(CONFIG_MIPS_PB1550)     += arch/mips/alchemy/pb1550/
+core-$(CONFIG_MIPS_PB1550)     += arch/mips/alchemy/devboards/
 cflags-$(CONFIG_MIPS_PB1550)   += -I$(srctree)/arch/mips/include/asm/mach-pb1x00
 load-$(CONFIG_MIPS_PB1550)     += 0xffffffff80100000
 
 #
 # AMD Alchemy Pb1200 eval board
 #
-libs-$(CONFIG_MIPS_PB1200)     += arch/mips/alchemy/pb1200/
+core-$(CONFIG_MIPS_PB1200)     += arch/mips/alchemy/devboards/
 cflags-$(CONFIG_MIPS_PB1200)   += -I$(srctree)/arch/mips/include/asm/mach-pb1x00
 load-$(CONFIG_MIPS_PB1200)     += 0xffffffff80100000
 
 #
 # AMD Alchemy Db1000 eval board
 #
-libs-$(CONFIG_MIPS_DB1000)     += arch/mips/alchemy/db1x00/
+core-$(CONFIG_MIPS_DB1000)     += arch/mips/alchemy/devboards/
 cflags-$(CONFIG_MIPS_DB1000)   += -I$(srctree)/arch/mips/include/asm/mach-db1x00
 load-$(CONFIG_MIPS_DB1000)     += 0xffffffff80100000
 
 #
 # AMD Alchemy Db1100 eval board
 #
-libs-$(CONFIG_MIPS_DB1100)     += arch/mips/alchemy/db1x00/
+core-$(CONFIG_MIPS_DB1100)     += arch/mips/alchemy/devboards/
 cflags-$(CONFIG_MIPS_DB1100)   += -I$(srctree)/arch/mips/include/asm/mach-db1x00
 load-$(CONFIG_MIPS_DB1100)     += 0xffffffff80100000
 
 #
 # AMD Alchemy Db1500 eval board
 #
-libs-$(CONFIG_MIPS_DB1500)     += arch/mips/alchemy/db1x00/
+core-$(CONFIG_MIPS_DB1500)     += arch/mips/alchemy/devboards/
 cflags-$(CONFIG_MIPS_DB1500)   += -I$(srctree)/arch/mips/include/asm/mach-db1x00
 load-$(CONFIG_MIPS_DB1500)     += 0xffffffff80100000
 
 #
 # AMD Alchemy Db1550 eval board
 #
-libs-$(CONFIG_MIPS_DB1550)     += arch/mips/alchemy/db1x00/
+core-$(CONFIG_MIPS_DB1550)     += arch/mips/alchemy/devboards/
 cflags-$(CONFIG_MIPS_DB1550)   += -I$(srctree)/arch/mips/include/asm/mach-db1x00
 load-$(CONFIG_MIPS_DB1550)     += 0xffffffff80100000
 
 #
 # AMD Alchemy Db1200 eval board
 #
-libs-$(CONFIG_MIPS_DB1200)     += arch/mips/alchemy/pb1200/
+core-$(CONFIG_MIPS_DB1200)     += arch/mips/alchemy/devboards/
 cflags-$(CONFIG_MIPS_DB1200)   += -I$(srctree)/arch/mips/include/asm/mach-db1x00
 load-$(CONFIG_MIPS_DB1200)     += 0xffffffff80100000
 
 #
 # AMD Alchemy Bosporus eval board
 #
-libs-$(CONFIG_MIPS_BOSPORUS)   += arch/mips/alchemy/db1x00/
+core-$(CONFIG_MIPS_BOSPORUS)   += arch/mips/alchemy/devboards/
 cflags-$(CONFIG_MIPS_BOSPORUS) += -I$(srctree)/arch/mips/include/asm/mach-db1x00
 load-$(CONFIG_MIPS_BOSPORUS)   += 0xffffffff80100000
 
 #
 # AMD Alchemy Mirage eval board
 #
-libs-$(CONFIG_MIPS_MIRAGE)     += arch/mips/alchemy/db1x00/
+core-$(CONFIG_MIPS_MIRAGE)     += arch/mips/alchemy/devboards/
 cflags-$(CONFIG_MIPS_MIRAGE)   += -I$(srctree)/arch/mips/include/asm/mach-db1x00
 load-$(CONFIG_MIPS_MIRAGE)     += 0xffffffff80100000
 
@@ -277,6 +287,10 @@ load-$(CONFIG_MIPS_MTX1)   += 0xffffffff80100000
 libs-$(CONFIG_MIPS_XXS1500)    += arch/mips/alchemy/xxs1500/
 load-$(CONFIG_MIPS_XXS1500)    += 0xffffffff80100000
 
+# must be last for Alchemy systems for GPIO to work properly
+cflags-$(CONFIG_SOC_AU1X00)    += -I$(srctree)/arch/mips/include/asm/mach-au1x00
+
+
 #
 # Cobalt Server
 #
@@ -412,7 +426,7 @@ load-$(CONFIG_PNX8550_STB810)       += 0xffffffff80060000
 #
 # Common NEC EMMAXXX
 #
-core-$(CONFIG_SOC_EMMA)                += arch/mips/emma/common/
+core-$(CONFIG_SOC_EMMA2RH)     += arch/mips/emma/common/
 cflags-$(CONFIG_SOC_EMMA2RH)   += -I$(srctree)/arch/mips/include/asm/mach-emma2rh
 
 #
@@ -468,12 +482,12 @@ endif
 # Simplified: what IP22 does at 128MB+ in ksegN, IP28 does at 512MB+ in xkphys
 #
 ifdef CONFIG_SGI_IP28
-  ifeq ($(call cc-option-yn,-mr10k-cache-barrier=1), n)
-      $(error gcc doesn't support needed option -mr10k-cache-barrier=1)
+  ifeq ($(call cc-option-yn,-mr10k-cache-barrier=store), n)
+      $(error gcc doesn't support needed option -mr10k-cache-barrier=store)
   endif
 endif
 core-$(CONFIG_SGI_IP28)                += arch/mips/sgi-ip22/
-cflags-$(CONFIG_SGI_IP28)      += -mr10k-cache-barrier=1 -I$(srctree)/arch/mips/include/asm/mach-ip28
+cflags-$(CONFIG_SGI_IP28)      += -mr10k-cache-barrier=store -I$(srctree)/arch/mips/include/asm/mach-ip28
 load-$(CONFIG_SGI_IP28)                += 0xa800000020004000
 
 #
@@ -586,6 +600,18 @@ core-$(CONFIG_TOSHIBA_RBTX4927)    += arch/mips/txx9/rbtx4927/
 core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/txx9/rbtx4938/
 core-$(CONFIG_TOSHIBA_RBTX4939) += arch/mips/txx9/rbtx4939/
 
+#
+# Cavium Octeon
+#
+core-$(CONFIG_CPU_CAVIUM_OCTEON)       += arch/mips/cavium-octeon/
+cflags-$(CONFIG_CPU_CAVIUM_OCTEON)     += -I$(srctree)/arch/mips/include/asm/mach-cavium-octeon
+core-$(CONFIG_CPU_CAVIUM_OCTEON)       += arch/mips/cavium-octeon/executive/
+ifdef CONFIG_CAVIUM_OCTEON_2ND_KERNEL
+load-$(CONFIG_CPU_CAVIUM_OCTEON)       += 0xffffffff84100000
+else
+load-$(CONFIG_CPU_CAVIUM_OCTEON)       += 0xffffffff81100000
+endif
+
 cflags-y                       += -I$(srctree)/arch/mips/include/asm/mach-generic
 drivers-$(CONFIG_PCI)          += arch/mips/pci/
 
@@ -658,6 +684,9 @@ core-y                      += arch/mips/kernel/ arch/mips/mm/ arch/mips/math-emu/
 
 drivers-$(CONFIG_OPROFILE)     += arch/mips/oprofile/
 
+# suspend and hibernation support
+drivers-$(CONFIG_PM)   += arch/mips/power/
+
 ifdef CONFIG_LASAT
 rom.bin rom.sw: vmlinux
        $(Q)$(MAKE) $(build)=arch/mips/lasat/image $@
@@ -704,11 +733,17 @@ ifdef CONFIG_MIPS32_O32
        $(Q)$(MAKE) $(build)=. missing-syscalls EXTRA_CFLAGS="-mabi=32"
 endif
 
+install:
+       $(Q)install -D -m 755 vmlinux $(INSTALL_PATH)/vmlinux-$(KERNELRELEASE)
+       $(Q)install -D -m 644 .config $(INSTALL_PATH)/config-$(KERNELRELEASE)
+       $(Q)install -D -m 644 System.map $(INSTALL_PATH)/System.map-$(KERNELRELEASE)
+
 archclean:
        @$(MAKE) $(clean)=arch/mips/boot
        @$(MAKE) $(clean)=arch/mips/lasat
 
 define archhelp
+       echo '  install              - install kernel into $(INSTALL_PATH)'
        echo '  vmlinux.ecoff        - ECOFF boot image'
        echo '  vmlinux.bin          - Raw binary boot image'
        echo '  vmlinux.srec         - SREC boot image'