MIPS: Loongson 2F: Add suspend support framework
[safe/jmp/linux-2.6] / arch / mips / Kconfig
index 998e5db..e2116b1 100644 (file)
@@ -1,12 +1,13 @@
 config MIPS
        bool
        default y
+       select HAVE_GENERIC_DMA_COHERENT
        select HAVE_IDE
        select HAVE_OPROFILE
        select HAVE_ARCH_KGDB
        # Horrible source of confusion.  Die, die, die ...
        select EMBEDDED
-       select RTC_LIB
+       select RTC_LIB if !MACH_LOONGSON
 
 mainmenu "Linux/MIPS Kernel Configuration"
 
@@ -21,6 +22,28 @@ choice
 
 config MACH_ALCHEMY
        bool "Alchemy processor based machines"
+       select SYS_SUPPORTS_ZBOOT
+
+config AR7
+       bool "Texas Instruments AR7"
+       select BOOT_ELF32
+       select DMA_NONCOHERENT
+       select CEVT_R4K
+       select CSRC_R4K
+       select IRQ_CPU
+       select NO_EXCEPT_FILL
+       select SWAP_IO_SPACE
+       select SYS_HAS_CPU_MIPS32_R1
+       select SYS_HAS_EARLY_PRINTK
+       select SYS_SUPPORTS_32BIT_KERNEL
+       select SYS_SUPPORTS_LITTLE_ENDIAN
+       select SYS_SUPPORTS_ZBOOT_UART16550
+       select GENERIC_GPIO
+       select GCD
+       select VLYNQ
+       help
+         Support for the Texas Instruments AR7 System-on-a-Chip
+         family: TNETD7100, 7200 and 7300.
 
 config BASLER_EXCITE
        bool "Basler eXcite smart camera"
@@ -60,6 +83,21 @@ config BCM47XX
        help
         Support for BCM47XX based boards
 
+config BCM63XX
+       bool "Broadcom BCM63XX based boards"
+       select CEVT_R4K
+       select CSRC_R4K
+       select DMA_NONCOHERENT
+       select IRQ_CPU
+       select SYS_HAS_CPU_MIPS32_R1
+       select SYS_SUPPORTS_32BIT_KERNEL
+       select SYS_SUPPORTS_BIG_ENDIAN
+       select SYS_HAS_EARLY_PRINTK
+       select SWAP_IO_SPACE
+       select ARCH_REQUIRE_GPIOLIB
+       help
+        Support for BCM63XX based boards
+
 config MIPS_COBALT
        bool "Cobalt Server"
        select CEVT_R4K
@@ -72,6 +110,7 @@ config MIPS_COBALT
        select IRQ_CPU
        select IRQ_GT641XX
        select PCI_GT64XXX_PCI0
+       select PCI
        select SYS_HAS_CPU_NEVADA
        select SYS_HAS_EARLY_PRINTK
        select SYS_SUPPORTS_32BIT_KERNEL
@@ -153,30 +192,16 @@ config LASAT
        select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
        select SYS_SUPPORTS_LITTLE_ENDIAN
 
-config LEMOTE_FULONG
-       bool "Lemote Fulong mini-PC"
-       select ARCH_SPARSEMEM_ENABLE
-       select CEVT_R4K
-       select CSRC_R4K
-       select SYS_HAS_CPU_LOONGSON2
-       select DMA_NONCOHERENT
-       select BOOT_ELF32
-       select BOARD_SCACHE
-       select HAVE_STD_PC_SERIAL_PORT
-       select HW_HAS_PCI
-       select I8259
-       select ISA
-       select IRQ_CPU
-       select SYS_SUPPORTS_32BIT_KERNEL
-       select SYS_SUPPORTS_64BIT_KERNEL
-       select SYS_SUPPORTS_LITTLE_ENDIAN
-       select SYS_SUPPORTS_HIGHMEM
-       select SYS_HAS_EARLY_PRINTK
-       select GENERIC_ISA_DMA_SUPPORT_BROKEN
-       select CPU_HAS_WB
+config MACH_LOONGSON
+       bool "Loongson family of machines"
+       select SYS_SUPPORTS_ZBOOT_UART16550
        help
-         Lemote Fulong mini-PC board based on the Chinese Loongson-2E CPU and
-         an FPGA northbridge
+         This enables the support of Loongson family of machines.
+
+         Loongson is a family of general-purpose MIPS-compatible CPUs.
+         developed at Institute of Computing Technology (ICT),
+         Chinese Academy of Sciences (CAS) in the People's Republic
+         of China. The chief architect is Professor Weiwu Hu.
 
 config MIPS_MALTA
        bool "MIPS Malta board"
@@ -208,9 +233,10 @@ config MIPS_MALTA
        select SYS_SUPPORTS_64BIT_KERNEL
        select SYS_SUPPORTS_BIG_ENDIAN
        select SYS_SUPPORTS_LITTLE_ENDIAN
-       select SYS_SUPPORTS_MIPS_CMP if BROKEN  # because SYNC_R4K is broken
+       select SYS_SUPPORTS_MIPS_CMP
        select SYS_SUPPORTS_MULTITHREADING
        select SYS_SUPPORTS_SMARTMIPS
+       select SYS_SUPPORTS_ZBOOT
        help
          This enables support for the MIPS Technologies Malta evaluation
          board.
@@ -246,6 +272,7 @@ config MACH_VR41XX
        select CEVT_R4K
        select CSRC_R4K
        select SYS_HAS_CPU_VR41XX
+       select ARCH_REQUIRE_GPIOLIB
 
 config NXP_STB220
        bool "NXP STB220 board"
@@ -335,7 +362,14 @@ config SGI_IP22
        select SWAP_IO_SPACE
        select SYS_HAS_CPU_R4X00
        select SYS_HAS_CPU_R5000
-       select SYS_HAS_EARLY_PRINTK
+       #
+       # Disable EARLY_PRINTK for now since it leads to overwritten prom
+       # memory during early boot on some machines.
+       #
+       # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
+       # for a more details discussion
+       #
+       # select SYS_HAS_EARLY_PRINTK
        select SYS_SUPPORTS_32BIT_KERNEL
        select SYS_SUPPORTS_64BIT_KERNEL
        select SYS_SUPPORTS_BIG_ENDIAN
@@ -387,7 +421,14 @@ config SGI_IP28
        select SGI_HAS_ZILOG
        select SWAP_IO_SPACE
        select SYS_HAS_CPU_R10000
-       select SYS_HAS_EARLY_PRINTK
+       #
+       # Disable EARLY_PRINTK for now since it leads to overwritten prom
+       # memory during early boot on some machines.
+       #
+       # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
+       # for a more details discussion
+       #
+       # select SYS_HAS_EARLY_PRINTK
        select SYS_SUPPORTS_64BIT_KERNEL
        select SYS_SUPPORTS_BIG_ENDIAN
       help
@@ -593,13 +634,14 @@ config WR_PPMC
          board, which is based on GT64120 bridge chip.
 
 config CAVIUM_OCTEON_SIMULATOR
-       bool "Support for the Cavium Networks Octeon Simulator"
+       bool "Cavium Networks Octeon Simulator"
        select CEVT_R4K
        select 64BIT_PHYS_ADDR
        select DMA_COHERENT
        select SYS_SUPPORTS_64BIT_KERNEL
        select SYS_SUPPORTS_BIG_ENDIAN
        select SYS_SUPPORTS_HIGHMEM
+       select SYS_SUPPORTS_HOTPLUG_CPU
        select SYS_HAS_CPU_CAVIUM_OCTEON
        help
          The Octeon simulator is software performance model of the Cavium
@@ -607,16 +649,19 @@ config CAVIUM_OCTEON_SIMULATOR
          hardware.
 
 config CAVIUM_OCTEON_REFERENCE_BOARD
-       bool "Support for the Cavium Networks Octeon reference board"
+       bool "Cavium Networks Octeon reference board"
        select CEVT_R4K
        select 64BIT_PHYS_ADDR
        select DMA_COHERENT
        select SYS_SUPPORTS_64BIT_KERNEL
        select SYS_SUPPORTS_BIG_ENDIAN
        select SYS_SUPPORTS_HIGHMEM
+       select SYS_SUPPORTS_HOTPLUG_CPU
        select SYS_HAS_EARLY_PRINTK
        select SYS_HAS_CPU_CAVIUM_OCTEON
        select SWAP_IO_SPACE
+       select HW_HAS_PCI
+       select ARCH_SUPPORTS_MSI
        help
          This option supports all of the Octeon reference boards from Cavium
          Networks. It builds a kernel that dynamically determines the Octeon
@@ -634,6 +679,7 @@ endchoice
 
 source "arch/mips/alchemy/Kconfig"
 source "arch/mips/basler/excite/Kconfig"
+source "arch/mips/bcm63xx/Kconfig"
 source "arch/mips/jazz/Kconfig"
 source "arch/mips/lasat/Kconfig"
 source "arch/mips/pmc-sierra/Kconfig"
@@ -642,6 +688,7 @@ source "arch/mips/sibyte/Kconfig"
 source "arch/mips/txx9/Kconfig"
 source "arch/mips/vr41xx/Kconfig"
 source "arch/mips/cavium-octeon/Kconfig"
+source "arch/mips/loongson/Kconfig"
 
 endmenu
 
@@ -781,8 +828,17 @@ config SYS_HAS_EARLY_PRINTK
        bool
 
 config HOTPLUG_CPU
+       bool "Support for hot-pluggable CPUs"
+       depends on SMP && HOTPLUG && SYS_SUPPORTS_HOTPLUG_CPU
+       help
+         Say Y here to allow turning CPUs off and on. CPUs can be
+         controlled through /sys/devices/system/cpu.
+         (Note: power management support will enable this option
+           automatically on SMP systems. )
+         Say N if you want to disable CPU hotplug.
+
+config SYS_SUPPORTS_HOTPLUG_CPU
        bool
-       default n
 
 config I8259
        bool
@@ -850,6 +906,11 @@ config SYS_SUPPORTS_BIG_ENDIAN
 config SYS_SUPPORTS_LITTLE_ENDIAN
        bool
 
+config SYS_SUPPORTS_HUGETLBFS
+       bool
+       depends on CPU_SUPPORTS_HUGEPAGES && 64BIT
+       default y
+
 config IRQ_CPU
        bool
 
@@ -970,9 +1031,9 @@ config BOOT_ELF32
 
 config MIPS_L1_CACHE_SHIFT
        int
-       default "4" if MACH_DECSTATION || MIKROTIK_RB532
+       default "4" if MACH_DECSTATION || MIKROTIK_RB532 || PMC_MSP4200_EVAL
+       default "6" if MIPS_CPU_SCACHE
        default "7" if SGI_IP22 || SGI_IP27 || SGI_IP28 || SNI_RM || CPU_CAVIUM_OCTEON
-       default "4" if PMC_MSP4200_EVAL
        default "5"
 
 config HAVE_STD_PC_SERIAL_PORT
@@ -1004,20 +1065,32 @@ choice
        prompt "CPU type"
        default CPU_R4X00
 
-config CPU_LOONGSON2
-       bool "Loongson 2"
-       depends on SYS_HAS_CPU_LOONGSON2
-       select CPU_SUPPORTS_32BIT_KERNEL
-       select CPU_SUPPORTS_64BIT_KERNEL
-       select CPU_SUPPORTS_HIGHMEM
+config CPU_LOONGSON2E
+       bool "Loongson 2E"
+       depends on SYS_HAS_CPU_LOONGSON2E
+       select CPU_LOONGSON2
        help
          The Loongson 2E processor implements the MIPS III instruction set
          with many extensions.
 
+         It has an internal FPGA northbridge, which is compatiable to
+         bonito64.
+
+config CPU_LOONGSON2F
+       bool "Loongson 2F"
+       depends on SYS_HAS_CPU_LOONGSON2F
+       select CPU_LOONGSON2
+       help
+         The Loongson 2F processor implements the MIPS III instruction set
+         with many extensions.
+
+         Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
+         have a similar programming interface with FPGA northbridge used in
+         Loongson2E.
+
 config CPU_MIPS32_R1
        bool "MIPS32 Release 1"
        depends on SYS_HAS_CPU_MIPS32_R1
-       select CPU_HAS_LLSC
        select CPU_HAS_PREFETCH
        select CPU_SUPPORTS_32BIT_KERNEL
        select CPU_SUPPORTS_HIGHMEM
@@ -1035,7 +1108,6 @@ config CPU_MIPS32_R1
 config CPU_MIPS32_R2
        bool "MIPS32 Release 2"
        depends on SYS_HAS_CPU_MIPS32_R2
-       select CPU_HAS_LLSC
        select CPU_HAS_PREFETCH
        select CPU_SUPPORTS_32BIT_KERNEL
        select CPU_SUPPORTS_HIGHMEM
@@ -1049,11 +1121,11 @@ config CPU_MIPS32_R2
 config CPU_MIPS64_R1
        bool "MIPS64 Release 1"
        depends on SYS_HAS_CPU_MIPS64_R1
-       select CPU_HAS_LLSC
        select CPU_HAS_PREFETCH
        select CPU_SUPPORTS_32BIT_KERNEL
        select CPU_SUPPORTS_64BIT_KERNEL
        select CPU_SUPPORTS_HIGHMEM
+       select CPU_SUPPORTS_HUGEPAGES
        help
          Choose this option to build a kernel for release 1 or later of the
          MIPS64 architecture.  Many modern embedded systems with a 64-bit
@@ -1068,11 +1140,11 @@ config CPU_MIPS64_R1
 config CPU_MIPS64_R2
        bool "MIPS64 Release 2"
        depends on SYS_HAS_CPU_MIPS64_R2
-       select CPU_HAS_LLSC
        select CPU_HAS_PREFETCH
        select CPU_SUPPORTS_32BIT_KERNEL
        select CPU_SUPPORTS_64BIT_KERNEL
        select CPU_SUPPORTS_HIGHMEM
+       select CPU_SUPPORTS_HUGEPAGES
        help
          Choose this option to build a kernel for release 2 or later of the
          MIPS64 architecture.  Many modern embedded systems with a 64-bit
@@ -1113,7 +1185,6 @@ config CPU_VR41XX
 config CPU_R4300
        bool "R4300"
        depends on SYS_HAS_CPU_R4300
-       select CPU_HAS_LLSC
        select CPU_SUPPORTS_32BIT_KERNEL
        select CPU_SUPPORTS_64BIT_KERNEL
        help
@@ -1122,7 +1193,6 @@ config CPU_R4300
 config CPU_R4X00
        bool "R4x00"
        depends on SYS_HAS_CPU_R4X00
-       select CPU_HAS_LLSC
        select CPU_SUPPORTS_32BIT_KERNEL
        select CPU_SUPPORTS_64BIT_KERNEL
        help
@@ -1132,7 +1202,6 @@ config CPU_R4X00
 config CPU_TX49XX
        bool "R49XX"
        depends on SYS_HAS_CPU_TX49XX
-       select CPU_HAS_LLSC
        select CPU_HAS_PREFETCH
        select CPU_SUPPORTS_32BIT_KERNEL
        select CPU_SUPPORTS_64BIT_KERNEL
@@ -1140,7 +1209,6 @@ config CPU_TX49XX
 config CPU_R5000
        bool "R5000"
        depends on SYS_HAS_CPU_R5000
-       select CPU_HAS_LLSC
        select CPU_SUPPORTS_32BIT_KERNEL
        select CPU_SUPPORTS_64BIT_KERNEL
        help
@@ -1149,16 +1217,15 @@ config CPU_R5000
 config CPU_R5432
        bool "R5432"
        depends on SYS_HAS_CPU_R5432
-       select CPU_HAS_LLSC
        select CPU_SUPPORTS_32BIT_KERNEL
        select CPU_SUPPORTS_64BIT_KERNEL
 
 config CPU_R5500
        bool "R5500"
        depends on SYS_HAS_CPU_R5500
-       select CPU_HAS_LLSC
        select CPU_SUPPORTS_32BIT_KERNEL
        select CPU_SUPPORTS_64BIT_KERNEL
+       select CPU_SUPPORTS_HUGEPAGES
        help
          NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
          instruction set.
@@ -1166,7 +1233,6 @@ config CPU_R5500
 config CPU_R6000
        bool "R6000"
        depends on EXPERIMENTAL
-       select CPU_HAS_LLSC
        depends on SYS_HAS_CPU_R6000
        select CPU_SUPPORTS_32BIT_KERNEL
        help
@@ -1176,7 +1242,6 @@ config CPU_R6000
 config CPU_NEVADA
        bool "RM52xx"
        depends on SYS_HAS_CPU_NEVADA
-       select CPU_HAS_LLSC
        select CPU_SUPPORTS_32BIT_KERNEL
        select CPU_SUPPORTS_64BIT_KERNEL
        help
@@ -1186,7 +1251,6 @@ config CPU_R8000
        bool "R8000"
        depends on EXPERIMENTAL
        depends on SYS_HAS_CPU_R8000
-       select CPU_HAS_LLSC
        select CPU_HAS_PREFETCH
        select CPU_SUPPORTS_64BIT_KERNEL
        help
@@ -1196,7 +1260,6 @@ config CPU_R8000
 config CPU_R10000
        bool "R10000"
        depends on SYS_HAS_CPU_R10000
-       select CPU_HAS_LLSC
        select CPU_HAS_PREFETCH
        select CPU_SUPPORTS_32BIT_KERNEL
        select CPU_SUPPORTS_64BIT_KERNEL
@@ -1207,7 +1270,6 @@ config CPU_R10000
 config CPU_RM7000
        bool "RM7000"
        depends on SYS_HAS_CPU_RM7000
-       select CPU_HAS_LLSC
        select CPU_HAS_PREFETCH
        select CPU_SUPPORTS_32BIT_KERNEL
        select CPU_SUPPORTS_64BIT_KERNEL
@@ -1216,7 +1278,6 @@ config CPU_RM7000
 config CPU_RM9000
        bool "RM9000"
        depends on SYS_HAS_CPU_RM9000
-       select CPU_HAS_LLSC
        select CPU_HAS_PREFETCH
        select CPU_SUPPORTS_32BIT_KERNEL
        select CPU_SUPPORTS_64BIT_KERNEL
@@ -1226,7 +1287,6 @@ config CPU_RM9000
 config CPU_SB1
        bool "SB1"
        depends on SYS_HAS_CPU_SB1
-       select CPU_HAS_LLSC
        select CPU_SUPPORTS_32BIT_KERNEL
        select CPU_SUPPORTS_64BIT_KERNEL
        select CPU_SUPPORTS_HIGHMEM
@@ -1244,6 +1304,7 @@ config CPU_CAVIUM_OCTEON
        select WEAK_ORDERING
        select WEAK_REORDERING_BEYOND_LLSC
        select CPU_SUPPORTS_HIGHMEM
+       select CPU_SUPPORTS_HUGEPAGES
        help
          The Cavium Octeon processor is a highly integrated chip containing
          many ethernet hardware widgets for networking tasks. The processor
@@ -1252,8 +1313,30 @@ config CPU_CAVIUM_OCTEON
 
 endchoice
 
-config SYS_HAS_CPU_LOONGSON2
+config SYS_SUPPORTS_ZBOOT
+       bool
+       select HAVE_KERNEL_GZIP
+       select HAVE_KERNEL_BZIP2
+       select HAVE_KERNEL_LZMA
+
+config SYS_SUPPORTS_ZBOOT_UART16550
+       bool
+       select SYS_SUPPORTS_ZBOOT
+
+config CPU_LOONGSON2
+       bool
+       select CPU_SUPPORTS_32BIT_KERNEL
+       select CPU_SUPPORTS_64BIT_KERNEL
+       select CPU_SUPPORTS_HIGHMEM
+
+config SYS_HAS_CPU_LOONGSON2E
+       bool
+
+config SYS_HAS_CPU_LOONGSON2F
        bool
+       select CPU_SUPPORTS_CPUFREQ
+       select CPU_SUPPORTS_ADDRWINCFG if 64BIT
+       select CPU_SUPPORTS_UNCACHED_ACCELERATED
 
 config SYS_HAS_CPU_MIPS32_R1
        bool
@@ -1363,6 +1446,17 @@ config CPU_SUPPORTS_32BIT_KERNEL
        bool
 config CPU_SUPPORTS_64BIT_KERNEL
        bool
+config CPU_SUPPORTS_CPUFREQ
+       bool
+config CPU_SUPPORTS_ADDRWINCFG
+       bool
+config CPU_SUPPORTS_HUGEPAGES
+       bool
+config CPU_SUPPORTS_UNCACHED_ACCELERATED
+       bool
+config MIPS_PGD_C0_CONTEXT
+       bool
+       default y if 64BIT && CPU_MIPSR2
 
 #
 # Set to y for ptrace access to watch registers.
@@ -1403,6 +1497,7 @@ choice
 
 config PAGE_SIZE_4KB
        bool "4kB"
+       depends on !CPU_LOONGSON2
        help
         This option select the standard 4kB Linux page size.  On some
         R3000-family processors this is the only available page size.  Using
@@ -1411,13 +1506,12 @@ config PAGE_SIZE_4KB
 
 config PAGE_SIZE_8KB
        bool "8kB"
-       depends on EXPERIMENTAL && CPU_R8000
+       depends on (EXPERIMENTAL && CPU_R8000) || CPU_CAVIUM_OCTEON
        help
          Using 8kB page size will result in higher performance kernel at
          the price of higher memory consumption.  This option is available
-         only on the R8000 processor.  Not that at the time of this writing
-         this option is still high experimental; there are also issues with
-         compatibility of user applications.
+         only on R8000 and cnMIPS processors.  Note that you will need a
+         suitable Linux distribution to support this.
 
 config PAGE_SIZE_16KB
        bool "16kB"
@@ -1428,6 +1522,15 @@ config PAGE_SIZE_16KB
          all non-R3000 family processors.  Note that you will need a suitable
          Linux distribution to support this.
 
+config PAGE_SIZE_32KB
+       bool "32kB"
+       depends on CPU_CAVIUM_OCTEON
+       help
+         Using 32kB page size will result in higher performance kernel at
+         the price of higher memory consumption.  This option is available
+         only on cnMIPS cores.  Note that you will need a suitable Linux
+         distribution to support this.
+
 config PAGE_SIZE_64KB
        bool "64kB"
        depends on EXPERIMENTAL && !CPU_R3000 && !CPU_TX39XX
@@ -1602,7 +1705,7 @@ config MIPS_APSP_KSPD
 config MIPS_CMP
        bool "MIPS CMP framework support"
        depends on SYS_SUPPORTS_MIPS_CMP
-       select SYNC_R4K if BROKEN
+       select SYNC_R4K
        select SYS_SUPPORTS_SMP
        select SYS_SUPPORTS_SCHED_SMT if SMP
        select WEAK_ORDERING
@@ -1629,9 +1732,6 @@ config SB1_PASS_2_1_WORKAROUNDS
 config 64BIT_PHYS_ADDR
        bool
 
-config CPU_HAS_LLSC
-       bool
-
 config CPU_HAS_SMARTMIPS
        depends on SYS_SUPPORTS_SMARTMIPS
        bool "Support for the SmartMIPS ASE"
@@ -1722,7 +1822,7 @@ config SYS_SUPPORTS_SMARTMIPS
 
 config ARCH_FLATMEM_ENABLE
        def_bool y
-       depends on !NUMA
+       depends on !NUMA && !CPU_LOONGSON2
 
 config ARCH_DISCONTIGMEM_ENABLE
        bool
@@ -1958,10 +2058,6 @@ config SECCOMP
 
 endmenu
 
-config RWSEM_GENERIC_SPINLOCK
-       bool
-       default y
-
 config LOCKDEP_SUPPORT
        bool
        default y
@@ -1972,15 +2068,6 @@ config STACKTRACE_SUPPORT
 
 source "init/Kconfig"
 
-config PROBE_INITRD_HEADER
-       bool "Probe initrd header created by addinitrd"
-       depends on BLK_DEV_INITRD
-       help
-         Probe initrd header at the last page of kernel image.
-         Say Y here if you are using arch/mips/boot/addinitrd.c to
-         add initrd or initramfs image to the kernel image.
-         Otherwise, say N.
-
 source "kernel/Kconfig.freezer"
 
 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
@@ -2116,9 +2203,13 @@ endmenu
 
 menu "Power management options"
 
+config ARCH_HIBERNATION_POSSIBLE
+       def_bool y
+       depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
+
 config ARCH_SUSPEND_POSSIBLE
        def_bool y
-       depends on !SMP
+       depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
 
 source "kernel/power/Kconfig"