bool "4G Systems MTX-1 board"
select DMA_NONCOHERENT
select HW_HAS_PCI
+ select RESOURCES_64BIT if PCI
select SOC_AU1500
select SYS_HAS_CPU_MIPS32_R1
select SYS_SUPPORTS_LITTLE_ENDIAN
select SOC_AU1000
select DMA_NONCOHERENT
select HW_HAS_PCI
+ select RESOURCES_64BIT if PCI
select SWAP_IO_SPACE
select SYS_HAS_CPU_MIPS32_R1
select SYS_SUPPORTS_LITTLE_ENDIAN
select SOC_AU1100
select DMA_NONCOHERENT
select HW_HAS_PCI
+ select RESOURCES_64BIT if PCI
select SWAP_IO_SPACE
select SYS_HAS_CPU_MIPS32_R1
select SYS_SUPPORTS_LITTLE_ENDIAN
select SOC_AU1500
select DMA_NONCOHERENT
select HW_HAS_PCI
+ select RESOURCES_64BIT if PCI
select SYS_HAS_CPU_MIPS32_R1
select SYS_SUPPORTS_LITTLE_ENDIAN
select DMA_NONCOHERENT
select HW_HAS_PCI
select MIPS_DISABLE_OBSOLETE_IDE
+ select RESOURCES_64BIT if PCI
select SYS_HAS_CPU_MIPS32_R1
select SYS_SUPPORTS_LITTLE_ENDIAN
select SOC_AU1200
select DMA_NONCOHERENT
select MIPS_DISABLE_OBSOLETE_IDE
+ select RESOURCES_64BIT if PCI
select SYS_HAS_CPU_MIPS32_R1
select SYS_SUPPORTS_LITTLE_ENDIAN
select SOC_AU1000
select DMA_NONCOHERENT
select HW_HAS_PCI
+ select RESOURCES_64BIT if PCI
select SYS_HAS_CPU_MIPS32_R1
select SYS_SUPPORTS_LITTLE_ENDIAN
select DMA_NONCOHERENT
select HW_HAS_PCI
select MIPS_DISABLE_OBSOLETE_IDE
+ select RESOURCES_64BIT if PCI
select SYS_HAS_CPU_MIPS32_R1
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_LITTLE_ENDIAN
select HW_HAS_PCI
select DMA_NONCOHERENT
select MIPS_DISABLE_OBSOLETE_IDE
+ select RESOURCES_64BIT if PCI
select SYS_HAS_CPU_MIPS32_R1
select SYS_SUPPORTS_LITTLE_ENDIAN
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
select SYS_SUPPORTS_LITTLE_ENDIAN
+ select GENERIC_HARDIRQS_NO__DO_IRQ
config MACH_DECSTATION
bool "DECstations"
<http://www.marvell.com/>. Say Y here if you wish to build a
kernel for this platform.
-config MIPS_IVR
- bool "Globespan IVR board"
- select DMA_NONCOHERENT
- select HW_HAS_PCI
- select ITE_BOARD_GEN
- select SYS_HAS_CPU_NEVADA
- select SYS_SUPPORTS_32BIT_KERNEL
- select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
- select SYS_SUPPORTS_LITTLE_ENDIAN
- help
- This is an evaluation board built by Globespan to showcase thir
- iVR (Internet Video Recorder) design. It utilizes a QED RM5231
- R5000 MIPS core. More information can be found out their website
- located at <http://www.globespan.net/>. Say Y here if you wish to
- build a kernel for this platform.
-
-config MIPS_ITE8172
- bool "ITE 8172G board"
- select DMA_NONCOHERENT
- select HW_HAS_PCI
- select ITE_BOARD_GEN
- select SYS_HAS_CPU_R5432
- select SYS_HAS_CPU_NEVADA
- select SYS_SUPPORTS_32BIT_KERNEL
- select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
- select SYS_SUPPORTS_LITTLE_ENDIAN
- help
- Ths is an evaluation board made by ITE <http://www.ite.com.tw/>
- with ATX form factor that utilizes a MIPS R5000 to work with its
- ITE8172G companion internet appliance chip. The MIPS core can be
- either a NEC Vr5432 or QED RM5231. Say Y here if you wish to build
- a kernel for this platform.
-
config MACH_JAZZ
bool "Jazz family of machines"
select ARC
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
select SYS_SUPPORTS_100HZ
+ select GENERIC_HARDIRQS_NO__DO_IRQ
help
This a family of machines based on the MIPS R4030 chipset which was
used by several vendors to build RISC/os and Windows NT workstations.
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
select SYS_SUPPORTS_LITTLE_ENDIAN
+ select GENERIC_HARDIRQS_NO__DO_IRQ
config MIPS_ATLAS
bool "MIPS Atlas board"
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_LITTLE_ENDIAN
select SYS_SUPPORTS_MULTITHREADING if EXPERIMENTAL
+ select GENERIC_HARDIRQS_NO__DO_IRQ
help
This enables support for the MIPS Technologies Atlas evaluation
board.
select BOOT_ELF32
select HAVE_STD_PC_SERIAL_PORT
select DMA_NONCOHERENT
- select IRQ_CPU
select GENERIC_ISA_DMA
+ select IRQ_CPU
select HW_HAS_PCI
select I8259
select MIPS_BOARDS_GEN
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
+ select GENERIC_HARDIRQS_NO__DO_IRQ
help
The Ocelot is a MIPS-based Single Board Computer (SBC) made by
Momentum Computer <http://www.momenco.com/>.
select SWAP_IO_SPACE
select SYS_HAS_CPU_RM7000
select SYS_SUPPORTS_32BIT_KERNEL
- select SYS_SUPPORTS_64BIT_KERNEL
+ select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
select SYS_SUPPORTS_BIG_ENDIAN
- select ARCH_SPARSEMEM_ENABLE
help
The Ocelot is a MIPS-based Single Board Computer (SBC) made by
Momentum Computer <http://www.momenco.com/>.
config PNX8550_V2PCI
bool "Philips PNX8550 based Viper2-PCI board"
- depends on BROKEN
select PNX8550
select SYS_SUPPORTS_LITTLE_ENDIAN
config PNX8550_JBS
bool "Philips PNX8550 based JBS board"
- depends on BROKEN
+ select PNX8550
+ select SYS_SUPPORTS_LITTLE_ENDIAN
+
+config PNX8550_STB810
+ bool "Support for Philips PNX8550 based STB810 board"
select PNX8550
select SYS_SUPPORTS_LITTLE_ENDIAN
select SYS_HAS_CPU_VR41XX
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
+ select GENERIC_HARDIRQS_NO__DO_IRQ
config PMC_YOSEMITE
bool "PMC-Sierra Yosemite eval board"
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_LITTLE_ENDIAN
select ARCH_SPARSEMEM_ENABLE
+ select GENERIC_HARDIRQS_NO__DO_IRQ
help
Qemu is a software emulator which among other architectures also
can simulate a MIPS32 4Kc system. This patch adds support for the
select HW_HAS_EISA
select IP22_CPU_SCACHE
select IRQ_CPU
- select NO_ISA if ISA
+ select GENERIC_ISA_DMA_SUPPORT_BROKEN
select SWAP_IO_SPACE
select SYS_HAS_CPU_R4X00
select SYS_HAS_CPU_R5000
select DMA_IP27
select EARLY_PRINTK
select HW_HAS_PCI
+ select NR_CPUS_DEFAULT_64
select PCI_DOMAINS
select SYS_HAS_CPU_R10000
select SYS_SUPPORTS_64BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_NUMA
+ select SYS_SUPPORTS_SMP
+ select GENERIC_HARDIRQS_NO__DO_IRQ
help
This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
workstations. To compile a Linux kernel that runs on these, say Y
bool "Sibyte BCM91480B-BigSur"
select BOOT_ELF32
select DMA_COHERENT
+ select NR_CPUS_DEFAULT_4
select PCI_DOMAINS
select SIBYTE_BCM1x80
select SWAP_IO_SPACE
bool "Sibyte BCM91250A-SWARM"
select BOOT_ELF32
select DMA_COHERENT
+ select NR_CPUS_DEFAULT_2
select SIBYTE_SB1250
select SWAP_IO_SPACE
select SYS_HAS_CPU_SB1
depends on EXPERIMENTAL
select BOOT_ELF32
select DMA_COHERENT
+ select NR_CPUS_DEFAULT_2
select SIBYTE_SB1250
select SWAP_IO_SPACE
select SYS_HAS_CPU_SB1
depends on EXPERIMENTAL
select BOOT_ELF32
select DMA_COHERENT
+ select NR_CPUS_DEFAULT_2
select SIBYTE_SB1250
select SWAP_IO_SPACE
select SYS_HAS_CPU_SB1
depends on EXPERIMENTAL
select BOOT_ELF32
select DMA_COHERENT
+ select NR_CPUS_DEFAULT_2
select SIBYTE_SB1250
select SWAP_IO_SPACE
select SYS_HAS_CPU_SB1
select SYS_SUPPORTS_HIGHMEM
select SYS_SUPPORTS_LITTLE_ENDIAN
-config SNI_RM200_PCI
- bool "SNI RM200 PCI"
+config SNI_RM
+ bool "SNI RM200/300/400"
select ARC if CPU_LITTLE_ENDIAN
select ARC32 if CPU_LITTLE_ENDIAN
select ARCH_MAY_HAVE_PC_FDC
select SYS_SUPPORTS_HIGHMEM
select SYS_SUPPORTS_LITTLE_ENDIAN
help
- The SNI RM200 PCI was a MIPS-based platform manufactured by Siemens
- Nixdorf Informationssysteme (SNI), parent company of Pyramid
+ The SNI RM200/300/400 are MIPS-based machines manufactured by
+ Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
Technology and now in turn merged with Fujitsu. Say Y here to
support this machine type.
select SYS_SUPPORTS_64BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
select TOSHIBA_BOARDS
+ select GENERIC_HARDIRQS_NO__DO_IRQ
help
This Toshiba board is based on the TX4927 processor. Say Y here to
support this machine type
select SYS_SUPPORTS_LITTLE_ENDIAN
select SYS_SUPPORTS_BIG_ENDIAN
select TOSHIBA_BOARDS
+ select GENERIC_HARDIRQS_NO__DO_IRQ
help
This Toshiba board is based on the TX4938 processor. Say Y here to
support this machine type
source "arch/mips/ddb5xxx/Kconfig"
source "arch/mips/gt64120/ev64120/Kconfig"
source "arch/mips/jazz/Kconfig"
-source "arch/mips/ite-boards/Kconfig"
source "arch/mips/lasat/Kconfig"
source "arch/mips/momentum/Kconfig"
source "arch/mips/pmc-sierra/Kconfig"
config RWSEM_XCHGADD_ALGORITHM
bool
+config ARCH_HAS_ILOG2_U32
+ bool
+ default n
+
+config ARCH_HAS_ILOG2_U64
+ bool
+ default n
+
config GENERIC_FIND_NEXT_BIT
bool
default y
bool
default y
+config GENERIC_TIME
+ bool
+ default y
+
config SCHED_NO_NO_OMIT_FRAME_POINTER
bool
default y
+config GENERIC_HARDIRQS_NO__DO_IRQ
+ bool
+ default n
+
#
# Select some configuration options automatically based on user selections.
#
config MIPS_DISABLE_OBSOLETE_IDE
bool
+config GENERIC_ISA_DMA_SUPPORT_BROKEN
+ bool
+
#
-# Endianess selection. Suffiently obscure so many users don't know what to
+# Endianess selection. Sufficiently obscure so many users don't know what to
# answer,so we try hard to limit the available choices. Also the use of a
# choice statement should be more obvious to the user.
#
help
Some MIPS machines can be configured for either little or big endian
byte order. These modes require different kernels and a different
- Linux distribution. In general there is one prefered byteorder for a
+ Linux distribution. In general there is one preferred byteorder for a
particular system but some systems are just as commonly used in the
one or the other endianess.
endchoice
+config SYS_SUPPORTS_APM_EMULATION
+ bool
+
config SYS_SUPPORTS_BIG_ENDIAN
bool
config PCI_MARVELL
bool
-config ITE_BOARD_GEN
- bool
-
config SOC_AU1000
bool
select SOC_AU1X00
bool
select SYS_HAS_CPU_MIPS32_R1
select SYS_SUPPORTS_32BIT_KERNEL
+ select SYS_SUPPORTS_APM_EMULATION
config PNX8550
bool
select HW_HAS_PCI
select SYS_HAS_CPU_MIPS32_R1
select SYS_SUPPORTS_32BIT_KERNEL
+ select GENERIC_HARDIRQS_NO__DO_IRQ
config SWAP_IO_SPACE
bool
config ARC32
bool
-config AU1X00_USB_DEVICE
- bool
- depends on MIPS_PB1500 || MIPS_PB1100 || MIPS_PB1000
- default n
-
-config IT8172_CIR
- bool
- depends on MIPS_ITE8172 || MIPS_IVR
- default y
-
-config IT8712
- bool
- depends on MIPS_ITE8172
- default y
-
config BOOT_ELF32
bool
config ARC_CONSOLE
bool "ARC console support"
- depends on SGI_IP22 || SNI_RM200_PCI
+ depends on SGI_IP22 || SNI_RM
config ARC_MEMORY
bool
- depends on MACH_JAZZ || SNI_RM200_PCI || SGI_IP32
+ depends on MACH_JAZZ || SNI_RM || SGI_IP32
default y
config ARC_PROMLIB
bool
- depends on MACH_JAZZ || SNI_RM200_PCI || SGI_IP22 || SGI_IP32
+ depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP32
default y
config ARC64
select CPU_SUPPORTS_32BIT_KERNEL
select CPU_SUPPORTS_64BIT_KERNEL
select CPU_SUPPORTS_HIGHMEM
+ select WEAK_ORDERING
config CPU_SB1
bool "SB1"
select CPU_SUPPORTS_32BIT_KERNEL
select CPU_SUPPORTS_64BIT_KERNEL
select CPU_SUPPORTS_HIGHMEM
+ select WEAK_ORDERING
endchoice
config SYS_HAS_CPU_SB1
bool
+config WEAK_ORDERING
+ bool
endmenu
#
the option of an MT-enabled processor this option will be the only
option in this menu.
-config MIPS_MT_SMTC
- bool "SMTC: Use all TCs on all VPEs for SMP"
- depends on CPU_MIPS32_R2
- #depends on CPU_MIPS64_R2 # once there is hardware ...
+config MIPS_MT_SMP
+ bool "Use 1 TC on each available VPE for SMP"
depends on SYS_SUPPORTS_MULTITHREADING
select CPU_MIPSR2_IRQ_VI
select CPU_MIPSR2_SRS
select SMP
select SYS_SUPPORTS_SMP
help
- This is a kernel model which is known a SMTC or lately has been
- marketesed into SMVP.
+ This is a kernel model which is also known a VSMP or lately
+ has been marketesed into SMVP.
-config MIPS_MT_SMP
- bool "Use 1 TC on each available VPE for SMP"
+config MIPS_MT_SMTC
+ bool "SMTC: Use all TCs on all VPEs for SMP"
+ depends on CPU_MIPS32_R2
+ #depends on CPU_MIPS64_R2 # once there is hardware ...
depends on SYS_SUPPORTS_MULTITHREADING
select CPU_MIPSR2_IRQ_VI
select CPU_MIPSR2_SRS
select MIPS_MT
+ select NR_CPUS_DEFAULT_2
+ select NR_CPUS_DEFAULT_8
select SMP
select SYS_SUPPORTS_SMP
help
- This is a kernel model which is also known a VSMP or lately
- has been marketesed into SMVP.
+ This is a kernel model which is known a SMTC or lately has been
+ marketesed into SMVP.
config MIPS_VPE_LOADER
bool "VPE loader support."
depends on MIPS_MT
default y
+config MIPS_MT_SMTC_INSTANT_REPLAY
+ bool "Low-latency Dispatch of Deferred SMTC IPIs"
+ depends on MIPS_MT_SMTC
+ default y
+ help
+ SMTC pseudo-interrupts between TCs are deferred and queued
+ if the target TC is interrupt-inhibited (IXMT). In the first
+ SMTC prototypes, these queued IPIs were serviced on return
+ to user mode, or on entry into the kernel idle loop. The
+ INSTANT_REPLAY option dispatches them as part of local_irq_restore()
+ processing, which adds runtime overhead (hence the option to turn
+ it off), but ensures that IPIs are handled promptly even under
+ heavy I/O interrupt load.
+
config MIPS_VPE_LOADER_TOM
bool "Load VPE program into memory hidden from linux"
depends on MIPS_VPE_LOADER
config ARCH_SPARSEMEM_ENABLE
bool
-
-config ARCH_SPARSEMEM_ENABLE
- bool
select SPARSEMEM_STATIC
config NUMA
config SYS_SUPPORTS_SMP
bool
+config NR_CPUS_DEFAULT_2
+ bool
+
+config NR_CPUS_DEFAULT_4
+ bool
+
+config NR_CPUS_DEFAULT_8
+ bool
+
+config NR_CPUS_DEFAULT_16
+ bool
+
+config NR_CPUS_DEFAULT_32
+ bool
+
+config NR_CPUS_DEFAULT_64
+ bool
+
config NR_CPUS
int "Maximum number of CPUs (2-64)"
range 2 64
depends on SMP
- default "64" if SGI_IP27
- default "2"
+ default "2" if NR_CPUS_DEFAULT_2
+ default "4" if NR_CPUS_DEFAULT_4
+ default "8" if NR_CPUS_DEFAULT_8
+ default "16" if NR_CPUS_DEFAULT_16
+ default "32" if NR_CPUS_DEFAULT_32
+ default "64" if NR_CPUS_DEFAULT_64
help
This allows you to specify the maximum number of CPUs which this
kernel will support. The maximum supported value is 32 for 32-bit
This will result in additional memory usage, so it is not
recommended for normal users.
+config KEXEC
+ bool "Kexec system call (EXPERIMENTAL)"
+ depends on EXPERIMENTAL
+ help
+ kexec is a system call that implements the ability to shutdown your
+ current kernel, and to start another kernel. It is like a reboot
+ but it is indepedent of the system firmware. And like a reboot
+ you can start any kernel with it, not just Linux.
+
+ The name comes from the similiarity to the exec system call.
+
+ It is an ongoing process to be certain the hardware in a machine
+ is properly shutdown, so do not be surprised if this code does not
+ initially work for you. It may help to enable device hotplugging
+ support. As of this writing the exact hardware interface is
+ strongly in flux, so no good recommendation can be made.
+
+config SECCOMP
+ bool "Enable seccomp to safely compute untrusted bytecode"
+ depends on PROC_FS && BROKEN
+ default y
+ help
+ This kernel feature is useful for number crunching applications
+ that may need to compute untrusted bytecode during their
+ execution. By using pipes or other transports made available to
+ the process as file descriptors supporting the read/write
+ syscalls, it's possible to isolate those applications in
+ their own address space using seccomp. Once seccomp is
+ enabled via /proc/<pid>/seccomp, it cannot be disabled
+ and the task is only allowed to execute a few safe syscalls
+ defined by each seccomp mode.
+
+ If unsure, say Y. Only embedded should say N here.
+
endmenu
config RWSEM_GENERIC_SPINLOCK
config ISA
bool
-config NO_ISA
- bool
-
config EISA
bool "EISA support"
depends on HW_HAS_EISA
select ISA
+ select GENERIC_ISA_DMA
---help---
The Extended Industry Standard Architecture (EISA) bus was
developed as an open alternative to the IBM MicroChannel bus.
depends on MIPS32_COMPAT
default y
+config SYSVIPC_COMPAT
+ bool
+ depends on COMPAT && SYSVIPC
+ default y
+
config MIPS32_O32
bool "Kernel support for o32 binaries"
depends on MIPS32_COMPAT
bool
default y if MIPS32_O32 || MIPS32_N32
-config SECCOMP
- bool "Enable seccomp to safely compute untrusted bytecode"
- depends on PROC_FS && BROKEN
- default y
- help
- This kernel feature is useful for number crunching applications
- that may need to compute untrusted bytecode during their
- execution. By using pipes or other transports made available to
- the process as file descriptors supporting the read/write
- syscalls, it's possible to isolate those applications in
- their own address space using seccomp. Once seccomp is
- enabled via /proc/<pid>/seccomp, it cannot be disabled
- and the task is only allowed to execute a few safe syscalls
- defined by each seccomp mode.
+endmenu
- If unsure, say Y. Only embedded should say N here.
+menu "Power management options"
-config PM
- bool "Power Management support (EXPERIMENTAL)"
- depends on EXPERIMENTAL && SOC_AU1X00
-
-config APM
- tristate "Advanced Power Management Emulation"
- depends on PM
- ---help---
- APM is a BIOS specification for saving power using several different
- techniques. This is mostly useful for battery powered systems with
- APM compliant BIOSes. If you say Y here, the system time will be
- reset after a RESUME operation, the /proc/apm device will provide
- battery status information, and user-space programs will receive
- notification of APM "events" (e.g. battery status change).
-
- In order to use APM, you will need supporting software. For location
- and more information, read <file:Documentation/pm.txt> and the
- Battery Powered Linux mini-HOWTO, available from
- <http://www.tldp.org/docs.html#howto>.
-
- This driver does not spin down disk drives (see the hdparm(8)
- manpage ("man 8 hdparm") for that), and it doesn't turn off
- VESA-compliant "green" monitors.
-
- Generally, if you don't have a battery in your machine, there isn't
- much point in using this driver and you should say N. If you get
- random kernel OOPSes or reboots that don't seem to be related to
- anything, try disabling/enabling this option (or disabling/enabling
- APM in your BIOS).
+source "kernel/power/Kconfig"
endmenu
git://ftp.safe.ca / safe / jmp / linux-2.6 / blobdiff