#include <linux/ioport.h>
#include <linux/slab.h>
#include <linux/spinlock.h>
+#include <linux/bootmem.h>
#include <asm/machvec.h>
#include <asm/page.h>
{
struct resource *resource;
char *name;
- u64 base, min, max, base_port;
+ unsigned long base, min, max, base_port;
unsigned int sparse = 0, space_nr, len;
resource = kzalloc(sizeof(*resource), GFP_KERNEL);
window->offset = offset;
if (insert_resource(root, &window->resource)) {
- printk(KERN_ERR "alloc 0x%lx-0x%lx from %s for %s failed\n",
+ printk(KERN_ERR "alloc 0x%llx-0x%llx from %s for %s failed\n",
window->resource.start, window->resource.end,
root->name, info->name);
}
(res->end - res->start < 16))
continue;
if (j >= PCI_BUS_NUM_RESOURCES) {
- printk("Ignoring range [%lx-%lx] (%lx)\n", res->start,
- res->end, res->flags);
+ printk("Ignoring range [%#llx-%#llx] (%lx)\n",
+ res->start, res->end, res->flags);
continue;
}
bus->resource[j++] = res;
struct pci_bus * __devinit
pci_acpi_scan_root(struct acpi_device *device, int domain, int bus)
{
- struct pci_root_info info;
struct pci_controller *controller;
unsigned int windows = 0;
struct pci_bus *pbus;
acpi_walk_resources(device->handle, METHOD_NAME__CRS, count_window,
&windows);
if (windows) {
+ struct pci_root_info info;
+
controller->window =
kmalloc_node(sizeof(*controller->window) * windows,
GFP_KERNEL, controller->node);
if (!controller->window)
goto out2;
- }
- name = kmalloc(16, GFP_KERNEL);
- if (!name)
- goto out3;
-
- sprintf(name, "PCI Bus %04x:%02x", domain, bus);
- info.controller = controller;
- info.name = name;
- acpi_walk_resources(device->handle, METHOD_NAME__CRS, add_window,
- &info);
+ name = kmalloc(16, GFP_KERNEL);
+ if (!name)
+ goto out3;
+ sprintf(name, "PCI Bus %04x:%02x", domain, bus);
+ info.controller = controller;
+ info.name = name;
+ acpi_walk_resources(device->handle, METHOD_NAME__CRS,
+ add_window, &info);
+ }
+ /*
+ * See arch/x86/pci/acpi.c.
+ * The desired pci bus might already be scanned in a quirk. We
+ * should handle the case here, but it appears that IA64 hasn't
+ * such quirk. So we just ignore the case now.
+ */
pbus = pci_scan_bus_parented(NULL, bus, &pci_root_ops, controller);
- if (pbus)
- pcibios_setup_root_windows(pbus, controller);
return pbus;
if (b->self) {
pci_read_bridge_bases(b);
pcibios_fixup_bridge_resources(b->self);
+ } else {
+ pcibios_setup_root_windows(b, b->sysdata);
}
list_for_each_entry(dev, &b->devices, bus_list)
pcibios_fixup_device_resources(dev);
/* ??? FIXME -- record old value for shutdown. */
}
-static inline int
-pcibios_enable_resources (struct pci_dev *dev, int mask)
-{
- u16 cmd, old_cmd;
- int idx;
- struct resource *r;
- unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM;
-
- if (!dev)
- return -EINVAL;
-
- pci_read_config_word(dev, PCI_COMMAND, &cmd);
- old_cmd = cmd;
- for (idx=0; idx<PCI_NUM_RESOURCES; idx++) {
- /* Only set up the desired resources. */
- if (!(mask & (1 << idx)))
- continue;
-
- r = &dev->resource[idx];
- if (!(r->flags & type_mask))
- continue;
- if ((idx == PCI_ROM_RESOURCE) &&
- (!(r->flags & IORESOURCE_ROM_ENABLE)))
- continue;
- if (!r->start && r->end) {
- printk(KERN_ERR
- "PCI: Device %s not available because of resource collisions\n",
- pci_name(dev));
- return -EINVAL;
- }
- if (r->flags & IORESOURCE_IO)
- cmd |= PCI_COMMAND_IO;
- if (r->flags & IORESOURCE_MEM)
- cmd |= PCI_COMMAND_MEMORY;
- }
- if (cmd != old_cmd) {
- printk("PCI: Enabling device %s (%04x -> %04x)\n", pci_name(dev), old_cmd, cmd);
- pci_write_config_word(dev, PCI_COMMAND, cmd);
- }
- return 0;
-}
-
int
pcibios_enable_device (struct pci_dev *dev, int mask)
{
int ret;
- ret = pcibios_enable_resources(dev, mask);
+ ret = pci_enable_resources(dev, mask);
if (ret < 0)
return ret;
/*
* PCI BIOS setup, always defaults to SAL interface
*/
-char * __devinit
+char * __init
pcibios_setup (char *str)
{
return str;
* vector to get the base address.
*/
int
-pci_mmap_legacy_page_range(struct pci_bus *bus, struct vm_area_struct *vma)
+pci_mmap_legacy_page_range(struct pci_bus *bus, struct vm_area_struct *vma,
+ enum pci_mmap_state mmap_state)
{
unsigned long size = vma->vm_end - vma->vm_start;
pgprot_t prot;
char *addr;
+ /* We only support mmap'ing of legacy memory space */
+ if (mmap_state != pci_mmap_mem)
+ return -ENOSYS;
+
/*
* Avoid attribute aliasing. See Documentation/ia64/aliasing.txt
* for more details.
*/
static void __init set_pci_cacheline_size(void)
{
- u64 levels, unique_caches;
- s64 status;
+ unsigned long levels, unique_caches;
+ long status;
pal_cache_config_info_t cci;
status = ia64_pal_cache_summary(&levels, &unique_caches);
pci_cache_line_size = (1 << cci.pcci_line_size) / 4;
}
+u64 ia64_dma_get_required_mask(struct device *dev)
+{
+ u32 low_totalram = ((max_pfn - 1) << PAGE_SHIFT);
+ u32 high_totalram = ((max_pfn - 1) >> (32 - PAGE_SHIFT));
+ u64 mask;
+
+ if (!high_totalram) {
+ /* convert to mask just covering totalram */
+ low_totalram = (1 << (fls(low_totalram) - 1));
+ low_totalram += low_totalram - 1;
+ mask = low_totalram;
+ } else {
+ high_totalram = (1 << (fls(high_totalram) - 1));
+ high_totalram += high_totalram - 1;
+ mask = (((u64)high_totalram) << 32) + 0xffffffff;
+ }
+ return mask;
+}
+EXPORT_SYMBOL_GPL(ia64_dma_get_required_mask);
+
+u64 dma_get_required_mask(struct device *dev)
+{
+ return platform_dma_get_required_mask(dev);
+}
+EXPORT_SYMBOL_GPL(dma_get_required_mask);
+
static int __init pcibios_init(void)
{
set_pci_cacheline_size();