Merge branch 'for-linus' of git://gitorious.org/linux-omap-dss2/linux
[safe/jmp/linux-2.6] / arch / ia64 / kernel / mca.c
index 6e17aed..378b483 100644 (file)
@@ -69,6 +69,7 @@
  * 2007-04-27 Russ Anderson <rja@sgi.com>
  *           Support multiple cpus going through OS_MCA in the same event.
  */
+#include <linux/jiffies.h>
 #include <linux/types.h>
 #include <linux/init.h>
 #include <linux/sched.h>
@@ -97,6 +98,7 @@
 
 #include <asm/irq.h>
 #include <asm/hw_irq.h>
+#include <asm/tlb.h>
 
 #include "mca_drv.h"
 #include "entry.h"
 # define IA64_MCA_DEBUG(fmt...)
 #endif
 
+#define NOTIFY_INIT(event, regs, arg, spin)                            \
+do {                                                                   \
+       if ((notify_die((event), "INIT", (regs), (arg), 0, 0)           \
+                       == NOTIFY_STOP) && ((spin) == 1))               \
+               ia64_mca_spin(__func__);                                \
+} while (0)
+
+#define NOTIFY_MCA(event, regs, arg, spin)                             \
+do {                                                                   \
+       if ((notify_die((event), "MCA", (regs), (arg), 0, 0)            \
+                       == NOTIFY_STOP) && ((spin) == 1))               \
+               ia64_mca_spin(__func__);                                \
+} while (0)
+
 /* Used by mca_asm.S */
 DEFINE_PER_CPU(u64, ia64_mca_data); /* == __per_cpu_mca[smp_processor_id()] */
 DEFINE_PER_CPU(u64, ia64_mca_per_cpu_pte); /* PTE to map per-CPU area */
 DEFINE_PER_CPU(u64, ia64_mca_pal_pte);     /* PTE to map PAL code */
 DEFINE_PER_CPU(u64, ia64_mca_pal_base);    /* vaddr PAL code granule */
+DEFINE_PER_CPU(u64, ia64_mca_tr_reload);   /* Flag for TR reload */
 
 unsigned long __per_cpu_mca[NR_CPUS];
 
@@ -293,7 +310,8 @@ static void ia64_mlogbuf_dump_from_init(void)
        if (mlogbuf_finished)
                return;
 
-       if (mlogbuf_timestamp && (mlogbuf_timestamp + 30*HZ > jiffies)) {
+       if (mlogbuf_timestamp &&
+                       time_before(jiffies, mlogbuf_timestamp + 30 * HZ)) {
                printk(KERN_ERR "INIT: mlogbuf_dump is interrupted by INIT "
                        " and the system seems to be messed up.\n");
                ia64_mlogbuf_finish(0);
@@ -413,8 +431,8 @@ ia64_log_get(int sal_info_type, u8 **buffer, int irq_safe)
                IA64_LOG_INDEX_INC(sal_info_type);
                IA64_LOG_UNLOCK(sal_info_type);
                if (irq_safe) {
-                       IA64_MCA_DEBUG("%s: SAL error record type %d retrieved. "
-                                      "Record length = %ld\n", __FUNCTION__, sal_info_type, total_len);
+                       IA64_MCA_DEBUG("%s: SAL error record type %d retrieved. Record length = %ld\n",
+                                      __func__, sal_info_type, total_len);
                }
                *buffer = (u8 *) log_buffer;
                return total_len;
@@ -518,7 +536,7 @@ ia64_mca_cpe_int_handler (int cpe_irq, void *arg)
        static DEFINE_SPINLOCK(cpe_history_lock);
 
        IA64_MCA_DEBUG("%s: received interrupt vector = %#x on CPU %d\n",
-                      __FUNCTION__, cpe_irq, smp_processor_id());
+                      __func__, cpe_irq, smp_processor_id());
 
        /* SAL spec states this should run w/ interrupts enabled */
        local_irq_enable();
@@ -594,7 +612,7 @@ ia64_mca_register_cpev (int cpev)
        }
 
        IA64_MCA_DEBUG("%s: corrected platform error "
-                      "vector %#x registered\n", __FUNCTION__, cpev);
+                      "vector %#x registered\n", __func__, cpev);
 }
 #endif /* CONFIG_ACPI */
 
@@ -621,12 +639,11 @@ ia64_mca_cmc_vector_setup (void)
        cmcv.cmcv_vector        = IA64_CMC_VECTOR;
        ia64_setreg(_IA64_REG_CR_CMCV, cmcv.cmcv_regval);
 
-       IA64_MCA_DEBUG("%s: CPU %d corrected "
-                      "machine check vector %#x registered.\n",
-                      __FUNCTION__, smp_processor_id(), IA64_CMC_VECTOR);
+       IA64_MCA_DEBUG("%s: CPU %d corrected machine check vector %#x registered.\n",
+                      __func__, smp_processor_id(), IA64_CMC_VECTOR);
 
        IA64_MCA_DEBUG("%s: CPU %d CMCV = %#016lx\n",
-                      __FUNCTION__, smp_processor_id(), ia64_getreg(_IA64_REG_CR_CMCV));
+                      __func__, smp_processor_id(), ia64_getreg(_IA64_REG_CR_CMCV));
 }
 
 /*
@@ -651,9 +668,8 @@ ia64_mca_cmc_vector_disable (void *dummy)
        cmcv.cmcv_mask = 1; /* Mask/disable interrupt */
        ia64_setreg(_IA64_REG_CR_CMCV, cmcv.cmcv_regval);
 
-       IA64_MCA_DEBUG("%s: CPU %d corrected "
-                      "machine check vector %#x disabled.\n",
-                      __FUNCTION__, smp_processor_id(), cmcv.cmcv_vector);
+       IA64_MCA_DEBUG("%s: CPU %d corrected machine check vector %#x disabled.\n",
+                      __func__, smp_processor_id(), cmcv.cmcv_vector);
 }
 
 /*
@@ -678,9 +694,8 @@ ia64_mca_cmc_vector_enable (void *dummy)
        cmcv.cmcv_mask = 0; /* Unmask/enable interrupt */
        ia64_setreg(_IA64_REG_CR_CMCV, cmcv.cmcv_regval);
 
-       IA64_MCA_DEBUG("%s: CPU %d corrected "
-                      "machine check vector %#x enabled.\n",
-                      __FUNCTION__, smp_processor_id(), cmcv.cmcv_vector);
+       IA64_MCA_DEBUG("%s: CPU %d corrected machine check vector %#x enabled.\n",
+                      __func__, smp_processor_id(), cmcv.cmcv_vector);
 }
 
 /*
@@ -692,7 +707,7 @@ ia64_mca_cmc_vector_enable (void *dummy)
 static void
 ia64_mca_cmc_vector_disable_keventd(struct work_struct *unused)
 {
-       on_each_cpu(ia64_mca_cmc_vector_disable, NULL, 1, 0);
+       on_each_cpu(ia64_mca_cmc_vector_disable, NULL, 0);
 }
 
 /*
@@ -704,7 +719,7 @@ ia64_mca_cmc_vector_disable_keventd(struct work_struct *unused)
 static void
 ia64_mca_cmc_vector_enable_keventd(struct work_struct *unused)
 {
-       on_each_cpu(ia64_mca_cmc_vector_enable, NULL, 1, 0);
+       on_each_cpu(ia64_mca_cmc_vector_enable, NULL, 0);
 }
 
 /*
@@ -765,9 +780,8 @@ ia64_mca_rendez_int_handler(int rendez_irq, void *arg)
 
        /* Mask all interrupts */
        local_irq_save(flags);
-       if (notify_die(DIE_MCA_RENDZVOUS_ENTER, "MCA", get_irq_regs(),
-                      (long)&nd, 0, 0) == NOTIFY_STOP)
-               ia64_mca_spin(__FUNCTION__);
+
+       NOTIFY_MCA(DIE_MCA_RENDZVOUS_ENTER, get_irq_regs(), (long)&nd, 1);
 
        ia64_mc_info.imi_rendez_checkin[cpu] = IA64_MCA_RENDEZ_CHECKIN_DONE;
        /* Register with the SAL monarch that the slave has
@@ -775,17 +789,13 @@ ia64_mca_rendez_int_handler(int rendez_irq, void *arg)
         */
        ia64_sal_mc_rendez();
 
-       if (notify_die(DIE_MCA_RENDZVOUS_PROCESS, "MCA", get_irq_regs(),
-                      (long)&nd, 0, 0) == NOTIFY_STOP)
-               ia64_mca_spin(__FUNCTION__);
+       NOTIFY_MCA(DIE_MCA_RENDZVOUS_PROCESS, get_irq_regs(), (long)&nd, 1);
 
        /* Wait for the monarch cpu to exit. */
        while (monarch_cpu != -1)
               cpu_relax();     /* spin until monarch leaves */
 
-       if (notify_die(DIE_MCA_RENDZVOUS_LEAVE, "MCA", get_irq_regs(),
-                      (long)&nd, 0, 0) == NOTIFY_STOP)
-               ia64_mca_spin(__FUNCTION__);
+       NOTIFY_MCA(DIE_MCA_RENDZVOUS_LEAVE, get_irq_regs(), (long)&nd, 1);
 
        ia64_mc_info.imi_rendez_checkin[cpu] = IA64_MCA_RENDEZ_CHECKIN_NOTDONE;
        /* Enable all interrupts */
@@ -840,7 +850,7 @@ EXPORT_SYMBOL(ia64_unreg_MCA_extension);
 
 
 static inline void
-copy_reg(const u64 *fr, u64 fnat, u64 *tr, u64 *tnat)
+copy_reg(const u64 *fr, u64 fnat, unsigned long *tr, unsigned long *tnat)
 {
        u64 fslot, tslot, nat;
        *tr = *fr;
@@ -877,6 +887,65 @@ ia64_mca_modify_comm(const struct task_struct *previous_current)
        memcpy(current->comm, comm, sizeof(current->comm));
 }
 
+static void
+finish_pt_regs(struct pt_regs *regs, struct ia64_sal_os_state *sos,
+               unsigned long *nat)
+{
+       const pal_min_state_area_t *ms = sos->pal_min_state;
+       const u64 *bank;
+
+       /* If ipsr.ic then use pmsa_{iip,ipsr,ifs}, else use
+        * pmsa_{xip,xpsr,xfs}
+        */
+       if (ia64_psr(regs)->ic) {
+               regs->cr_iip = ms->pmsa_iip;
+               regs->cr_ipsr = ms->pmsa_ipsr;
+               regs->cr_ifs = ms->pmsa_ifs;
+       } else {
+               regs->cr_iip = ms->pmsa_xip;
+               regs->cr_ipsr = ms->pmsa_xpsr;
+               regs->cr_ifs = ms->pmsa_xfs;
+
+               sos->iip = ms->pmsa_iip;
+               sos->ipsr = ms->pmsa_ipsr;
+               sos->ifs = ms->pmsa_ifs;
+       }
+       regs->pr = ms->pmsa_pr;
+       regs->b0 = ms->pmsa_br0;
+       regs->ar_rsc = ms->pmsa_rsc;
+       copy_reg(&ms->pmsa_gr[1-1], ms->pmsa_nat_bits, &regs->r1, nat);
+       copy_reg(&ms->pmsa_gr[2-1], ms->pmsa_nat_bits, &regs->r2, nat);
+       copy_reg(&ms->pmsa_gr[3-1], ms->pmsa_nat_bits, &regs->r3, nat);
+       copy_reg(&ms->pmsa_gr[8-1], ms->pmsa_nat_bits, &regs->r8, nat);
+       copy_reg(&ms->pmsa_gr[9-1], ms->pmsa_nat_bits, &regs->r9, nat);
+       copy_reg(&ms->pmsa_gr[10-1], ms->pmsa_nat_bits, &regs->r10, nat);
+       copy_reg(&ms->pmsa_gr[11-1], ms->pmsa_nat_bits, &regs->r11, nat);
+       copy_reg(&ms->pmsa_gr[12-1], ms->pmsa_nat_bits, &regs->r12, nat);
+       copy_reg(&ms->pmsa_gr[13-1], ms->pmsa_nat_bits, &regs->r13, nat);
+       copy_reg(&ms->pmsa_gr[14-1], ms->pmsa_nat_bits, &regs->r14, nat);
+       copy_reg(&ms->pmsa_gr[15-1], ms->pmsa_nat_bits, &regs->r15, nat);
+       if (ia64_psr(regs)->bn)
+               bank = ms->pmsa_bank1_gr;
+       else
+               bank = ms->pmsa_bank0_gr;
+       copy_reg(&bank[16-16], ms->pmsa_nat_bits, &regs->r16, nat);
+       copy_reg(&bank[17-16], ms->pmsa_nat_bits, &regs->r17, nat);
+       copy_reg(&bank[18-16], ms->pmsa_nat_bits, &regs->r18, nat);
+       copy_reg(&bank[19-16], ms->pmsa_nat_bits, &regs->r19, nat);
+       copy_reg(&bank[20-16], ms->pmsa_nat_bits, &regs->r20, nat);
+       copy_reg(&bank[21-16], ms->pmsa_nat_bits, &regs->r21, nat);
+       copy_reg(&bank[22-16], ms->pmsa_nat_bits, &regs->r22, nat);
+       copy_reg(&bank[23-16], ms->pmsa_nat_bits, &regs->r23, nat);
+       copy_reg(&bank[24-16], ms->pmsa_nat_bits, &regs->r24, nat);
+       copy_reg(&bank[25-16], ms->pmsa_nat_bits, &regs->r25, nat);
+       copy_reg(&bank[26-16], ms->pmsa_nat_bits, &regs->r26, nat);
+       copy_reg(&bank[27-16], ms->pmsa_nat_bits, &regs->r27, nat);
+       copy_reg(&bank[28-16], ms->pmsa_nat_bits, &regs->r28, nat);
+       copy_reg(&bank[29-16], ms->pmsa_nat_bits, &regs->r29, nat);
+       copy_reg(&bank[30-16], ms->pmsa_nat_bits, &regs->r30, nat);
+       copy_reg(&bank[31-16], ms->pmsa_nat_bits, &regs->r31, nat);
+}
+
 /* On entry to this routine, we are running on the per cpu stack, see
  * mca_asm.h.  The original stack has not been touched by this event.  Some of
  * the original stack's registers will be in the RBS on this stack.  This stack
@@ -904,14 +973,13 @@ ia64_mca_modify_original_stack(struct pt_regs *regs,
        struct switch_stack *old_sw;
        unsigned size = sizeof(struct pt_regs) +
                        sizeof(struct switch_stack) + 16;
-       u64 *old_bspstore, *old_bsp;
-       u64 *new_bspstore, *new_bsp;
-       u64 old_unat, old_rnat, new_rnat, nat;
+       unsigned long *old_bspstore, *old_bsp;
+       unsigned long *new_bspstore, *new_bsp;
+       unsigned long old_unat, old_rnat, new_rnat, nat;
        u64 slots, loadrs = regs->loadrs;
        u64 r12 = ms->pmsa_gr[12-1], r13 = ms->pmsa_gr[13-1];
        u64 ar_bspstore = regs->ar_bspstore;
        u64 ar_bsp = regs->ar_bspstore + (loadrs >> 16);
-       const u64 *bank;
        const char *msg;
        int cpu = smp_processor_id();
 
@@ -958,10 +1026,10 @@ ia64_mca_modify_original_stack(struct pt_regs *regs,
         * loadrs for the new stack and save it in the new pt_regs, where
         * ia64_old_stack() can get it.
         */
-       old_bspstore = (u64 *)ar_bspstore;
-       old_bsp = (u64 *)ar_bsp;
+       old_bspstore = (unsigned long *)ar_bspstore;
+       old_bsp = (unsigned long *)ar_bsp;
        slots = ia64_rse_num_regs(old_bspstore, old_bsp);
-       new_bspstore = (u64 *)((u64)current + IA64_RBS_OFFSET);
+       new_bspstore = (unsigned long *)((u64)current + IA64_RBS_OFFSET);
        new_bsp = ia64_rse_skip_regs(new_bspstore, slots);
        regs->loadrs = (new_bsp - new_bspstore) * 8 << 16;
 
@@ -1014,54 +1082,9 @@ ia64_mca_modify_original_stack(struct pt_regs *regs,
        p = (char *)r12 - sizeof(*regs);
        old_regs = (struct pt_regs *)p;
        memcpy(old_regs, regs, sizeof(*regs));
-       /* If ipsr.ic then use pmsa_{iip,ipsr,ifs}, else use
-        * pmsa_{xip,xpsr,xfs}
-        */
-       if (ia64_psr(regs)->ic) {
-               old_regs->cr_iip = ms->pmsa_iip;
-               old_regs->cr_ipsr = ms->pmsa_ipsr;
-               old_regs->cr_ifs = ms->pmsa_ifs;
-       } else {
-               old_regs->cr_iip = ms->pmsa_xip;
-               old_regs->cr_ipsr = ms->pmsa_xpsr;
-               old_regs->cr_ifs = ms->pmsa_xfs;
-       }
-       old_regs->pr = ms->pmsa_pr;
-       old_regs->b0 = ms->pmsa_br0;
        old_regs->loadrs = loadrs;
-       old_regs->ar_rsc = ms->pmsa_rsc;
        old_unat = old_regs->ar_unat;
-       copy_reg(&ms->pmsa_gr[1-1], ms->pmsa_nat_bits, &old_regs->r1, &old_unat);
-       copy_reg(&ms->pmsa_gr[2-1], ms->pmsa_nat_bits, &old_regs->r2, &old_unat);
-       copy_reg(&ms->pmsa_gr[3-1], ms->pmsa_nat_bits, &old_regs->r3, &old_unat);
-       copy_reg(&ms->pmsa_gr[8-1], ms->pmsa_nat_bits, &old_regs->r8, &old_unat);
-       copy_reg(&ms->pmsa_gr[9-1], ms->pmsa_nat_bits, &old_regs->r9, &old_unat);
-       copy_reg(&ms->pmsa_gr[10-1], ms->pmsa_nat_bits, &old_regs->r10, &old_unat);
-       copy_reg(&ms->pmsa_gr[11-1], ms->pmsa_nat_bits, &old_regs->r11, &old_unat);
-       copy_reg(&ms->pmsa_gr[12-1], ms->pmsa_nat_bits, &old_regs->r12, &old_unat);
-       copy_reg(&ms->pmsa_gr[13-1], ms->pmsa_nat_bits, &old_regs->r13, &old_unat);
-       copy_reg(&ms->pmsa_gr[14-1], ms->pmsa_nat_bits, &old_regs->r14, &old_unat);
-       copy_reg(&ms->pmsa_gr[15-1], ms->pmsa_nat_bits, &old_regs->r15, &old_unat);
-       if (ia64_psr(old_regs)->bn)
-               bank = ms->pmsa_bank1_gr;
-       else
-               bank = ms->pmsa_bank0_gr;
-       copy_reg(&bank[16-16], ms->pmsa_nat_bits, &old_regs->r16, &old_unat);
-       copy_reg(&bank[17-16], ms->pmsa_nat_bits, &old_regs->r17, &old_unat);
-       copy_reg(&bank[18-16], ms->pmsa_nat_bits, &old_regs->r18, &old_unat);
-       copy_reg(&bank[19-16], ms->pmsa_nat_bits, &old_regs->r19, &old_unat);
-       copy_reg(&bank[20-16], ms->pmsa_nat_bits, &old_regs->r20, &old_unat);
-       copy_reg(&bank[21-16], ms->pmsa_nat_bits, &old_regs->r21, &old_unat);
-       copy_reg(&bank[22-16], ms->pmsa_nat_bits, &old_regs->r22, &old_unat);
-       copy_reg(&bank[23-16], ms->pmsa_nat_bits, &old_regs->r23, &old_unat);
-       copy_reg(&bank[24-16], ms->pmsa_nat_bits, &old_regs->r24, &old_unat);
-       copy_reg(&bank[25-16], ms->pmsa_nat_bits, &old_regs->r25, &old_unat);
-       copy_reg(&bank[26-16], ms->pmsa_nat_bits, &old_regs->r26, &old_unat);
-       copy_reg(&bank[27-16], ms->pmsa_nat_bits, &old_regs->r27, &old_unat);
-       copy_reg(&bank[28-16], ms->pmsa_nat_bits, &old_regs->r28, &old_unat);
-       copy_reg(&bank[29-16], ms->pmsa_nat_bits, &old_regs->r29, &old_unat);
-       copy_reg(&bank[30-16], ms->pmsa_nat_bits, &old_regs->r30, &old_unat);
-       copy_reg(&bank[31-16], ms->pmsa_nat_bits, &old_regs->r31, &old_unat);
+       finish_pt_regs(old_regs, sos, &old_unat);
 
        /* Next stack a struct switch_stack.  mca_asm.S built a partial
         * switch_stack, copy it and fill in the blanks using pt_regs and
@@ -1129,8 +1152,10 @@ ia64_mca_modify_original_stack(struct pt_regs *regs,
        return previous_current;
 
 no_mod:
-       printk(KERN_INFO "cpu %d, %s %s, original stack not modified\n",
+       mprintk(KERN_INFO "cpu %d, %s %s, original stack not modified\n",
                        smp_processor_id(), type, msg);
+       old_unat = regs->ar_unat;
+       finish_pt_regs(regs, sos, &old_unat);
        return previous_current;
 }
 
@@ -1185,6 +1210,52 @@ all_in:
        return;
 }
 
+/*  mca_insert_tr
+ *
+ *  Switch rid when TR reload and needed!
+ *  iord: 1: itr, 2: itr;
+ *
+*/
+static void mca_insert_tr(u64 iord)
+{
+
+       int i;
+       u64 old_rr;
+       struct ia64_tr_entry *p;
+       unsigned long psr;
+       int cpu = smp_processor_id();
+
+       if (!ia64_idtrs[cpu])
+               return;
+
+       psr = ia64_clear_ic();
+       for (i = IA64_TR_ALLOC_BASE; i < IA64_TR_ALLOC_MAX; i++) {
+               p = ia64_idtrs[cpu] + (iord - 1) * IA64_TR_ALLOC_MAX;
+               if (p->pte & 0x1) {
+                       old_rr = ia64_get_rr(p->ifa);
+                       if (old_rr != p->rr) {
+                               ia64_set_rr(p->ifa, p->rr);
+                               ia64_srlz_d();
+                       }
+                       ia64_ptr(iord, p->ifa, p->itir >> 2);
+                       ia64_srlz_i();
+                       if (iord & 0x1) {
+                               ia64_itr(0x1, i, p->ifa, p->pte, p->itir >> 2);
+                               ia64_srlz_i();
+                       }
+                       if (iord & 0x2) {
+                               ia64_itr(0x2, i, p->ifa, p->pte, p->itir >> 2);
+                               ia64_srlz_i();
+                       }
+                       if (old_rr != p->rr) {
+                               ia64_set_rr(p->ifa, old_rr);
+                               ia64_srlz_d();
+                       }
+               }
+       }
+       ia64_set_psr(psr);
+}
+
 /*
  * ia64_mca_handler
  *
@@ -1212,7 +1283,7 @@ ia64_mca_handler(struct pt_regs *regs, struct switch_stack *sw,
        int recover, cpu = smp_processor_id();
        struct task_struct *previous_current;
        struct ia64_mca_notify_die nd =
-               { .sos = sos, .monarch_cpu = &monarch_cpu };
+               { .sos = sos, .monarch_cpu = &monarch_cpu, .data = &recover };
        static atomic_t mca_count;
        static cpumask_t mca_cpu;
 
@@ -1228,9 +1299,7 @@ ia64_mca_handler(struct pt_regs *regs, struct switch_stack *sw,
 
        previous_current = ia64_mca_modify_original_stack(regs, sw, sos, "MCA");
 
-       if (notify_die(DIE_MCA_MONARCH_ENTER, "MCA", regs, (long)&nd, 0, 0)
-                       == NOTIFY_STOP)
-               ia64_mca_spin(__FUNCTION__);
+       NOTIFY_MCA(DIE_MCA_MONARCH_ENTER, regs, (long)&nd, 1);
 
        ia64_mc_info.imi_rendez_checkin[cpu] = IA64_MCA_RENDEZ_CHECKIN_CONCURRENT_MCA;
        if (sos->monarch) {
@@ -1244,13 +1313,12 @@ ia64_mca_handler(struct pt_regs *regs, struct switch_stack *sw,
                 * does not work.
                 */
                ia64_mca_wakeup_all();
-               if (notify_die(DIE_MCA_MONARCH_PROCESS, "MCA", regs, (long)&nd, 0, 0)
-                               == NOTIFY_STOP)
-                       ia64_mca_spin(__FUNCTION__);
        } else {
                while (cpu_isset(cpu, mca_cpu))
                        cpu_relax();    /* spin until monarch wakes us */
-        }
+       }
+
+       NOTIFY_MCA(DIE_MCA_MONARCH_PROCESS, regs, (long)&nd, 1);
 
        /* Get the MCA error record and log it */
        ia64_mca_log_sal_error_record(SAL_INFO_TYPE_MCA);
@@ -1269,15 +1337,14 @@ ia64_mca_handler(struct pt_regs *regs, struct switch_stack *sw,
        } else {
                /* Dump buffered message to console */
                ia64_mlogbuf_finish(1);
-#ifdef CONFIG_KEXEC
-               atomic_set(&kdump_in_progress, 1);
-               monarch_cpu = -1;
-#endif
        }
-       if (notify_die(DIE_MCA_MONARCH_LEAVE, "MCA", regs, (long)&nd, 0, recover)
-                       == NOTIFY_STOP)
-               ia64_mca_spin(__FUNCTION__);
 
+       if (__get_cpu_var(ia64_mca_tr_reload)) {
+               mca_insert_tr(0x1); /*Reload dynamic itrs*/
+               mca_insert_tr(0x2); /*Reload dynamic itrs*/
+       }
+
+       NOTIFY_MCA(DIE_MCA_MONARCH_LEAVE, regs, (long)&nd, 1);
 
        if (atomic_dec_return(&mca_count) > 0) {
                int i;
@@ -1328,7 +1395,7 @@ ia64_mca_cmc_int_handler(int cmc_irq, void *arg)
        static DEFINE_SPINLOCK(cmc_history_lock);
 
        IA64_MCA_DEBUG("%s: received interrupt vector = %#x on CPU %d\n",
-                      __FUNCTION__, cmc_irq, smp_processor_id());
+                      __func__, cmc_irq, smp_processor_id());
 
        /* SAL spec states this should run w/ interrupts enabled */
        local_irq_enable();
@@ -1407,9 +1474,9 @@ ia64_mca_cmc_int_caller(int cmc_irq, void *arg)
 
        ia64_mca_cmc_int_handler(cmc_irq, arg);
 
-       for (++cpuid ; cpuid < NR_CPUS && !cpu_online(cpuid) ; cpuid++);
+       cpuid = cpumask_next(cpuid+1, cpu_online_mask);
 
-       if (cpuid < NR_CPUS) {
+       if (cpuid < nr_cpu_ids) {
                platform_send_ipi(cpuid, IA64_CMCP_VECTOR, IA64_IPI_DM_INT, 0);
        } else {
                /* If no log record, switch out of polling mode */
@@ -1476,7 +1543,7 @@ ia64_mca_cpe_int_caller(int cpe_irq, void *arg)
 
        ia64_mca_cpe_int_handler(cpe_irq, arg);
 
-       for (++cpuid ; cpuid < NR_CPUS && !cpu_online(cpuid) ; cpuid++);
+       cpuid = cpumask_next(cpuid+1, cpu_online_mask);
 
        if (cpuid < NR_CPUS) {
                platform_send_ipi(cpuid, IA64_CPEP_VECTOR, IA64_IPI_DM_INT, 0);
@@ -1598,7 +1665,7 @@ ia64_init_handler(struct pt_regs *regs, struct switch_stack *sw,
        struct ia64_mca_notify_die nd =
                { .sos = sos, .monarch_cpu = &monarch_cpu };
 
-       (void) notify_die(DIE_INIT_ENTER, "INIT", regs, (long)&nd, 0, 0);
+       NOTIFY_INIT(DIE_INIT_ENTER, regs, (long)&nd, 0);
 
        mprintk(KERN_INFO "Entered OS INIT handler. PSP=%lx cpu=%d monarch=%ld\n",
                sos->proc_state_param, cpu, sos->monarch);
@@ -1614,7 +1681,7 @@ ia64_init_handler(struct pt_regs *regs, struct switch_stack *sw,
         */
        if (!sos->monarch && atomic_add_return(1, &slaves) == num_online_cpus()) {
                mprintk(KERN_WARNING "%s: Promoting cpu %d to monarch.\n",
-                      __FUNCTION__, cpu);
+                       __func__, cpu);
                atomic_dec(&slaves);
                sos->monarch = 1;
        }
@@ -1626,26 +1693,35 @@ ia64_init_handler(struct pt_regs *regs, struct switch_stack *sw,
         */
        if (sos->monarch && atomic_add_return(1, &monarchs) > 1) {
                mprintk(KERN_WARNING "%s: Demoting cpu %d to slave.\n",
-                              __FUNCTION__, cpu);
+                              __func__, cpu);
                atomic_dec(&monarchs);
                sos->monarch = 0;
        }
 
        if (!sos->monarch) {
                ia64_mc_info.imi_rendez_checkin[cpu] = IA64_MCA_RENDEZ_CHECKIN_INIT;
+
+#ifdef CONFIG_KEXEC
+               while (monarch_cpu == -1 && !atomic_read(&kdump_in_progress))
+                       udelay(1000);
+#else
                while (monarch_cpu == -1)
-                      cpu_relax();     /* spin until monarch enters */
-               if (notify_die(DIE_INIT_SLAVE_ENTER, "INIT", regs, (long)&nd, 0, 0)
-                               == NOTIFY_STOP)
-                       ia64_mca_spin(__FUNCTION__);
-               if (notify_die(DIE_INIT_SLAVE_PROCESS, "INIT", regs, (long)&nd, 0, 0)
-                               == NOTIFY_STOP)
-                       ia64_mca_spin(__FUNCTION__);
+                       cpu_relax();    /* spin until monarch enters */
+#endif
+
+               NOTIFY_INIT(DIE_INIT_SLAVE_ENTER, regs, (long)&nd, 1);
+               NOTIFY_INIT(DIE_INIT_SLAVE_PROCESS, regs, (long)&nd, 1);
+
+#ifdef CONFIG_KEXEC
+               while (monarch_cpu != -1 && !atomic_read(&kdump_in_progress))
+                       udelay(1000);
+#else
                while (monarch_cpu != -1)
-                      cpu_relax();     /* spin until monarch leaves */
-               if (notify_die(DIE_INIT_SLAVE_LEAVE, "INIT", regs, (long)&nd, 0, 0)
-                               == NOTIFY_STOP)
-                       ia64_mca_spin(__FUNCTION__);
+                       cpu_relax();    /* spin until monarch leaves */
+#endif
+
+               NOTIFY_INIT(DIE_INIT_SLAVE_LEAVE, regs, (long)&nd, 1);
+
                mprintk("Slave on cpu %d returning to normal service.\n", cpu);
                set_curr_task(cpu, previous_current);
                ia64_mc_info.imi_rendez_checkin[cpu] = IA64_MCA_RENDEZ_CHECKIN_NOTDONE;
@@ -1654,9 +1730,7 @@ ia64_init_handler(struct pt_regs *regs, struct switch_stack *sw,
        }
 
        monarch_cpu = cpu;
-       if (notify_die(DIE_INIT_MONARCH_ENTER, "INIT", regs, (long)&nd, 0, 0)
-                       == NOTIFY_STOP)
-               ia64_mca_spin(__FUNCTION__);
+       NOTIFY_INIT(DIE_INIT_MONARCH_ENTER, regs, (long)&nd, 1);
 
        /*
         * Wait for a bit.  On some machines (e.g., HP's zx2000 and zx6000, INIT can be
@@ -1671,12 +1745,9 @@ ia64_init_handler(struct pt_regs *regs, struct switch_stack *sw,
         * to default_monarch_init_process() above and just print all the
         * tasks.
         */
-       if (notify_die(DIE_INIT_MONARCH_PROCESS, "INIT", regs, (long)&nd, 0, 0)
-                       == NOTIFY_STOP)
-               ia64_mca_spin(__FUNCTION__);
-       if (notify_die(DIE_INIT_MONARCH_LEAVE, "INIT", regs, (long)&nd, 0, 0)
-                       == NOTIFY_STOP)
-               ia64_mca_spin(__FUNCTION__);
+       NOTIFY_INIT(DIE_INIT_MONARCH_PROCESS, regs, (long)&nd, 1);
+       NOTIFY_INIT(DIE_INIT_MONARCH_LEAVE, regs, (long)&nd, 1);
+
        mprintk("\nINIT dump complete.  Monarch on cpu %d returning to normal service.\n", cpu);
        atomic_dec(&monarchs);
        set_curr_task(cpu, previous_current);
@@ -1787,8 +1858,7 @@ ia64_mca_cpu_init(void *cpu_data)
                        data = mca_bootmem();
                        first_time = 0;
                } else
-                       data = page_address(alloc_pages_node(numa_node_id(),
-                                       GFP_KERNEL, get_order(sz)));
+                       data = __get_free_pages(GFP_KERNEL, get_order(sz));
                if (!data)
                        panic("Could not allocate MCA memory for cpu %d\n",
                                        cpu);
@@ -1839,7 +1909,7 @@ static int __cpuinit mca_cpu_callback(struct notifier_block *nfb,
        case CPU_ONLINE:
        case CPU_ONLINE_FROZEN:
                smp_call_function_single(hotcpu, ia64_mca_cmc_vector_adjust,
-                                        NULL, 1, 0);
+                                        NULL, 0);
                break;
        }
        return NOTIFY_OK;
@@ -1876,15 +1946,15 @@ ia64_mca_init(void)
        ia64_fptr_t *init_hldlr_ptr_slave = (ia64_fptr_t *)ia64_os_init_dispatch_slave;
        ia64_fptr_t *mca_hldlr_ptr = (ia64_fptr_t *)ia64_os_mca_dispatch;
        int i;
-       s64 rc;
+       long rc;
        struct ia64_sal_retval isrv;
-       u64 timeout = IA64_MCA_RENDEZ_TIMEOUT;  /* platform specific */
+       unsigned long timeout = IA64_MCA_RENDEZ_TIMEOUT; /* platform specific */
        static struct notifier_block default_init_monarch_nb = {
                .notifier_call = default_monarch_init_process,
                .priority = 0/* we need to notified last */
        };
 
-       IA64_MCA_DEBUG("%s: begin\n", __FUNCTION__);
+       IA64_MCA_DEBUG("%s: begin\n", __func__);
 
        /* Clear the Rendez checkin flag for all cpus */
        for(i = 0 ; i < NR_CPUS; i++)
@@ -1908,7 +1978,7 @@ ia64_mca_init(void)
                        printk(KERN_INFO "Increasing MCA rendezvous timeout from "
                                "%ld to %ld milliseconds\n", timeout, isrv.v0);
                        timeout = isrv.v0;
-                       (void) notify_die(DIE_MCA_NEW_TIMEOUT, "MCA", NULL, timeout, 0, 0);
+                       NOTIFY_MCA(DIE_MCA_NEW_TIMEOUT, NULL, timeout, 0);
                        continue;
                }
                printk(KERN_ERR "Failed to register rendezvous interrupt "
@@ -1928,7 +1998,7 @@ ia64_mca_init(void)
                return;
        }
 
-       IA64_MCA_DEBUG("%s: registered MCA rendezvous spinloop and wakeup mech.\n", __FUNCTION__);
+       IA64_MCA_DEBUG("%s: registered MCA rendezvous spinloop and wakeup mech.\n", __func__);
 
        ia64_mc_info.imi_mca_handler        = ia64_tpa(mca_hldlr_ptr->fp);
        /*
@@ -1949,7 +2019,7 @@ ia64_mca_init(void)
                return;
        }
 
-       IA64_MCA_DEBUG("%s: registered OS MCA handler with SAL at 0x%lx, gp = 0x%lx\n", __FUNCTION__,
+       IA64_MCA_DEBUG("%s: registered OS MCA handler with SAL at 0x%lx, gp = 0x%lx\n", __func__,
                       ia64_mc_info.imi_mca_handler, ia64_tpa(mca_hldlr_ptr->gp));
 
        /*
@@ -1961,7 +2031,7 @@ ia64_mca_init(void)
        ia64_mc_info.imi_slave_init_handler             = ia64_tpa(init_hldlr_ptr_slave->fp);
        ia64_mc_info.imi_slave_init_handler_size        = 0;
 
-       IA64_MCA_DEBUG("%s: OS INIT handler at %lx\n", __FUNCTION__,
+       IA64_MCA_DEBUG("%s: OS INIT handler at %lx\n", __func__,
                       ia64_mc_info.imi_monarch_init_handler);
 
        /* Register the os init handler with SAL */
@@ -1982,7 +2052,7 @@ ia64_mca_init(void)
                return;
        }
 
-       IA64_MCA_DEBUG("%s: registered OS INIT handler with SAL\n", __FUNCTION__);
+       IA64_MCA_DEBUG("%s: registered OS INIT handler with SAL\n", __func__);
 
        /*
         *  Configure the CMCI/P vector and handler. Interrupts for CMC are
@@ -2042,7 +2112,7 @@ ia64_mca_late_init(void)
        cmc_polling_enabled = 0;
        schedule_work(&cmc_enable_work);
 
-       IA64_MCA_DEBUG("%s: CMCI/P setup and enabled.\n", __FUNCTION__);
+       IA64_MCA_DEBUG("%s: CMCI/P setup and enabled.\n", __func__);
 
 #ifdef CONFIG_ACPI
        /* Setup the CPEI/P vector and handler */
@@ -2051,7 +2121,7 @@ ia64_mca_late_init(void)
        cpe_poll_timer.function = ia64_mca_cpe_poll;
 
        {
-               irq_desc_t *desc;
+               struct irq_desc *desc;
                unsigned int irq;
 
                if (cpe_vector >= 0) {
@@ -2065,17 +2135,17 @@ ia64_mca_late_init(void)
                                ia64_cpe_irq = irq;
                                ia64_mca_register_cpev(cpe_vector);
                                IA64_MCA_DEBUG("%s: CPEI/P setup and enabled.\n",
-                                       __FUNCTION__);
+                                       __func__);
                                return 0;
                        }
                        printk(KERN_ERR "%s: Failed to find irq for CPE "
                                        "interrupt handler, vector %d\n",
-                                       __FUNCTION__, cpe_vector);
+                                       __func__, cpe_vector);
                }
                /* If platform doesn't support CPEI, get the timer going. */
                if (cpe_poll_enabled) {
                        ia64_mca_cpe_poll(0UL);
-                       IA64_MCA_DEBUG("%s: CPEP setup and enabled.\n", __FUNCTION__);
+                       IA64_MCA_DEBUG("%s: CPEP setup and enabled.\n", __func__);
                }
        }
 #endif