Blackfin arch: add a meaningful name for each irqchip

[safe/jmp/linux-2.6] / arch / blackfin / mach-common / ints-priority.c

diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c
index e713b9d..f65b3a1 100644 (file)
--- a/arch/blackfin/mach-common/ints-priority.c
+++ b/arch/blackfin/mach-common/ints-priority.c
@@ -216,7 +216,7 @@ int bfin_internal_set_wake(unsigned int irq, unsigned int state)
        wakeup |= KPADWE;
        break;
 #endif
-#ifdef IRQ_CNT
+#ifdef CONFIG_BF54x
        case IRQ_CNT:
        wakeup |= ROTWE;
        break;
@@ -243,12 +243,14 @@ int bfin_internal_set_wake(unsigned int irq, unsigned int state)
 #endif
 
 static struct irq_chip bfin_core_irqchip = {
+       .name = "CORE",
        .ack = bfin_ack_noop,
        .mask = bfin_core_mask_irq,
        .unmask = bfin_core_unmask_irq,
 };
 
 static struct irq_chip bfin_internal_irqchip = {
+       .name = "INTN",
        .ack = bfin_ack_noop,
        .mask = bfin_internal_mask_irq,
        .unmask = bfin_internal_unmask_irq,
@@ -278,6 +280,7 @@ static void bfin_generic_error_unmask_irq(unsigned int irq)
 }
 
 static struct irq_chip bfin_generic_error_irqchip = {
+       .name = "ERROR",
        .ack = bfin_ack_noop,
        .mask_ack = bfin_generic_error_mask_irq,
        .mask = bfin_generic_error_mask_irq,
@@ -495,6 +498,7 @@ int bfin_gpio_set_wake(unsigned int irq, unsigned int state)
 #endif
 
 static struct irq_chip bfin_gpio_irqchip = {
+       .name = "GPIO",
        .ack = bfin_gpio_ack_irq,
        .mask = bfin_gpio_mask_irq,
        .mask_ack = bfin_gpio_mask_ack_irq,
@@ -884,6 +888,7 @@ void bfin_pm_restore(void)
 #endif
 
 static struct irq_chip bfin_gpio_irqchip = {
+       .name = "GPIO",
        .ack = bfin_gpio_ack_irq,
        .mask = bfin_gpio_mask_irq,
        .mask_ack = bfin_gpio_mask_ack_irq,
@@ -983,6 +988,11 @@ int __init init_arch_irq(void)
 
        local_irq_disable();
 
+#if (defined(CONFIG_BF537) || defined(CONFIG_BF536))
+       /* Clear EMAC Interrupt Status bits so we can demux it later */
+       bfin_write_EMAC_SYSTAT(-1);
+#endif
+
 #ifdef CONFIG_BF54x
 # ifdef CONFIG_PINTx_REASSIGN
        pint[0]->assign = CONFIG_PINT0_ASSIGN;
@@ -1068,13 +1078,22 @@ int __init init_arch_irq(void)
            IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW;
 
 #if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561)
-       bfin_write_SIC_IWR0(IWR_ENABLE_ALL);
-       bfin_write_SIC_IWR1(IWR_ENABLE_ALL);
+       bfin_write_SIC_IWR0(IWR_DISABLE_ALL);
+#if defined(CONFIG_BF52x)
+       /* BF52x system reset does not properly reset SIC_IWR1 which
+        * will screw up the bootrom as it relies on MDMA0/1 waking it
+        * up from IDLE instructions.  See this report for more info:
+        * http://blackfin.uclinux.org/gf/tracker/4323
+        */
+       bfin_write_SIC_IWR1(IWR_ENABLE(10) | IWR_ENABLE(11));
+#else
+       bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
+#endif
 # ifdef CONFIG_BF54x
-       bfin_write_SIC_IWR2(IWR_ENABLE_ALL);
+       bfin_write_SIC_IWR2(IWR_DISABLE_ALL);
 # endif
 #else
-       bfin_write_SIC_IWR(IWR_ENABLE_ALL);
+       bfin_write_SIC_IWR(IWR_DISABLE_ALL);
 #endif
 
        return 0;
@@ -1122,8 +1141,4 @@ void do_irq(int vec, struct pt_regs *fp)
                vec = ivg->irqno;
        }
        asm_do_IRQ(vec, fp);
-
-#ifdef CONFIG_KGDB
-       kgdb_process_breakpoint();
-#endif
 }