Blackfin: convert to GENERIC_HARDIRQS_NO__DO_IRQ

[safe/jmp/linux-2.6] / arch / blackfin / mach-common / cpufreq.c

diff --git a/arch/blackfin/mach-common/cpufreq.c b/arch/blackfin/mach-common/cpufreq.c
index dda5443..0150650 100644 (file)
--- a/arch/blackfin/mach-common/cpufreq.c
+++ b/arch/blackfin/mach-common/cpufreq.c
@@ -1,30 +1,9 @@
 /*
- * File:        arch/blackfin/mach-common/cpufreq.c
- * Based on:
- * Author:
+ * Blackfin core clock scaling
  *
- * Created:
- * Description:         Blackfin core clock scaling
+ * Copyright 2008-2009 Analog Devices Inc.
  *
- * Modified:
- *              Copyright 2004-2008 Analog Devices Inc.
- *
- * Bugs:        Enter bugs at http://blackfin.uclinux.org/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, see the file COPYING, or write
- * to the Free Software Foundation, Inc.,
- * 51 Franklin St, Fifth Floor, Boston, MA     02110-1301      USA
+ * Licensed under the GPL-2 or later.
  */
 
 #include <linux/kernel.h>
@@ -104,7 +83,7 @@ static int bfin_target(struct cpufreq_policy *policy,
                 cclk_hz, target_freq, freqs.old);
 
        cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
-       local_irq_save(flags);
+       local_irq_save_hw(flags);
                plldiv = (bfin_read_PLL_DIV() & SSEL) | dpm_state_table[index].csel;
                tscale = dpm_state_table[index].tscale;
                bfin_write_PLL_DIV(plldiv);
@@ -112,10 +91,10 @@ static int bfin_target(struct cpufreq_policy *policy,
                bfin_write_TSCALE(tscale);
                cycles = get_cycles();
                SSYNC();
-       cycles += 10; /* ~10 cycles we loose after get_cycles() */
+       cycles += 10; /* ~10 cycles we lose after get_cycles() */
        __bfin_cycles_off += (cycles << __bfin_cycles_mod) - (cycles << index);
        __bfin_cycles_mod = index;
-       local_irq_restore(flags);
+       local_irq_restore_hw(flags);
        /* TODO: just test case for cycles clock source, remove later */
        pr_debug("cpufreq: done\n");
        cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
@@ -140,7 +119,8 @@ static int __init __bfin_cpu_init(struct cpufreq_policy *policy)
        cclk = get_cclk() / 1000;
        sclk = get_sclk() / 1000;
 
-#if ANOMALY_05000273 || (!defined(CONFIG_BF54x) && defined(CONFIG_BFIN_DCACHE))
+#if ANOMALY_05000273 || ANOMALY_05000274 || \
+       (!defined(CONFIG_BF54x) && defined(CONFIG_BFIN_EXTMEM_DCACHEABLE))
        min_cclk = sclk * 2;
 #else
        min_cclk = sclk;