Blackfin: unify DMA masks

[safe/jmp/linux-2.6] / arch / blackfin / mach-bf561 / include / mach / defBF561.h

diff --git a/arch/blackfin/mach-bf561/include/mach/defBF561.h b/arch/blackfin/mach-bf561/include/mach/defBF561.h
index c2f9c8f..4c8e36b 100644 (file)
--- a/arch/blackfin/mach-bf561/include/mach/defBF561.h
+++ b/arch/blackfin/mach-bf561/include/mach/defBF561.h
@@ -1096,53 +1096,6 @@
 
 /* **********  DMA CONTROLLER MASKS  *********************8 */
 
-/* DMAx_CONFIG, MDMA_yy_CONFIG, IMDMA_yy_CONFIG Masks */
-#define DMAEN          0x00000001      /* Channel Enable */
-#define WNR            0x00000002      /* Channel Direction (W/R*) */
-#define WDSIZE_8       0x00000000      /* Word Size 8 bits */
-#define WDSIZE_16      0x00000004      /* Word Size 16 bits */
-#define WDSIZE_32      0x00000008      /* Word Size 32 bits */
-#define DMA2D          0x00000010      /* 2D/1D* Mode */
-#define RESTART         0x00000020     /* Restart */
-#define DI_SEL         0x00000040      /* Data Interrupt Select */
-#define DI_EN          0x00000080      /* Data Interrupt Enable */
-#define NDSIZE_0               0x0000  /* Next Descriptor Size = 0 (Stop/Autobuffer)   */
-#define NDSIZE_1               0x0100  /* Next Descriptor Size = 1                                             */
-#define NDSIZE_2               0x0200  /* Next Descriptor Size = 2                                             */
-#define NDSIZE_3               0x0300  /* Next Descriptor Size = 3                                             */
-#define NDSIZE_4               0x0400  /* Next Descriptor Size = 4                                             */
-#define NDSIZE_5               0x0500  /* Next Descriptor Size = 5                                             */
-#define NDSIZE_6               0x0600  /* Next Descriptor Size = 6                                             */
-#define NDSIZE_7               0x0700  /* Next Descriptor Size = 7                                             */
-#define NDSIZE_8               0x0800  /* Next Descriptor Size = 8                                             */
-#define NDSIZE_9               0x0900  /* Next Descriptor Size = 9                                             */
-#define NDSIZE         0x00000900      /* Next Descriptor Size */
-#define DMAFLOW                0x00007000      /* Flow Control */
-#define DMAFLOW_STOP           0x0000  /* Stop Mode */
-#define DMAFLOW_AUTO           0x1000  /* Autobuffer Mode */
-#define DMAFLOW_ARRAY          0x4000  /* Descriptor Array Mode */
-#define DMAFLOW_SMALL          0x6000  /* Small Model Descriptor List Mode */
-#define DMAFLOW_LARGE          0x7000  /* Large Model Descriptor List Mode */
-
-#define DMAEN_P                        0       /* Channel Enable */
-#define WNR_P                  1       /* Channel Direction (W/R*) */
-#define DMA2D_P                        4       /* 2D/1D* Mode */
-#define RESTART_P              5       /* Restart */
-#define DI_SEL_P               6       /* Data Interrupt Select */
-#define DI_EN_P                        7       /* Data Interrupt Enable */
-
-/* DMAx_IRQ_STATUS, MDMA_yy_IRQ_STATUS, IMDMA_yy_IRQ_STATUS Masks */
-
-#define DMA_DONE               0x00000001      /* DMA Done Indicator */
-#define DMA_ERR                        0x00000002      /* DMA Error Indicator */
-#define DFETCH                 0x00000004      /* Descriptor Fetch Indicator */
-#define DMA_RUN                        0x00000008      /* DMA Running Indicator */
-
-#define DMA_DONE_P             0       /* DMA Done Indicator */
-#define DMA_ERR_P              1       /* DMA Error Indicator */
-#define DFETCH_P               2       /* Descriptor Fetch Indicator */
-#define DMA_RUN_P              3       /* DMA Running Indicator */
-
 /* DMAx_PERIPHERAL_MAP, MDMA_yy_PERIPHERAL_MAP, IMDMA_yy_PERIPHERAL_MAP Masks */
 
 #define CTYPE              0x00000040  /* DMA Channel Type Indicator */