x86, VisWS: turn into generic arch, make VisWS boot on a regular PC

[safe/jmp/linux-2.6] / arch / blackfin / kernel / bfin_dma_5xx.c

diff --git a/arch/blackfin/kernel/bfin_dma_5xx.c b/arch/blackfin/kernel/bfin_dma_5xx.c
index 7cf02f0..d54f190 100644 (file)
--- a/arch/blackfin/kernel/bfin_dma_5xx.c
+++ b/arch/blackfin/kernel/bfin_dma_5xx.c
@@ -67,12 +67,17 @@ static int __init blackfin_dma_init(void)
 
        for (i = 0; i < MAX_BLACKFIN_DMA_CHANNEL; i++) {
                dma_ch[i].chan_status = DMA_CHANNEL_FREE;
-               dma_ch[i].regs = base_addr[i];
+               dma_ch[i].regs = dma_io_base_addr[i];
                mutex_init(&(dma_ch[i].dmalock));
        }
        /* Mark MEMDMA Channel 0 as requested since we're using it internally */
        dma_ch[CH_MEM_STREAM0_DEST].chan_status = DMA_CHANNEL_REQUESTED;
        dma_ch[CH_MEM_STREAM0_SRC].chan_status = DMA_CHANNEL_REQUESTED;
+
+#if defined(CONFIG_DEB_DMA_URGENT)
+       bfin_write_EBIU_DDRQUE(bfin_read_EBIU_DDRQUE()
+                        | DEB1_URGENT | DEB2_URGENT | DEB3_URGENT);
+#endif
        return 0;
 }
 
@@ -85,6 +90,17 @@ int request_dma(unsigned int channel, char *device_id)
 {
 
        pr_debug("request_dma() : BEGIN \n");
+
+#if defined(CONFIG_BF561) && ANOMALY_05000182
+       if (channel >= CH_IMEM_STREAM0_DEST && channel <= CH_IMEM_STREAM1_DEST) {
+               if (get_cclk() > 500000000) {
+                       printk(KERN_WARNING
+                              "Request IMDMA failed due to ANOMALY 05000182\n");
+                       return -EFAULT;
+               }
+       }
+#endif
+
        mutex_lock(&(dma_ch[channel].dmalock));
 
        if ((dma_ch[channel].chan_status == DMA_CHANNEL_REQUESTED)
@@ -99,6 +115,20 @@ int request_dma(unsigned int channel, char *device_id)
 
        mutex_unlock(&(dma_ch[channel].dmalock));
 
+#ifdef CONFIG_BF54x
+       if (channel >= CH_UART2_RX && channel <= CH_UART3_TX) {
+               if (strncmp(device_id, "BFIN_UART", 9) == 0) {
+                       dma_ch[channel].regs->peripheral_map &= 0x0FFF;
+                       dma_ch[channel].regs->peripheral_map |=
+                               ((channel - CH_UART2_RX + 0xC)<<12);
+               } else {
+                       dma_ch[channel].regs->peripheral_map &= 0x0FFF;
+                       dma_ch[channel].regs->peripheral_map |=
+                               ((channel - CH_UART2_RX + 0x6)<<12);
+               }
+       }
+#endif
+
        dma_ch[channel].device_id = device_id;
        dma_ch[channel].irq_callback = NULL;
 
@@ -265,10 +295,23 @@ void set_dma_next_desc_addr(unsigned int channel, unsigned long addr)
 
        dma_ch[channel].regs->next_desc_ptr = addr;
        SSYNC();
-       pr_debug("set_dma_start_addr() : END\n");
+       pr_debug("set_dma_next_desc_addr() : END\n");
 }
 EXPORT_SYMBOL(set_dma_next_desc_addr);
 
+void set_dma_curr_desc_addr(unsigned int channel, unsigned long addr)
+{
+       pr_debug("set_dma_curr_desc_addr() : BEGIN \n");
+
+       BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE
+              && channel < MAX_BLACKFIN_DMA_CHANNEL));
+
+       dma_ch[channel].regs->curr_desc_ptr = addr;
+       SSYNC();
+       pr_debug("set_dma_curr_desc_addr() : END\n");
+}
+EXPORT_SYMBOL(set_dma_curr_desc_addr);
+
 void set_dma_x_count(unsigned int channel, unsigned short x_count)
 {
        BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE
@@ -321,13 +364,13 @@ EXPORT_SYMBOL(set_dma_config);
 
 unsigned short
 set_bfin_dma_config(char direction, char flow_mode,
-                   char intr_mode, char dma_mode, char width)
+                   char intr_mode, char dma_mode, char width, char syncmode)
 {
        unsigned short config;
 
        config =
            ((direction << 1) | (width << 2) | (dma_mode << 4) |
-            (intr_mode << 6) | (flow_mode << 12) | RESTART);
+            (intr_mode << 6) | (flow_mode << 12) | (syncmode << 5));
        return config;
 }
 EXPORT_SYMBOL(set_bfin_dma_config);
@@ -345,6 +388,16 @@ void set_dma_sg(unsigned int channel, struct dmasg *sg, int nr_sg)
 }
 EXPORT_SYMBOL(set_dma_sg);
 
+void set_dma_curr_addr(unsigned int channel, unsigned long addr)
+{
+       BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE
+              && channel < MAX_BLACKFIN_DMA_CHANNEL));
+
+       dma_ch[channel].regs->curr_addr_ptr = addr;
+       SSYNC();
+}
+EXPORT_SYMBOL(set_dma_curr_addr);
+
 /*------------------------------------------------------------------------------
  *     Get the DMA status of a specific DMA channel from the system.
  *-----------------------------------------------------------------------------*/
@@ -392,6 +445,33 @@ unsigned short get_dma_curr_ycount(unsigned int channel)
 }
 EXPORT_SYMBOL(get_dma_curr_ycount);
 
+unsigned long get_dma_next_desc_ptr(unsigned int channel)
+{
+       BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE
+             && channel < MAX_BLACKFIN_DMA_CHANNEL));
+
+       return dma_ch[channel].regs->next_desc_ptr;
+}
+EXPORT_SYMBOL(get_dma_next_desc_ptr);
+
+unsigned long get_dma_curr_desc_ptr(unsigned int channel)
+{
+       BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE
+             && channel < MAX_BLACKFIN_DMA_CHANNEL));
+
+       return dma_ch[channel].regs->curr_desc_ptr;
+}
+EXPORT_SYMBOL(get_dma_curr_desc_ptr);
+
+unsigned long get_dma_curr_addr(unsigned int channel)
+{
+       BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE
+             && channel < MAX_BLACKFIN_DMA_CHANNEL));
+
+       return dma_ch[channel].regs->curr_addr_ptr;
+}
+EXPORT_SYMBOL(get_dma_curr_addr);
+
 static void *__dma_memcpy(void *dest, const void *src, size_t size)
 {
        int direction;  /* 1 - address decrease, 0 - address increase */
@@ -408,6 +488,10 @@ static void *__dma_memcpy(void *dest, const void *src, size_t size)
                blackfin_dcache_flush_range((unsigned int)src,
                                            (unsigned int)(src + size));
 
+       if ((unsigned long)dest < memory_end)
+               blackfin_dcache_invalidate_range((unsigned int)dest,
+                                                (unsigned int)(dest + size));
+
        bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR);
 
        if ((unsigned long)src < (unsigned long)dest)
@@ -515,6 +599,8 @@ static void *__dma_memcpy(void *dest, const void *src, size_t size)
                }
        }
 
+       SSYNC();
+
        while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE))
                ;
 
@@ -524,9 +610,6 @@ static void *__dma_memcpy(void *dest, const void *src, size_t size)
        bfin_write_MDMA_S0_CONFIG(0);
        bfin_write_MDMA_D0_CONFIG(0);
 
-       if ((unsigned long)dest < memory_end)
-               blackfin_dcache_invalidate_range((unsigned int)dest,
-                                                (unsigned int)(dest + size));
        local_irq_restore(flags);
 
        return dest;
@@ -555,13 +638,14 @@ void *safe_dma_memcpy(void *dest, const void *src, size_t size)
 }
 EXPORT_SYMBOL(safe_dma_memcpy);
 
-void dma_outsb(void __iomem *addr, const void *buf, unsigned short len)
+void dma_outsb(unsigned long addr, const void *buf, unsigned short len)
 {
        unsigned long flags;
 
        local_irq_save(flags);
 
-       blackfin_dcache_flush_range((unsigned int)buf, (unsigned int)(buf) + len);
+       blackfin_dcache_flush_range((unsigned int)buf,
+                        (unsigned int)(buf) + len);
 
        bfin_write_MDMA_D0_START_ADDR(addr);
        bfin_write_MDMA_D0_X_COUNT(len);
@@ -576,6 +660,8 @@ void dma_outsb(void __iomem *addr, const void *buf, unsigned short len)
        bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_8);
        bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_8);
 
+       SSYNC();
+
        while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE));
 
        bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR);
@@ -588,10 +674,13 @@ void dma_outsb(void __iomem *addr, const void *buf, unsigned short len)
 EXPORT_SYMBOL(dma_outsb);
 
 
-void dma_insb(const void __iomem *addr, void *buf, unsigned short len)
+void dma_insb(unsigned long addr, void *buf, unsigned short len)
 {
        unsigned long flags;
 
+       blackfin_dcache_invalidate_range((unsigned int)buf,
+                        (unsigned int)(buf) + len);
+
        local_irq_save(flags);
        bfin_write_MDMA_D0_START_ADDR(buf);
        bfin_write_MDMA_D0_X_COUNT(len);
@@ -606,7 +695,7 @@ void dma_insb(const void __iomem *addr, void *buf, unsigned short len)
        bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_8);
        bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_8);
 
-       blackfin_dcache_invalidate_range((unsigned int)buf, (unsigned int)(buf) + len);
+       SSYNC();
 
        while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE));
 
@@ -619,13 +708,14 @@ void dma_insb(const void __iomem *addr, void *buf, unsigned short len)
 }
 EXPORT_SYMBOL(dma_insb);
 
-void dma_outsw(void __iomem *addr, const void  *buf, unsigned short len)
+void dma_outsw(unsigned long addr, const void  *buf, unsigned short len)
 {
        unsigned long flags;
 
        local_irq_save(flags);
 
-       blackfin_dcache_flush_range((unsigned int)buf, (unsigned int)(buf) + len);
+       blackfin_dcache_flush_range((unsigned int)buf,
+                        (unsigned int)(buf) + len * sizeof(short));
 
        bfin_write_MDMA_D0_START_ADDR(addr);
        bfin_write_MDMA_D0_X_COUNT(len);
@@ -640,6 +730,8 @@ void dma_outsw(void __iomem *addr, const void  *buf, unsigned short len)
        bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_16);
        bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_16);
 
+       SSYNC();
+
        while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE));
 
        bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR);
@@ -651,10 +743,13 @@ void dma_outsw(void __iomem *addr, const void  *buf, unsigned short len)
 }
 EXPORT_SYMBOL(dma_outsw);
 
-void dma_insw(const void __iomem *addr, void *buf, unsigned short len)
+void dma_insw(unsigned long addr, void *buf, unsigned short len)
 {
        unsigned long flags;
 
+       blackfin_dcache_invalidate_range((unsigned int)buf,
+                        (unsigned int)(buf) + len * sizeof(short));
+
        local_irq_save(flags);
 
        bfin_write_MDMA_D0_START_ADDR(buf);
@@ -670,7 +765,7 @@ void dma_insw(const void __iomem *addr, void *buf, unsigned short len)
        bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_16);
        bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_16);
 
-       blackfin_dcache_invalidate_range((unsigned int)buf, (unsigned int)(buf) + len);
+       SSYNC();
 
        while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE));
 
@@ -683,13 +778,14 @@ void dma_insw(const void __iomem *addr, void *buf, unsigned short len)
 }
 EXPORT_SYMBOL(dma_insw);
 
-void dma_outsl(void __iomem *addr, const void *buf, unsigned short len)
+void dma_outsl(unsigned long addr, const void *buf, unsigned short len)
 {
        unsigned long flags;
 
        local_irq_save(flags);
 
-       blackfin_dcache_flush_range((unsigned int)buf, (unsigned int)(buf) + len);
+       blackfin_dcache_flush_range((unsigned int)buf,
+                        (unsigned int)(buf) + len * sizeof(long));
 
        bfin_write_MDMA_D0_START_ADDR(addr);
        bfin_write_MDMA_D0_X_COUNT(len);
@@ -704,6 +800,8 @@ void dma_outsl(void __iomem *addr, const void *buf, unsigned short len)
        bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_32);
        bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_32);
 
+       SSYNC();
+
        while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE));
 
        bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR);
@@ -715,10 +813,13 @@ void dma_outsl(void __iomem *addr, const void *buf, unsigned short len)
 }
 EXPORT_SYMBOL(dma_outsl);
 
-void dma_insl(const void __iomem *addr, void *buf, unsigned short len)
+void dma_insl(unsigned long addr, void *buf, unsigned short len)
 {
        unsigned long flags;
 
+       blackfin_dcache_invalidate_range((unsigned int)buf,
+                        (unsigned int)(buf) + len * sizeof(long));
+
        local_irq_save(flags);
 
        bfin_write_MDMA_D0_START_ADDR(buf);
@@ -734,7 +835,7 @@ void dma_insl(const void __iomem *addr, void *buf, unsigned short len)
        bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_32);
        bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_32);
 
-       blackfin_dcache_invalidate_range((unsigned int)buf, (unsigned int)(buf) + len);
+       SSYNC();
 
        while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE));