config MEM_MT48LC32M16A2TG_75
bool
- depends on (BFIN527_EZKIT || BFIN532_IP0X || BLACKSTAMP || BFIN526_EZBRD)
+ depends on (BFIN527_EZKIT || BFIN532_IP0X || BLACKSTAMP)
default y
config MEM_MT48LC32M8A2_75
depends on (BFIN518F_EZBRD)
default y
+config MEM_MT48H32M16LFCJ_75
+ bool
+ depends on (BFIN526_EZBRD)
+ default y
+
source "arch/blackfin/mach-bf518/Kconfig"
source "arch/blackfin/mach-bf527/Kconfig"
source "arch/blackfin/mach-bf533/Kconfig"
config GPTMR0_CLOCKSOURCE
bool "Use GPTimer0 as a clocksource (higher rating)"
+ select BFIN_GPTIMERS
depends on GENERIC_CLOCKEVENTS
depends on !TICKSOURCE_GPTMR0
config BFIN_L2_DCACHEABLE
bool "Enable DCACHE for L2 SRAM"
depends on BFIN_DCACHE
- depends on BF54x || BF561
+ depends on (BF54x || BF561) && !SMP
default n
choice
prompt "L2 SRAM DCACHE policy"
default BFIN_L2_WRITEBACK
config BFIN_L2_WRITEBACK
bool "Write back"
- depends on !SMP
config BFIN_L2_WRITETHROUGH
bool "Write through"
- depends on !SMP
endchoice