config BLACKFIN
bool
default y
+ select HAVE_IDE
+ select HAVE_OPROFILE
config ZONE_DMA
bool
default y
-config BFIN
- bool
- default y
-
-config SEMAPHORE_SLEEPERS
- bool
- default y
-
config GENERIC_FIND_NEXT_BIT
bool
default y
default y
config GENERIC_IRQ_PROBE
- bool
- default y
-
-config GENERIC_TIME
bool
- default n
+ default y
config GENERIC_GPIO
bool
bool
default y
-config IRQCHIP_DEMUX_GPIO
- bool
- depends on (BF52x || BF53x || BF561 || BF54x)
- default y
+config HARDWARE_PM
+ def_bool y
+ depends on OPROFILE
source "init/Kconfig"
source "kernel/Kconfig.preempt"
help
BF522 Processor Support.
+config BF523
+ bool "BF523"
+ help
+ BF523 Processor Support.
+
+config BF524
+ bool "BF524"
+ help
+ BF524 Processor Support.
+
config BF525
bool "BF525"
help
BF525 Processor Support.
+config BF526
+ bool "BF526"
+ help
+ BF526 Processor Support.
+
config BF527
bool "BF527"
help
help
BF544 Processor Support.
+config BF547
+ bool "BF547"
+ help
+ BF547 Processor Support.
+
config BF548
bool "BF548"
help
config BF52x
bool
- depends on (BF522 || BF525 || BF527)
+ depends on (BF522 || BF523 || BF524 || BF525 || BF526 || BF527)
default y
config BF53x
config BF54x
bool
- depends on (BF542 || BF544 || BF548 || BF549)
+ depends on (BF542 || BF544 || BF547 || BF548 || BF549)
default y
-config BFIN_DUAL_CORE
- bool
- depends on (BF561)
- default y
-
-config BFIN_SINGLE_CORE
- bool
- depends on !BFIN_DUAL_CORE
- default y
-
-choice
- prompt "System type"
- default BFIN533_STAMP
- help
- Do NOT change the board here. Please use the top level
- configuration to ensure that all the other settings are
- correct.
-
-config BFIN527_EZKIT
- bool "BF527-EZKIT"
- depends on (BF522 || BF525 || BF527)
- help
- BF533-EZKIT-LITE board Support.
-
-config BFIN533_EZKIT
- bool "BF533-EZKIT"
- depends on (BF533 || BF532 || BF531)
- help
- BF533-EZKIT-LITE board Support.
-
-config BFIN533_STAMP
- bool "BF533-STAMP"
- depends on (BF533 || BF532 || BF531)
- help
- BF533-STAMP board Support.
-
-config BFIN537_STAMP
- bool "BF537-STAMP"
- depends on (BF537 || BF536 || BF534)
- help
- BF537-STAMP board Support.
-
-config BFIN533_BLUETECHNIX_CM
- bool "Bluetechnix CM-BF533"
- depends on (BF533)
- help
- CM-BF533 support for EVAL- and DEV-Board.
-
-config BFIN537_BLUETECHNIX_CM
- bool "Bluetechnix CM-BF537"
- depends on (BF537)
- help
- CM-BF537 support for EVAL- and DEV-Board.
-
-config BFIN548_EZKIT
- bool "BF548-EZKIT"
- depends on (BF548 || BF549)
- help
- BFIN548-EZKIT board Support.
-
-config BFIN561_BLUETECHNIX_CM
- bool "Bluetechnix CM-BF561"
- depends on (BF561)
- help
- CM-BF561 support for EVAL- and DEV-Board.
-
-config BFIN561_EZKIT
- bool "BF561-EZKIT"
- depends on (BF561)
- help
- BF561-EZKIT-LITE board Support.
-
-config BFIN561_TEPLA
- bool "BF561-TEPLA"
- depends on (BF561)
- help
- BF561-TEPLA board Support.
-
-config PNAV10
- bool "PNAV 1.0 board"
- depends on (BF537)
- help
- PNAV 1.0 board Support.
-
-config H8606_HVSISTEMAS
- bool "HV Sistemas H8606"
- depends on (BF532)
- help
- HV Sistemas H8606 board support.
-
-config GENERIC_BOARD
- bool "Custom"
- depends on (BF537 || BF536 \
- || BF534 || BF561 || BF535 || BF533 || BF532 || BF531)
- help
- GENERIC or Custom board Support.
-
-endchoice
-
config MEM_GENERIC_BOARD
bool
depends on GENERIC_BOARD
config MEM_MT48LC32M16A2TG_75
bool
- depends on (BFIN527_EZKIT)
- default y
-
-config BFIN_SHARED_FLASH_ENET
- bool
- depends on (BFIN533_STAMP)
+ depends on (BFIN527_EZKIT || BFIN532_IP0X)
default y
source "arch/blackfin/mach-bf527/Kconfig"
default "25000000" if (BFIN537_STAMP || BFIN527_EZKIT || H8606_HVSISTEMAS)
default "30000000" if BFIN561_EZKIT
default "24576000" if PNAV10
+ default "10000000" if BFIN532_IP0X
help
The frequency of CLKIN crystal oscillator on the board in Hz.
are also not changed, and the Bootloader does 100% of the hardware
configuration.
+config MEM_ADD_WIDTH
+ int "Memory Address Width"
+ depends on BFIN_KERNEL_CLOCK
+ depends on (!BF54x)
+ default 9 if BFIN533_EZKIT
+ default 9 if BFIN561_EZKIT
+ default 9 if H8606_HVSISTEMAS
+ default 10 if BFIN527_EZKIT
+ default 10 if BFIN537_STAMP
+ default 11 if BFIN533_STAMP
+ default 10 if PNAV10
+ default 10 if BFIN532_IP0X
+
config PLL_BYPASS
- bool "Bypass PLL"
- depends on BFIN_KERNEL_CLOCK
- default n
+ bool "Bypass PLL"
+ depends on BFIN_KERNEL_CLOCK
+ default n
config CLKIN_HALF
bool "Half Clock In"
range 1 64
default "22" if BFIN533_EZKIT
default "45" if BFIN533_STAMP
- default "20" if (BFIN537_STAMP || BFIN527_EZKIT)
+ default "20" if (BFIN537_STAMP || BFIN527_EZKIT || BFIN548_EZKIT || BFIN548_BLUETECHNIX_CM)
default "22" if BFIN533_BLUETECHNIX_CM
default "20" if BFIN537_BLUETECHNIX_CM
default "20" if BFIN561_BLUETECHNIX_CM
range 1 15
default 5 if BFIN533_EZKIT
default 5 if BFIN533_STAMP
- default 4 if (BFIN537_STAMP || BFIN527_EZKIT)
+ default 4 if (BFIN537_STAMP || BFIN527_EZKIT || BFIN548_EZKIT || BFIN548_BLUETECHNIX_CM)
default 5 if BFIN533_BLUETECHNIX_CM
default 4 if BFIN537_BLUETECHNIX_CM
default 4 if BFIN561_BLUETECHNIX_CM
config MAX_VCO_HZ
int
default 600000000 if BF522
+ default 400000000 if BF523
+ default 400000000 if BF524
default 600000000 if BF525
+ default 400000000 if BF526
default 600000000 if BF527
default 400000000 if BF531
default 400000000 if BF532
default 500000000 if BF534
default 400000000 if BF536
default 600000000 if BF537
- default 533000000 if BF538
- default 533000000 if BF539
+ default 533333333 if BF538
+ default 533333333 if BF539
default 600000000 if BF542
- default 533000000 if BF544
- default 533000000 if BF549
+ default 533333333 if BF544
+ default 600000000 if BF547
+ default 600000000 if BF548
+ default 533333333 if BF549
default 600000000 if BF561
config MIN_VCO_HZ
config MAX_SCLK_HZ
int
- default 133000000
+ default 133333333
config MIN_SCLK_HZ
int
source kernel/Kconfig.hz
+config GENERIC_TIME
+ bool "Generic time"
+ default y
+
+config GENERIC_CLOCKEVENTS
+ bool "Generic clock events"
+ depends on GENERIC_TIME
+ default y
+
+config CYCLES_CLOCKSOURCE
+ bool "Use 'CYCLES' as a clocksource (EXPERIMENTAL)"
+ depends on EXPERIMENTAL
+ depends on GENERIC_CLOCKEVENTS
+ depends on !BFIN_SCRATCH_REG_CYCLES
+ default n
+ help
+ If you say Y here, you will enable support for using the 'cycles'
+ registers as a clock source. Doing so means you will be unable to
+ safely write to the 'cycles' register during runtime. You will
+ still be able to read it (such as for performance monitoring), but
+ writing the registers will most likely crash the kernel.
+
+source kernel/time/Kconfig
+
comment "Memory Setup"
config MEM_SIZE
default 32 if BFIN533_EZKIT
default 64 if BFIN527_EZKIT
default 64 if BFIN537_STAMP
+ default 64 if BFIN548_EZKIT
default 64 if BFIN561_EZKIT
default 128 if BFIN533_STAMP
default 64 if PNAV10
default 32 if H8606_HVSISTEMAS
+ default 64 if BFIN548_BLUETECHNIX_CM
+ default 64 if BFIN532_IP0X
-config MEM_ADD_WIDTH
- int "SDRAM Memory Address Width"
- default 9 if BFIN533_EZKIT
- default 9 if BFIN561_EZKIT
- default 9 if H8606_HVSISTEMAS
- default 10 if BFIN527_EZKIT
- default 10 if BFIN537_STAMP
- default 11 if BFIN533_STAMP
- default 10 if PNAV10
+choice
+ prompt "DDR SDRAM Chip Type"
+ depends on (BFIN548_EZKIT || BFIN548_BLUETECHNIX_CM)
+ default MEM_MT46V32M16_5B
+
+config MEM_MT46V32M16_6T
+ bool "MT46V32M16_6T"
+
+config MEM_MT46V32M16_5B
+ bool "MT46V32M16_5B"
+endchoice
config ENET_FLASH_PIN
int "PF port/pin used for flash and ethernet sharing"
memory region is used to capture NULL pointer references as well
as some core kernel functions.
-comment "LED Status Indicators"
- depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
-
-config BFIN_ALIVE_LED
- bool "Enable Board Alive"
- depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
- default n
- help
- Blink the LEDs you select when the kernel is running. Helps detect
- a hung kernel.
-
-config BFIN_ALIVE_LED_NUM
- int "LED"
- depends on BFIN_ALIVE_LED
- range 1 3 if BFIN533_STAMP
- default "3" if BFIN533_STAMP
- help
- Select the LED (marked on the board) for you to blink.
-
-config BFIN_IDLE_LED
- bool "Enable System Load/Idle LED"
- depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
- default n
- help
- Blinks the LED you select when to determine kernel load.
-
-config BFIN_IDLE_LED_NUM
- int "LED"
- depends on BFIN_IDLE_LED
- range 1 3 if BFIN533_STAMP
- default "2" if BFIN533_STAMP
- help
- Select the LED (marked on the board) for you to blink.
-
choice
prompt "Blackfin Exception Scratch Register"
default BFIN_SCRATCH_REG_RETN
endchoice
-#
-# Sorry - but you need to put the hex address here -
-#
-
-# Flag Data register
-config BFIN_ALIVE_LED_PORT
- hex
- default 0xFFC00700 if (BFIN533_STAMP)
-
-# Peripheral Flag Direction Register
-config BFIN_ALIVE_LED_DPORT
- hex
- default 0xFFC00730 if (BFIN533_STAMP)
-
-config BFIN_ALIVE_LED_PIN
- hex
- default 0x04 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 1)
- default 0x08 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 2)
- default 0x10 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 3)
-
-config BFIN_IDLE_LED_PORT
- hex
- default 0xFFC00700 if (BFIN533_STAMP)
-
-# Peripheral Flag Direction Register
-config BFIN_IDLE_LED_DPORT
- hex
- default 0xFFC00730 if (BFIN533_STAMP)
-
-config BFIN_IDLE_LED_PIN
- hex
- default 0x04 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 1)
- default 0x08 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 2)
- default 0x10 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 3)
-
endmenu
default y
help
If enabled, the entire ASM lowlevel exception and interrupt entry code
- (STORE/RESTORE CONTEXT) is linked into L1 instruction memory.
+ (STORE/RESTORE CONTEXT) is linked into L1 instruction memory.
(less latency)
config DO_IRQ_L1
source "mm/Kconfig"
-config LARGE_ALLOCS
- bool "Allow allocating large blocks (> 1MB) of memory"
- help
- Allow the slab memory allocator to keep chains for very large
- memory sizes - upto 32MB. You may need this if your system has
- a lot of RAM, and you need to able to allocate very large
- contiguous chunks. If unsure, say N.
-
config BFIN_GPTIMERS
tristate "Enable Blackfin General Purpose Timers API"
default n
Set the max memory pieces for the L1 SRAM allocation algorithm.
Min value is 16. Max value is 1024.
+
+config MPU
+ bool "Enable the memory protection unit (EXPERIMENTAL)"
+ default n
+ help
+ Use the processor's MPU to protect applications from accessing
+ memory they do not own. This comes at a performance penalty
+ and is recommended only for debugging.
+
comment "Asynchonous Memory Configuration"
menu "EBIU_AMGCTL Global Control"
config C_CDPRIO
bool "DMA has priority over core for ext. accesses"
- depends on !BF54x
default n
config C_B0PEN
default 0x99B3
endmenu
+config EBIU_MBSCTLVAL
+ hex "EBIU Bank Select Control Register"
+ depends on BF54x
+ default 0
+
+config EBIU_MODEVAL
+ hex "Flash Memory Mode Control Register"
+ depends on BF54x
+ default 1
+
+config EBIU_FCTLVAL
+ hex "Flash Memory Bank Control Register"
+ depends on BF54x
+ default 6
endmenu
#############################################################################
menu "Power management options"
source "kernel/power/Kconfig"
+config ARCH_SUSPEND_POSSIBLE
+ def_bool y
+ depends on !SMP
+
choice
- prompt "Select PM Wakeup Event Source"
- default PM_WAKEUP_GPIO_BY_SIC_IWR
+ prompt "Default Power Saving Mode"
depends on PM
- help
- If you have a GPIO already configured as input with the corresponding PORTx_MASK
- bit set - "Specify Wakeup Event by SIC_IWR value"
+ default PM_BFIN_SLEEP_DEEPER
+config PM_BFIN_SLEEP_DEEPER
+ bool "Sleep Deeper"
+ help
+ Sleep "Deeper" Mode (High Power Savings) - This mode reduces dynamic
+ power dissipation by disabling the clock to the processor core (CCLK).
+ Furthermore, Standby sets the internal power supply voltage (VDDINT)
+ to 0.85 V to provide the greatest power savings, while preserving the
+ processor state.
+ The PLL and system clock (SCLK) continue to operate at a very low
+ frequency of about 3.3 MHz. To preserve data integrity in the SDRAM,
+ the SDRAM is put into Self Refresh Mode. Typically an external event
+ such as GPIO interrupt or RTC activity wakes up the processor.
+ Various Peripherals such as UART, SPORT, PPI may not function as
+ normal during Sleep Deeper, due to the reduced SCLK frequency.
+ When in the sleep mode, system DMA access to L1 memory is not supported.
+
+config PM_BFIN_SLEEP
+ bool "Sleep"
+ help
+ Sleep Mode (High Power Savings) - The sleep mode reduces power
+ dissipation by disabling the clock to the processor core (CCLK).
+ The PLL and system clock (SCLK), however, continue to operate in
+ this mode. Typically an external event or RTC activity will wake
+ up the processor. When in the sleep mode,
+ system DMA access to L1 memory is not supported.
+endchoice
-config PM_WAKEUP_GPIO_BY_SIC_IWR
- bool "Specify Wakeup Event by SIC_IWR value"
config PM_WAKEUP_BY_GPIO
bool "Cause Wakeup Event by GPIO"
-config PM_WAKEUP_GPIO_API
- bool "Configure Wakeup Event by PM GPIO API"
-
-endchoice
-
-config PM_WAKEUP_SIC_IWR
- hex "Wakeup Events (SIC_IWR)"
- depends on PM_WAKEUP_GPIO_BY_SIC_IWR
- default 0x80000000 if (BF537 || BF536 || BF534)
- default 0x100000 if (BF533 || BF532 || BF531)
config PM_WAKEUP_GPIO_NUMBER
int "Wakeup GPIO number"
source "fs/Kconfig"
-source "kernel/Kconfig.instrumentation"
-
-menu "Kernel hacking"
-
-source "lib/Kconfig.debug"
-
-config DEBUG_HWERR
- bool "Hardware error interrupt debugging"
- depends on DEBUG_KERNEL
- help
- When enabled, the hardware error interrupt is never disabled, and
- will happen immediately when an error condition occurs. This comes
- at a slight cost in code size, but is necessary if you are getting
- hardware error interrupts and need to know where they are coming
- from.
-
-config DEBUG_ICACHE_CHECK
- bool "Check Instruction cache coherency"
- depends on DEBUG_KERNEL
- depends on DEBUG_HWERR
- help
- Say Y here if you are getting weird unexplained errors. This will
- ensure that icache is what SDRAM says it should be by doing a
- byte wise comparison between SDRAM and instruction cache. This
- also relocates the irq_panic() function to L1 memory, (which is
- un-cached).
-
-config DEBUG_HUNT_FOR_ZERO
- bool "Catch NULL pointer reads/writes"
- default y
- help
- Say Y here to catch reads/writes to anywhere in the memory range
- from 0x0000 - 0x0FFF (the first 4k) of memory. This is useful in
- catching common programming errors such as NULL pointer dereferences.
-
- Misbehaving applications will be killed (generate a SEGV) while the
- kernel will trigger a panic.
-
- Enabling this option will take up an extra entry in CPLB table.
- Otherwise, there is no extra overhead.
-
-config DEBUG_BFIN_HWTRACE_ON
- bool "Turn on Blackfin's Hardware Trace"
- default y
- help
- All Blackfins include a Trace Unit which stores a history of the last
- 16 changes in program flow taken by the program sequencer. The history
- allows the user to recreate the program sequencer’s recent path. This
- can be handy when an application dies - we print out the execution
- path of how it got to the offending instruction.
-
- By turning this off, you may save a tiny amount of power.
-
-choice
- prompt "Omit loop Tracing"
- default DEBUG_BFIN_HWTRACE_COMPRESSION_OFF
- depends on DEBUG_BFIN_HWTRACE_ON
- help
- The trace buffer can be configured to omit recording of changes in
- program flow that match either the last entry or one of the last
- two entries. Omitting one of these entries from the record prevents
- the trace buffer from overflowing because of any sort of loop (for, do
- while, etc) in the program.
-
- Because zero-overhead Hardware loops are not recorded in the trace buffer,
- this feature can be used to prevent trace overflow from loops that
- are nested four deep.
-
-config DEBUG_BFIN_HWTRACE_COMPRESSION_OFF
- bool "Trace all Loops"
- help
- The trace buffer records all changes of flow
-
-config DEBUG_BFIN_HWTRACE_COMPRESSION_ONE
- bool "Compress single-level loops"
- help
- The trace buffer does not record single loops - helpful if trace
- is spinning on a while or do loop.
-
-config DEBUG_BFIN_HWTRACE_COMPRESSION_TWO
- bool "Compress two-level loops"
- help
- The trace buffer does not record loops two levels deep. Helpful if
- the trace is spinning in a nested loop
-
-endchoice
-
-config DEBUG_BFIN_HWTRACE_COMPRESSION
- int
- depends on DEBUG_BFIN_HWTRACE_ON
- default 0 if DEBUG_BFIN_HWTRACE_COMPRESSION_OFF
- default 1 if DEBUG_BFIN_HWTRACE_COMPRESSION_ONE
- default 2 if DEBUG_BFIN_HWTRACE_COMPRESSION_TWO
-
-
-config DEBUG_BFIN_HWTRACE_EXPAND
- bool "Expand Trace Buffer greater than 16 entries"
- depends on DEBUG_BFIN_HWTRACE_ON
- default n
- help
- By selecting this option, every time the 16 hardware entries in
- the Blackfin's HW Trace buffer are full, the kernel will move them
- into a software buffer, for dumping when there is an issue. This
- has a great impact on performance, (an interrupt every 16 change of
- flows) and should normally be turned off, except in those nasty
- debugging sessions
-
-config DEBUG_BFIN_HWTRACE_EXPAND_LEN
- int "Size of Trace buffer (in power of 2k)"
- range 0 4
- depends on DEBUG_BFIN_HWTRACE_EXPAND
- default 1
- help
- This sets the size of the software buffer that the trace information
- is kept in.
- 0 for (2^0) 1k, or 256 entries,
- 1 for (2^1) 2k, or 512 entries,
- 2 for (2^2) 4k, or 1024 entries,
- 3 for (2^3) 8k, or 2048 entries,
- 4 for (2^4) 16k, or 4096 entries
-
-config DEBUG_BFIN_NO_KERN_HWTRACE
- bool "Trace user apps (turn off hwtrace in kernel)"
- depends on DEBUG_BFIN_HWTRACE_ON
- default n
- help
- Some pieces of the kernel contain a lot of flow changes which can
- quickly fill up the hardware trace buffer. When debugging crashes,
- the hardware trace may indicate that the problem lies in kernel
- space when in reality an application is buggy.
-
- Say Y here to disable hardware tracing in some known "jumpy" pieces
- of code so that the trace buffer will extend further back.
-
-config EARLY_PRINTK
- bool "Early printk"
- default n
- help
- This option enables special console drivers which allow the kernel
- to print messages very early in the bootup process.
-
- This is useful for kernel debugging when your machine crashes very
- early before the console code is initialized. After enabling this
- feature, you must add "earlyprintk=serial,uart0,57600" to the
- command line (bootargs). It is safe to say Y here in all cases, as
- all of this lives in the init section and is thrown away after the
- kernel boots completely.
-
-config DUAL_CORE_TEST_MODULE
- tristate "Dual Core Test Module"
- depends on (BF561)
- default n
- help
- Say Y here to build-in dual core test module for dual core test.
-
-config CPLB_INFO
- bool "Display the CPLB information"
- help
- Display the CPLB information.
-
-config ACCESS_CHECK
- bool "Check the user pointer address"
- default y
- help
- Usually the pointer transfer from user space is checked to see if its
- address is in the kernel space.
-
- Say N here to disable that check to improve the performance.
-
-endmenu
+source "arch/blackfin/Kconfig.debug"
source "security/Kconfig"
git://ftp.safe.ca / safe / jmp / linux-2.6 / blobdiff