ARM: Avoid evaluating page_address() multiple times

[safe/jmp/linux-2.6] / arch / arm / mm / proc-arm1026.S

diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S
index 33e1ab8..3b59f0d 100644 (file)
--- a/arch/arm/mm/proc-arm1026.S
+++ b/arch/arm/mm/proc-arm1026.S
@@ -18,11 +18,13 @@
 #include <linux/init.h>
 #include <asm/assembler.h>
 #include <asm/asm-offsets.h>
+#include <asm/hwcap.h>
 #include <asm/pgtable-hwdef.h>
 #include <asm/pgtable.h>
-#include <asm/procinfo.h>
 #include <asm/ptrace.h>
 
+#include "proc-macros.S"
+
 /*
  * This is the maximum size of an area which will be invalidated
  * using the single invalidate entry instructions.  Anything larger
@@ -345,36 +347,14 @@ ENTRY(cpu_arm1026_switch_mm)
        mov     pc, lr
         
 /*
- * cpu_arm1026_set_pte(ptep, pte)
+ * cpu_arm1026_set_pte_ext(ptep, pte, ext)
  *
  * Set a PTE and flush it out
  */
        .align  5
-ENTRY(cpu_arm1026_set_pte)
+ENTRY(cpu_arm1026_set_pte_ext)
 #ifdef CONFIG_MMU
-       str     r1, [r0], #-2048                @ linux version
-
-       eor     r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
-
-       bic     r2, r1, #PTE_SMALL_AP_MASK
-       bic     r2, r2, #PTE_TYPE_MASK
-       orr     r2, r2, #PTE_TYPE_SMALL
-
-       tst     r1, #L_PTE_USER                 @ User?
-       orrne   r2, r2, #PTE_SMALL_AP_URO_SRW
-
-       tst     r1, #L_PTE_WRITE | L_PTE_DIRTY  @ Write and Dirty?
-       orreq   r2, r2, #PTE_SMALL_AP_UNO_SRW
-
-       tst     r1, #L_PTE_PRESENT | L_PTE_YOUNG        @ Present and Young?
-       movne   r2, #0
-
-#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
-       eor     r3, r1, #0x0a                   @ C & small page?
-       tst     r3, #0x0b
-       biceq   r2, r2, #4
-#endif
-       str     r2, [r0]                        @ hardware version
+       armv3_set_pte_ext
        mov     r0, r0
 #ifndef CONFIG_CPU_DCACHE_DISABLE
        mcr     p15, 0, r0, c7, c10, 1          @ clean D entry
@@ -398,11 +378,11 @@ __arm1026_setup:
        mov     r0, #4                          @ explicitly disable writeback
        mcr     p15, 7, r0, c15, c0, 0
 #endif
+       adr     r5, arm1026_crval
+       ldmia   r5, {r5, r6}
        mrc     p15, 0, r0, c1, c0              @ get control register v4
-       ldr     r5, arm1026_cr1_clear
        bic     r0, r0, r5
-       ldr     r5, arm1026_cr1_set
-       orr     r0, r0, r5
+       orr     r0, r0, r6
 #ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
        orr     r0, r0, #0x4000                 @ .R.. .... .... ....
 #endif
@@ -415,12 +395,9 @@ __arm1026_setup:
         * .011 1001 ..11 0101
         * 
         */
-       .type   arm1026_cr1_clear, #object
-       .type   arm1026_cr1_set, #object
-arm1026_cr1_clear:
-       .word   0x7f3f
-arm1026_cr1_set:
-       .word   0x3935
+       .type   arm1026_crval, #object
+arm1026_crval:
+       crval   clear=0x00007f3f, mmuset=0x00003935, ucset=0x00001934
 
        __INITDATA
 
@@ -431,13 +408,14 @@ arm1026_cr1_set:
        .type   arm1026_processor_functions, #object
 arm1026_processor_functions:
        .word   v5t_early_abort
+       .word   legacy_pabort
        .word   cpu_arm1026_proc_init
        .word   cpu_arm1026_proc_fin
        .word   cpu_arm1026_reset
        .word   cpu_arm1026_do_idle
        .word   cpu_arm1026_dcache_clean_area
        .word   cpu_arm1026_switch_mm
-       .word   cpu_arm1026_set_pte
+       .word   cpu_arm1026_set_pte_ext
        .size   arm1026_processor_functions, . - arm1026_processor_functions
 
        .section .rodata
@@ -455,25 +433,7 @@ cpu_elf_name:
 
        .type   cpu_arm1026_name, #object
 cpu_arm1026_name:
-       .ascii  "ARM1026EJ-S"
-#ifndef CONFIG_CPU_ICACHE_DISABLE
-       .ascii  "i"
-#endif
-#ifndef CONFIG_CPU_DCACHE_DISABLE
-       .ascii  "d"
-#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
-       .ascii  "(wt)"
-#else
-       .ascii  "(wb)"
-#endif
-#endif
-#ifndef CONFIG_CPU_BPREDICT_DISABLE
-       .ascii  "B"
-#endif
-#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
-       .ascii  "RR"
-#endif
-       .ascii  "\0"
+       .asciz  "ARM1026EJ-S"
        .size   cpu_arm1026_name, . - cpu_arm1026_name
 
        .align
@@ -488,6 +448,10 @@ __arm1026_proc_info:
                PMD_BIT4 | \
                PMD_SECT_AP_WRITE | \
                PMD_SECT_AP_READ
+       .long   PMD_TYPE_SECT | \
+               PMD_BIT4 | \
+               PMD_SECT_AP_WRITE | \
+               PMD_SECT_AP_READ
        b       __arm1026_setup
        .long   cpu_arch_name
        .long   cpu_elf_name