[ARM] pxa/treo: add Palm Centro 685 support

[safe/jmp/linux-2.6] / arch / arm / mm / copypage-v4mc.c

diff --git a/arch/arm/mm/copypage-v4mc.c b/arch/arm/mm/copypage-v4mc.c
index a7dc838..7370a71 100644 (file)
--- a/arch/arm/mm/copypage-v4mc.c
+++ b/arch/arm/mm/copypage-v4mc.c
@@ -44,7 +44,7 @@ static DEFINE_SPINLOCK(minicache_lock);
  * instruction.  If your processor does not supply this, you have to write your
  * own copy_user_highpage that does the right thing.
  */
-static void __attribute__((naked))
+static void __naked
 mc_copy_user_page(void *from, void *to)
 {
        asm volatile(
@@ -68,7 +68,7 @@ mc_copy_user_page(void *from, void *to)
        : "r" (from), "r" (to), "I" (PAGE_SIZE / 64));
 }
 
-void v4_mc_copy_user_highpage(struct page *from, struct page *to,
+void v4_mc_copy_user_highpage(struct page *to, struct page *from,
        unsigned long vaddr)
 {
        void *kto = kmap_atomic(to, KM_USER1);
@@ -91,30 +91,30 @@ void v4_mc_copy_user_highpage(struct page *from, struct page *to,
 /*
  * ARMv4 optimised clear_user_page
  */
-void __attribute__((naked))
-v4_mc_clear_user_page(void *kaddr, unsigned long vaddr)
+void v4_mc_clear_user_highpage(struct page *page, unsigned long vaddr)
 {
-       asm volatile(
-       "str    lr, [sp, #-4]!\n\
-       mov     r1, %0                          @ 1\n\
+       void *ptr, *kaddr = kmap_atomic(page, KM_USER0);
+       asm volatile("\
+       mov     r1, %2                          @ 1\n\
        mov     r2, #0                          @ 1\n\
        mov     r3, #0                          @ 1\n\
        mov     ip, #0                          @ 1\n\
        mov     lr, #0                          @ 1\n\
-1:     mcr     p15, 0, r0, c7, c6, 1           @ 1   invalidate D line\n\
-       stmia   r0!, {r2, r3, ip, lr}           @ 4\n\
-       stmia   r0!, {r2, r3, ip, lr}           @ 4\n\
-       mcr     p15, 0, r0, c7, c6, 1           @ 1   invalidate D line\n\
-       stmia   r0!, {r2, r3, ip, lr}           @ 4\n\
-       stmia   r0!, {r2, r3, ip, lr}           @ 4\n\
+1:     mcr     p15, 0, %0, c7, c6, 1           @ 1   invalidate D line\n\
+       stmia   %0!, {r2, r3, ip, lr}           @ 4\n\
+       stmia   %0!, {r2, r3, ip, lr}           @ 4\n\
+       mcr     p15, 0, %0, c7, c6, 1           @ 1   invalidate D line\n\
+       stmia   %0!, {r2, r3, ip, lr}           @ 4\n\
+       stmia   %0!, {r2, r3, ip, lr}           @ 4\n\
        subs    r1, r1, #1                      @ 1\n\
-       bne     1b                              @ 1\n\
-       ldr     pc, [sp], #4"
-       :
-       : "I" (PAGE_SIZE / 64));
+       bne     1b                              @ 1"
+       : "=r" (ptr)
+       : "0" (kaddr), "I" (PAGE_SIZE / 64)
+       : "r1", "r2", "r3", "ip", "lr");
+       kunmap_atomic(kaddr, KM_USER0);
 }
 
 struct cpu_user_fns v4_mc_user_fns __initdata = {
-       .cpu_clear_user_page    = v4_mc_clear_user_page, 
+       .cpu_clear_user_highpage = v4_mc_clear_user_highpage,
        .cpu_copy_user_highpage = v4_mc_copy_user_highpage,
 };