Merge branch 'tmpreg' into devel

[safe/jmp/linux-2.6] / arch / arm / mm / cache-v4.S

diff --git a/arch/arm/mm/cache-v4.S b/arch/arm/mm/cache-v4.S
index 3668611..4810f7e 100644 (file)
--- a/arch/arm/mm/cache-v4.S
+++ b/arch/arm/mm/cache-v4.S
@@ -82,28 +82,15 @@ ENTRY(v4_coherent_user_range)
        mov     pc, lr
 
 /*
- *     flush_kern_dcache_page(void *page)
+ *     flush_kern_dcache_area(void *addr, size_t size)
  *
  *     Ensure no D cache aliasing occurs, either with itself or
  *     the I cache
  *
- *     - addr  - page aligned address
+ *     - addr  - kernel address
+ *     - size  - region size
  */
-ENTRY(v4_flush_kern_dcache_page)
-       /* FALLTHROUGH */
-
-/*
- *     dma_inv_range(start, end)
- *
- *     Invalidate (discard) the specified virtual address range.
- *     May not write back any entries.  If 'start' or 'end'
- *     are not cache line aligned, those lines must be written
- *     back.
- *
- *     - start  - virtual start address
- *     - end    - virtual end address
- */
-ENTRY(v4_dma_inv_range)
+ENTRY(v4_flush_kern_dcache_area)
        /* FALLTHROUGH */
 
 /*
@@ -119,18 +106,29 @@ ENTRY(v4_dma_flush_range)
        mov     r0, #0
        mcr     p15, 0, r0, c7, c7, 0           @ flush ID cache
 #endif
+       mov     pc, lr
+
+/*
+ *     dma_unmap_area(start, size, dir)
+ *     - start - kernel virtual start address
+ *     - size  - size of region
+ *     - dir   - DMA direction
+ */
+ENTRY(v4_dma_unmap_area)
+       teq     r2, #DMA_TO_DEVICE
+       bne     v4_dma_flush_range
        /* FALLTHROUGH */
 
 /*
- *     dma_clean_range(start, end)
- *
- *     Clean (write back) the specified virtual address range.
- *
- *     - start  - virtual start address
- *     - end    - virtual end address
+ *     dma_map_area(start, size, dir)
+ *     - start - kernel virtual start address
+ *     - size  - size of region
+ *     - dir   - DMA direction
  */
-ENTRY(v4_dma_clean_range)
+ENTRY(v4_dma_map_area)
        mov     pc, lr
+ENDPROC(v4_dma_unmap_area)
+ENDPROC(v4_dma_map_area)
 
        __INITDATA
 
@@ -141,8 +139,8 @@ ENTRY(v4_cache_fns)
        .long   v4_flush_user_cache_range
        .long   v4_coherent_kern_range
        .long   v4_coherent_user_range
-       .long   v4_flush_kern_dcache_page
-       .long   v4_dma_inv_range
-       .long   v4_dma_clean_range
+       .long   v4_flush_kern_dcache_area
+       .long   v4_dma_map_area
+       .long   v4_dma_unmap_area
        .long   v4_dma_flush_range
        .size   v4_cache_fns, . - v4_cache_fns