[ARM] 5531/1: Freescale STMP: get rid of HW_zzz macros [2/3]

[safe/jmp/linux-2.6] / arch / arm / mach-stmp37xx / include / mach / regs-timrot.h

diff --git a/arch/arm/mach-stmp37xx/include/mach/regs-timrot.h b/arch/arm/mach-stmp37xx/include/mach/regs-timrot.h
index 7f00030..4af0f6e 100644 (file)
--- a/arch/arm/mach-stmp37xx/include/mach/regs-timrot.h
+++ b/arch/arm/mach-stmp37xx/include/mach/regs-timrot.h
@@ -1,8 +1,8 @@
 /*
- * include/asm-arm/arch-stmp3xxx/regstimer.h
+ * stmp37xx: TIMROT register definitions
  *
- * Copyright (c) 2008 SigmaTel Inc
- * Copyright (c) 2008 Embedded Alley Solutions, Inc
+ * Copyright (c) 2008 Freescale Semiconductor
+ * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -16,37 +16,34 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  */
-#ifndef __ARCH_ARM_REGS_TIMROT_H
-#define __ARCH_ARM_REGS_TIMROT_H
+#ifndef _MACH_REGS_TIMROT
+#define _MACH_REGS_TIMROT
 
-#include <mach/stmp3xxx_regs.h>
+#define REGS_TIMROT_BASE       (STMP3XXX_REGS_BASE + 0x68000)
 
-#define REGS_TIMROT_BASE (REGS_BASE + 0x00068000)
+#define HW_TIMROT_ROTCTRL      0x0
+#define BM_TIMROT_ROTCTRL_CLKGATE      0x40000000
+#define BM_TIMROT_ROTCTRL_SFTRST       0x80000000
 
-HW_REGISTER(HW_TIMROT_ROTCTRL, REGS_TIMROT_BASE, 0)
-#define BM_TIMROT_ROTCTRL_SFTRST      0x80000000
-#define BM_TIMROT_ROTCTRL_CLKGATE      0x40000000
+#define HW_TIMROT_TIMCTRL0     (0x20 + 0 * 0x20)
+#define HW_TIMROT_TIMCTRL1     (0x20 + 1 * 0x20)
+#define HW_TIMROT_TIMCTRL2     (0x20 + 2 * 0x20)
 
-HW_REGISTER_INDEXED(HW_TIMROT_TIMCTRLn, REGS_TIMROT_BASE, 0x20, 0x20)
-#define BM_TIMROT_TIMCTRLn_SELECT      0x0000000F
-#define BF_TIMROT_TIMCTRLn_SELECT(v)   (((v) << 0) & BM_TIMROT_TIMCTRLn_SELECT)
-#define BM_TIMROT_TIMCTRLn_PRESCALE      0x00000030
-#define BF_TIMROT_TIMCTRLn_PRESCALE(v)   \
-       (((v) << 4) & BM_TIMROT_TIMCTRLn_PRESCALE)
-#define BM_TIMROT_TIMCTRLn_RELOAD      0x00000040
-#define BF_TIMROT_TIMCTRLn_RELOAD(v)   (((v) << 6) & BM_TIMROT_TIMCTRLn_RELOAD)
-#define BM_TIMROT_TIMCTRLn_UPDATE      0x00000080
-#define BF_TIMROT_TIMCTRLn_UPDATE(v)   (((v) << 7) & BM_TIMROT_TIMCTRLn_UPDATE)
-#define BM_TIMROT_TIMCTRLn_POLARITY      0x00000100
-#define BF_TIMROT_TIMCTRLn_POLARITY(v)   \
-       (((v) << 8) & BM_TIMROT_TIMCTRLn_POLARITY)
-#define BM_TIMROT_TIMCTRLn_IRQ_EN      0x00004000
-#define BF_TIMROT_TIMCTRLn_IRQ_EN(v)   \
-       (((v) << 14) & BM_TIMROT_TIMCTRLn_IRQ_EN)
-#define BM_TIMROT_TIMCTRLn_IRQ      0x00008000
-#define BF_TIMROT_TIMCTRLn_IRQ(v)   (((v) << 15) & BM_TIMROT_TIMCTRLn_IRQ)
-HW_REGISTER_0_INDEXED(HW_TIMROT_TIMCOUNTn, REGS_TIMROT_BASE, 0x30, 0x20)
+#define HW_TIMROT_TIMCTRLn     0x20
+#define BM_TIMROT_TIMCTRLn_SELECT      0x0000000F
+#define BP_TIMROT_TIMCTRLn_SELECT      0
+#define BM_TIMROT_TIMCTRLn_PRESCALE    0x00000030
+#define BP_TIMROT_TIMCTRLn_PRESCALE    4
+#define BM_TIMROT_TIMCTRLn_RELOAD      0x00000040
+#define BM_TIMROT_TIMCTRLn_UPDATE      0x00000080
+#define BM_TIMROT_TIMCTRLn_IRQ_EN      0x00004000
+#define BM_TIMROT_TIMCTRLn_IRQ 0x00008000
 
-#endif /* __ARCH_ARM_REGSTIMER_H */
+#define HW_TIMROT_TIMCOUNT0    (0x30 + 0 * 0x20)
+#define HW_TIMROT_TIMCOUNT1    (0x30 + 1 * 0x20)
+#define HW_TIMROT_TIMCOUNT2    (0x30 + 2 * 0x20)
+
+#define HW_TIMROT_TIMCOUNTn    0x30
+#endif