OMAP3: clock: Remove unnecessarily .init initializers from OMAP3 clocks

[safe/jmp/linux-2.6] / arch / arm / mach-omap2 / control.c

diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index 3ea417d..cdd1f35 100644 (file)
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -85,6 +85,8 @@ struct omap3_scratchpad_sdrc_block {
        u32 block_size;
 };
 
+void *omap3_secure_ram_storage;
+
 /*
  * This is used to store ARM registers in SDRAM before attempting
  * an MPU OFF. The save and restore happens from the SRAM sleep code.
@@ -207,9 +209,18 @@ void omap3_save_scratchpad_contents(void)
 
        /* Populate the Scratchpad contents */
        scratchpad_contents.boot_config_ptr = 0x0;
-       scratchpad_contents.public_restore_ptr =
-                        virt_to_phys(get_restore_pointer());
-       scratchpad_contents.secure_ram_restore_ptr = 0x0;
+       if (omap_rev() != OMAP3430_REV_ES3_0 &&
+                                       omap_rev() != OMAP3430_REV_ES3_1)
+               scratchpad_contents.public_restore_ptr =
+                       virt_to_phys(get_restore_pointer());
+       else
+               scratchpad_contents.public_restore_ptr =
+                       virt_to_phys(get_es3_restore_pointer());
+       if (omap_type() == OMAP2_DEVICE_TYPE_GP)
+               scratchpad_contents.secure_ram_restore_ptr = 0x0;
+       else
+               scratchpad_contents.secure_ram_restore_ptr =
+                       (u32) __pa(omap3_secure_ram_storage);
        scratchpad_contents.sdrc_module_semaphore = 0x0;
        scratchpad_contents.prcm_block_offset = 0x2C;
        scratchpad_contents.sdrc_block_offset = 0x64;
@@ -224,7 +235,7 @@ void omap3_save_scratchpad_contents(void)
        prcm_block_contents.cm_clksel_wkup =
                        cm_read_mod_reg(WKUP_MOD, CM_CLKSEL);
        prcm_block_contents.cm_clken_pll =
-                       cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKEN_PLL);
+                       cm_read_mod_reg(PLL_MOD, CM_CLKEN);
        prcm_block_contents.cm_autoidle_pll =
                        cm_read_mod_reg(PLL_MOD, OMAP3430_CM_AUTOIDLE_PLL);
        prcm_block_contents.cm_clksel1_pll =
@@ -254,7 +265,21 @@ void omap3_save_scratchpad_contents(void)
                        (sdrc_read_reg(SDRC_ERR_TYPE) & 0xFFFF);
        sdrc_block_contents.dll_a_ctrl = sdrc_read_reg(SDRC_DLLA_CTRL);
        sdrc_block_contents.dll_b_ctrl = 0x0;
-       sdrc_block_contents.power = sdrc_read_reg(SDRC_POWER);
+       /*
+        * Due to a OMAP3 errata (1.142), on EMU/HS devices SRDC should
+        * be programed to issue automatic self refresh on timeout
+        * of AUTO_CNT = 1 prior to any transition to OFF mode.
+        */
+       if ((omap_type() != OMAP2_DEVICE_TYPE_GP)
+                       && (omap_rev() >= OMAP3430_REV_ES3_0))
+               sdrc_block_contents.power = (sdrc_read_reg(SDRC_POWER) &
+                               ~(SDRC_POWER_AUTOCOUNT_MASK|
+                               SDRC_POWER_CLKCTRL_MASK)) |
+                               (1 << SDRC_POWER_AUTOCOUNT_SHIFT) |
+                               SDRC_SELF_REFRESH_ON_AUTOCOUNT;
+       else
+               sdrc_block_contents.power = sdrc_read_reg(SDRC_POWER);
+
        sdrc_block_contents.cs_0 = 0x0;
        sdrc_block_contents.mcfg_0 = sdrc_read_reg(SDRC_MCFG_0);
        sdrc_block_contents.mr_0 = (sdrc_read_reg(SDRC_MR_0) & 0xFFFF);