[ARM] omap: arrange for clock recalc methods to return the rate

[safe/jmp/linux-2.6] / arch / arm / mach-omap2 / clock.c

diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 222c2c0..5020cb1 100644 (file)
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -239,11 +239,11 @@ u32 omap2_get_dpll_rate(struct clk *clk)
  * Used for clocks that have the same value as the parent clock,
  * divided by some factor
  */
-void omap2_fixed_divisor_recalc(struct clk *clk)
+unsigned long omap2_fixed_divisor_recalc(struct clk *clk)
 {
        WARN_ON(!clk->fixed_div);
 
-       clk->rate = clk->parent->rate / clk->fixed_div;
+       return clk->parent->rate / clk->fixed_div;
 }
 
 /**
@@ -419,20 +419,17 @@ int omap2_clk_enable(struct clk *clk)
        int ret = 0;
 
        if (clk->usecount++ == 0) {
+               if (clk->clkdm)
+                       omap2_clkdm_clk_enable(clk->clkdm, clk);
+
                if (clk->parent) {
                        ret = omap2_clk_enable(clk->parent);
                        if (ret)
                                goto err;
                }
 
-               if (clk->clkdm)
-                       omap2_clkdm_clk_enable(clk->clkdm, clk);
-
                ret = _omap2_clk_enable(clk);
                if (ret) {
-                       if (clk->clkdm)
-                               omap2_clkdm_clk_disable(clk->clkdm, clk);
-
                        if (clk->parent)
                                omap2_clk_disable(clk->parent);
 
@@ -442,6 +439,8 @@ int omap2_clk_enable(struct clk *clk)
        return ret;
 
 err:
+       if (clk->clkdm)
+               omap2_clkdm_clk_disable(clk->clkdm, clk);
        clk->usecount--;
        return ret;
 }
@@ -450,21 +449,22 @@ err:
  * Used for clocks that are part of CLKSEL_xyz governed clocks.
  * REVISIT: Maybe change to use clk->enable() functions like on omap1?
  */
-void omap2_clksel_recalc(struct clk *clk)
+unsigned long omap2_clksel_recalc(struct clk *clk)
 {
+       unsigned long rate;
        u32 div = 0;
 
        pr_debug("clock: recalc'ing clksel clk %s\n", clk->name);
 
        div = omap2_clksel_get_divisor(clk);
        if (div == 0)
-               return;
+               return clk->rate;
 
-       if (clk->rate == (clk->parent->rate / div))
-               return;
-       clk->rate = clk->parent->rate / div;
+       rate = clk->parent->rate / div;
+
+       pr_debug("clock: new clock rate is %ld (div %d)\n", rate, div);
 
-       pr_debug("clock: new clock rate is %ld (div %d)\n", clk->rate, div);
+       return rate;
 }
 
 /**