Merge branch 'topic/core-cleanup' into for-linus
[safe/jmp/linux-2.6] / arch / arm / mach-omap1 / timer32k.c
index 1f7365f..20cfbcc 100644 (file)
@@ -1,5 +1,5 @@
 /*
- * linux/arch/arm/plat-omap/timer32k.c
+ * linux/arch/arm/mach-omap1/timer32k.c
  *
  * OMAP 32K Timer
  *
 #include <linux/interrupt.h>
 #include <linux/sched.h>
 #include <linux/spinlock.h>
-
 #include <linux/err.h>
 #include <linux/clk.h>
 #include <linux/clocksource.h>
 #include <linux/clockchips.h>
+#include <linux/io.h>
 
 #include <asm/system.h>
-#include <asm/hardware.h>
-#include <asm/io.h>
+#include <mach/hardware.h>
 #include <asm/leds.h>
 #include <asm/irq.h>
 #include <asm/mach/irq.h>
 #include <asm/mach/time.h>
-#include <asm/arch/dmtimer.h>
+#include <plat/dmtimer.h>
 
 struct sys_timer omap_timer;
 
@@ -69,14 +68,6 @@ struct sys_timer omap_timer;
  * ---------------------------------------------------------------------------
  */
 
-#if defined(CONFIG_ARCH_OMAP16XX)
-#define TIMER_32K_SYNCHRONIZED         0xfffbc410
-#elif defined(CONFIG_ARCH_OMAP24XX)
-#define TIMER_32K_SYNCHRONIZED         (OMAP24XX_32KSYNCT_BASE + 0x10)
-#else
-#error OMAP 32KHz timer does not currently work on 15XX!
-#endif
-
 /* 16xx specific defines */
 #define OMAP1_32K_TIMER_BASE           0xfffb9000
 #define OMAP1_32K_TIMER_CR             0x08
@@ -119,6 +110,14 @@ static inline void omap_32k_timer_stop(void)
 
 #define omap_32k_timer_ack_irq()
 
+static int omap_32k_timer_set_next_event(unsigned long delta,
+                                        struct clock_event_device *dev)
+{
+       omap_32k_timer_start(delta);
+
+       return 0;
+}
+
 static void omap_32k_timer_set_mode(enum clock_event_mode mode,
                                    struct clock_event_device *evt)
 {
@@ -139,20 +138,12 @@ static void omap_32k_timer_set_mode(enum clock_event_mode mode,
 
 static struct clock_event_device clockevent_32k_timer = {
        .name           = "32k-timer",
-       .features       = CLOCK_EVT_FEAT_PERIODIC,
+       .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
        .shift          = 32,
+       .set_next_event = omap_32k_timer_set_next_event,
        .set_mode       = omap_32k_timer_set_mode,
 };
 
-/*
- * The 32KHz synchronized timer is an additional timer on 16xx.
- * It is always running.
- */
-static inline unsigned long omap_32k_sync_timer_read(void)
-{
-       return omap_readl(TIMER_32K_SYNCHRONIZED);
-}
-
 static irqreturn_t omap_32k_timer_interrupt(int irq, void *dev_id)
 {
        struct clock_event_device *evt = &clockevent_32k_timer;
@@ -171,6 +162,8 @@ static struct irqaction omap_32k_timer_irq = {
 
 static __init void omap_init_32k_timer(void)
 {
+       setup_irq(INT_OS_TIMER, &omap_32k_timer_irq);
+
        clockevent_32k_timer.mult = div_sc(OMAP_32K_TICKS_PER_SEC,
                                           NSEC_PER_SEC,
                                           clockevent_32k_timer.shift);
@@ -179,7 +172,7 @@ static __init void omap_init_32k_timer(void)
        clockevent_32k_timer.min_delta_ns =
                clockevent_delta2ns(1, &clockevent_32k_timer);
 
-       clockevent_32k_timer.cpumask = cpumask_of_cpu(0);
+       clockevent_32k_timer.cpumask = cpumask_of(0);
        clockevents_register_device(&clockevent_32k_timer);
 }