omap: rx51_defconfig: Remove duplicate phonet
[safe/jmp/linux-2.6] / arch / arm / mach-omap1 / fpga.c
index c12a783..5cfce16 100644 (file)
@@ -1,5 +1,5 @@
 /*
- * linux/arch/arm/mach-omap/fpga.c
+ * linux/arch/arm/mach-omap1/fpga.c
  *
  * Interrupt handler for OMAP-1510 Innovator FPGA
  *
  * published by the Free Software Foundation.
  */
 
-#include <linux/config.h>
 #include <linux/types.h>
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/device.h>
 #include <linux/errno.h>
+#include <linux/io.h>
 
-#include <asm/hardware.h>
-#include <asm/io.h>
+#include <mach/hardware.h>
 #include <asm/irq.h>
 #include <asm/mach/irq.h>
 
-#include <asm/arch/fpga.h>
-#include <asm/arch/gpio.h>
+#include <plat/fpga.h>
+#include <mach/gpio.h>
 
 static void fpga_mask_irq(unsigned int irq)
 {
-       irq -= OMAP1510_IH_FPGA_BASE;
+       irq -= OMAP_FPGA_IRQ_BASE;
 
        if (irq < 8)
                __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO)
@@ -66,7 +65,7 @@ static void fpga_ack_irq(unsigned int irq)
 
 static void fpga_unmask_irq(unsigned int irq)
 {
-       irq -= OMAP1510_IH_FPGA_BASE;
+       irq -= OMAP_FPGA_IRQ_BASE;
 
        if (irq < 8)
                __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO) | (1 << irq)),
@@ -85,10 +84,8 @@ static void fpga_mask_ack_irq(unsigned int irq)
        fpga_ack_irq(irq);
 }
 
-void innovator_fpga_IRQ_demux(unsigned int irq, struct irqdesc *desc,
-                             struct pt_regs *regs)
+void innovator_fpga_IRQ_demux(unsigned int irq, struct irq_desc *desc)
 {
-       struct irqdesc *d;
        u32 stat;
        int fpga_irq;
 
@@ -97,24 +94,25 @@ void innovator_fpga_IRQ_demux(unsigned int irq, struct irqdesc *desc,
        if (!stat)
                return;
 
-       for (fpga_irq = OMAP1510_IH_FPGA_BASE;
-            (fpga_irq < (OMAP1510_IH_FPGA_BASE + NR_FPGA_IRQS)) && stat;
+       for (fpga_irq = OMAP_FPGA_IRQ_BASE;
+            (fpga_irq < OMAP_FPGA_IRQ_END) && stat;
             fpga_irq++, stat >>= 1) {
                if (stat & 1) {
-                       d = irq_desc + fpga_irq;
-                       desc_handle_irq(fpga_irq, d, regs);
+                       generic_handle_irq(fpga_irq);
                }
        }
 }
 
-static struct irqchip omap_fpga_irq_ack = {
+static struct irq_chip omap_fpga_irq_ack = {
+       .name           = "FPGA-ack",
        .ack            = fpga_mask_ack_irq,
        .mask           = fpga_mask_irq,
        .unmask         = fpga_unmask_irq,
 };
 
 
-static struct irqchip omap_fpga_irq = {
+static struct irq_chip omap_fpga_irq = {
+       .name           = "FPGA",
        .ack            = fpga_ack_irq,
        .mask           = fpga_mask_irq,
        .unmask         = fpga_unmask_irq,
@@ -134,7 +132,7 @@ static struct irqchip omap_fpga_irq = {
  * mask_ack routine for all of the FPGA interrupts has been changed from
  * fpga_mask_ack_irq() to fpga_ack_irq() so that the specific FPGA interrupt
  * being serviced is left unmasked.  We can do this because the FPGA cascade
- * interrupt is installed with the SA_INTERRUPT flag, which leaves all
+ * interrupt is installed with the IRQF_DISABLED flag, which leaves all
  * interrupts masked at the CPU while an FPGA interrupt handler executes.
  *
  * Limited testing indicates that this workaround appears to be effective
@@ -151,7 +149,7 @@ void omap1510_fpga_init_irq(void)
        __raw_writeb(0, OMAP1510_FPGA_IMR_HI);
        __raw_writeb(0, INNOVATOR_FPGA_IMR2);
 
-       for (i = OMAP1510_IH_FPGA_BASE; i < (OMAP1510_IH_FPGA_BASE + NR_FPGA_IRQS); i++) {
+       for (i = OMAP_FPGA_IRQ_BASE; i < OMAP_FPGA_IRQ_END; i++) {
 
                if (i == OMAP1510_INT_FPGA_TS) {
                        /*
@@ -168,7 +166,7 @@ void omap1510_fpga_init_irq(void)
                        set_irq_chip(i, &omap_fpga_irq);
                }
 
-               set_irq_handler(i, do_edge_IRQ);
+               set_irq_handler(i, handle_edge_irq);
                set_irq_flags(i, IRQF_VALID);
        }
 
@@ -179,9 +177,9 @@ void omap1510_fpga_init_irq(void)
         * NOTE: For general GPIO/MPUIO access and interrupts, please see
         * gpio.[ch]
         */
-       omap_request_gpio(13);
-       omap_set_gpio_direction(13, 1);
-       omap_set_gpio_edge_ctrl(13, OMAP_GPIO_RISING_EDGE);
+       gpio_request(13, "FPGA irq");
+       gpio_direction_input(13);
+       set_irq_type(gpio_to_irq(13), IRQ_TYPE_EDGE_RISING);
        set_irq_chained_handler(OMAP1510_INT_FPGA, innovator_fpga_IRQ_demux);
 }