ARM: MX3: make CPU revision number detection work on all boards

[safe/jmp/linux-2.6] / arch / arm / mach-mx3 / clock.c

diff --git a/arch/arm/mach-mx3/clock.c b/arch/arm/mach-mx3/clock.c
index ca46f48..27a318a 100644 (file)
--- a/arch/arm/mach-mx3/clock.c
+++ b/arch/arm/mach-mx3/clock.c
@@ -29,6 +29,7 @@
 
 #include <mach/clock.h>
 #include <mach/hardware.h>
+#include <mach/mx31.h>
 #include <mach/common.h>
 
 #include "crm_regs.h"
@@ -402,6 +403,11 @@ static unsigned long clk_ckih_get_rate(struct clk *clk)
        return ckih_rate;
 }
 
+static unsigned long clk_ckil_get_rate(struct clk *clk)
+{
+       return CKIL_CLK_FREQ;
+}
+
 static struct clk ckih_clk = {
        .get_rate = clk_ckih_get_rate,
 };
@@ -483,7 +489,7 @@ DEFINE_CLOCK(i2c3_clk,    2, MXC_CCM_CGR0, 30, NULL, NULL, &perclk_clk);
 DEFINE_CLOCK(mpeg4_clk,   0, MXC_CCM_CGR1,  0, NULL, NULL, &ahb_clk);
 DEFINE_CLOCK(mstick1_clk, 0, MXC_CCM_CGR1,  2, mstick1_get_rate, NULL, &usb_pll_clk);
 DEFINE_CLOCK(mstick2_clk, 1, MXC_CCM_CGR1,  4, mstick2_get_rate, NULL, &usb_pll_clk);
-DEFINE_CLOCK1(csi_clk,    0, MXC_CCM_CGR1,  6, csi, NULL, &ahb_clk);
+DEFINE_CLOCK1(csi_clk,    0, MXC_CCM_CGR1,  6, csi, NULL, &serial_pll_clk);
 DEFINE_CLOCK(rtc_clk,     0, MXC_CCM_CGR1,  8, NULL, NULL, &ipg_clk);
 DEFINE_CLOCK(wdog_clk,    0, MXC_CCM_CGR1, 10, NULL, NULL, &ipg_clk);
 DEFINE_CLOCK(pwm_clk,     0, MXC_CCM_CGR1, 12, NULL, NULL, &perclk_clk);
@@ -508,6 +514,7 @@ DEFINE_CLOCK(usb_clk1,    0, NULL,          0, usb_get_rate, NULL, &usb_pll_clk)
 DEFINE_CLOCK(nfc_clk,     0, NULL,          0, nfc_get_rate, NULL, &ahb_clk);
 DEFINE_CLOCK(scc_clk,     0, NULL,          0, NULL, NULL, &ipg_clk);
 DEFINE_CLOCK(ipg_clk,     0, NULL,          0, ipg_get_rate, NULL, &ahb_clk);
+DEFINE_CLOCK(ckil_clk,    0, NULL,          0, clk_ckil_get_rate, NULL, NULL);
 
 #define _REGISTER_CLOCK(d, n, c) \
        { \
@@ -516,14 +523,14 @@ DEFINE_CLOCK(ipg_clk,     0, NULL,          0, ipg_get_rate, NULL, &ahb_clk);
                .clk = &c, \
        },
 
-static struct clk_lookup lookups[] __initdata = {
+static struct clk_lookup lookups[] = {
        _REGISTER_CLOCK(NULL, "emi", emi_clk)
-       _REGISTER_CLOCK(NULL, "cspi", cspi1_clk)
-       _REGISTER_CLOCK(NULL, "cspi", cspi2_clk)
-       _REGISTER_CLOCK(NULL, "cspi", cspi3_clk)
+       _REGISTER_CLOCK("spi_imx.0", NULL, cspi1_clk)
+       _REGISTER_CLOCK("spi_imx.1", NULL, cspi2_clk)
+       _REGISTER_CLOCK("spi_imx.2", NULL, cspi3_clk)
        _REGISTER_CLOCK(NULL, "gpt", gpt_clk)
        _REGISTER_CLOCK(NULL, "pwm", pwm_clk)
-       _REGISTER_CLOCK(NULL, "wdog", wdog_clk)
+       _REGISTER_CLOCK("imx-wdt.0", NULL, wdog_clk)
        _REGISTER_CLOCK(NULL, "rtc", rtc_clk)
        _REGISTER_CLOCK(NULL, "epit", epit1_clk)
        _REGISTER_CLOCK(NULL, "epit", epit2_clk)
@@ -531,9 +538,15 @@ static struct clk_lookup lookups[] __initdata = {
        _REGISTER_CLOCK("ipu-core", NULL, ipu_clk)
        _REGISTER_CLOCK("mx3_sdc_fb", NULL, ipu_clk)
        _REGISTER_CLOCK(NULL, "kpp", kpp_clk)
+       _REGISTER_CLOCK("mxc-ehci.0", "usb", usb_clk1)
+       _REGISTER_CLOCK("mxc-ehci.0", "usb_ahb", usb_clk2)
+       _REGISTER_CLOCK("mxc-ehci.1", "usb", usb_clk1)
+       _REGISTER_CLOCK("mxc-ehci.1", "usb_ahb", usb_clk2)
+       _REGISTER_CLOCK("mxc-ehci.2", "usb", usb_clk1)
+       _REGISTER_CLOCK("mxc-ehci.2", "usb_ahb", usb_clk2)
        _REGISTER_CLOCK("fsl-usb2-udc", "usb", usb_clk1)
        _REGISTER_CLOCK("fsl-usb2-udc", "usb_ahb", usb_clk2)
-       _REGISTER_CLOCK("mx3-camera.0", "csi", csi_clk)
+       _REGISTER_CLOCK("mx3-camera.0", NULL, csi_clk)
        _REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk)
        _REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk)
        _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk)
@@ -545,8 +558,8 @@ static struct clk_lookup lookups[] __initdata = {
        _REGISTER_CLOCK("mxc_w1.0", NULL, owire_clk)
        _REGISTER_CLOCK("mxc-mmc.0", NULL, sdhc1_clk)
        _REGISTER_CLOCK("mxc-mmc.1", NULL, sdhc2_clk)
-       _REGISTER_CLOCK(NULL, "ssi", ssi1_clk)
-       _REGISTER_CLOCK(NULL, "ssi", ssi2_clk)
+       _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk)
+       _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk)
        _REGISTER_CLOCK(NULL, "firi", firi_clk)
        _REGISTER_CLOCK(NULL, "ata", ata_clk)
        _REGISTER_CLOCK(NULL, "rtic", rtic_clk)
@@ -559,6 +572,7 @@ static struct clk_lookup lookups[] __initdata = {
        _REGISTER_CLOCK(NULL, "iim", iim_clk)
        _REGISTER_CLOCK(NULL, "mpeg4", mpeg4_clk)
        _REGISTER_CLOCK(NULL, "mbx", mbx_clk)
+       _REGISTER_CLOCK("mxc_rtc", NULL, ckil_clk)
 };
 
 int __init mx31_clocks_init(unsigned long fref)
@@ -566,13 +580,18 @@ int __init mx31_clocks_init(unsigned long fref)
        u32 reg;
        int i;
 
-       mxc_set_cpu_type(MXC_CPU_MX31);
-
        ckih_rate = fref;
 
        for (i = 0; i < ARRAY_SIZE(lookups); i++)
                clkdev_add(&lookups[i]);
 
+       /* change the csi_clk parent if necessary */
+       reg = __raw_readl(MXC_CCM_CCMR);
+       if (!(reg & MXC_CCM_CCMR_CSCS))
+               if (clk_set_parent(&csi_clk, &usb_pll_clk))
+                       pr_err("%s: error changing csi_clk parent\n", __func__);
+
+
        /* Turn off all possible clocks */
        __raw_writel((3 << 4), MXC_CCM_CGR0);
        __raw_writel(0, MXC_CCM_CGR1);
@@ -581,6 +600,12 @@ int __init mx31_clocks_init(unsigned long fref)
                                           MX32, but still required to be set */
                     MXC_CCM_CGR2);
 
+       /*
+        * Before turning off usb_pll make sure ipg_per_clk is generated
+        * by ipg_clk and not usb_pll.
+        */
+       __raw_writel(__raw_readl(MXC_CCM_CCMR) | (1 << 24), MXC_CCM_CCMR);
+
        usb_pll_disable(&usb_pll_clk);
 
        pr_info("Clock input source is %ld\n", clk_get_rate(&ckih_clk));
@@ -591,6 +616,8 @@ int __init mx31_clocks_init(unsigned long fref)
 
        clk_enable(&serial_pll_clk);
 
+       mx31_read_cpu_rev();
+
        if (mx31_revision() >= CHIP_REV_2_0) {
                reg = __raw_readl(MXC_CCM_PMCR1);
                /* No PLL restart on DVFS switch; enable auto EMI handshake */
@@ -598,7 +625,7 @@ int __init mx31_clocks_init(unsigned long fref)
                __raw_writel(reg, MXC_CCM_PMCR1);
        }
 
-       mxc_timer_init(&ipg_clk);
+       mxc_timer_init(&ipg_clk, IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT);
 
        return 0;
 }