Watchdog: sb_wdog.c: Fix sibyte watchdog initialization

[safe/jmp/linux-2.6] / arch / arm / mach-mx2 / clock_imx27.c

diff --git a/arch/arm/mach-mx2/clock_imx27.c b/arch/arm/mach-mx2/clock_imx27.c
index 6db9856..0f0823c 100644 (file)
--- a/arch/arm/mach-mx2/clock_imx27.c
+++ b/arch/arm/mach-mx2/clock_imx27.c
@@ -29,7 +29,7 @@
 #include <mach/common.h>
 #include <mach/hardware.h>
 
-#define IO_ADDR_CCM(off)       (IO_ADDRESS(MX27_CCM_BASE_ADDR) + (off))
+#define IO_ADDR_CCM(off)       (MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR + (off)))
 
 /* Register offsets */
 #define CCM_CSCR               IO_ADDR_CCM(0x0)
@@ -721,7 +721,6 @@ static void __init to2_adjust_clocks(void)
 int __init mx27_clocks_init(unsigned long fref)
 {
        u32 cscr = __raw_readl(CCM_CSCR);
-       int i;
 
        external_high_reference = fref;
 
@@ -738,8 +737,7 @@ int __init mx27_clocks_init(unsigned long fref)
 
        to2_adjust_clocks();
 
-       for (i = 0; i < ARRAY_SIZE(lookups); i++)
-               clkdev_add(&lookups[i]);
+       clkdev_add_table(lookups, ARRAY_SIZE(lookups));
 
        /* Turn off all clocks we do not need */
        __raw_writel(0, CCM_PCCR0);
@@ -757,7 +755,7 @@ int __init mx27_clocks_init(unsigned long fref)
        clk_enable(&uart1_clk);
 #endif
 
-       mxc_timer_init(&gpt1_clk, IO_ADDRESS(MX27_GPT1_BASE_ADDR),
+       mxc_timer_init(&gpt1_clk, MX27_IO_ADDRESS(MX27_GPT1_BASE_ADDR),
                        MX27_INT_GPT1);
 
        return 0;