netns xfrm: fix "ip xfrm state|policy count" misreport
[safe/jmp/linux-2.6] / arch / arm / mach-ep93xx / core.c
index 913ea43..1f0d665 100644 (file)
@@ -3,6 +3,7 @@
  * Core routines for Cirrus EP93xx chips.
  *
  * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
+ * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org>
  *
  * Thanks go to Michael Burian and Ray Lehtiniemi for their key
  * role in the ep93xx linux community.
 
 #include <linux/kernel.h>
 #include <linux/init.h>
-#include <linux/spinlock.h>
-#include <linux/sched.h>
+#include <linux/platform_device.h>
 #include <linux/interrupt.h>
-#include <linux/serial.h>
-#include <linux/tty.h>
-#include <linux/bitops.h>
-#include <linux/serial.h>
-#include <linux/serial_8250.h>
-#include <linux/serial_core.h>
-#include <linux/device.h>
-#include <linux/mm.h>
-#include <linux/time.h>
+#include <linux/dma-mapping.h>
 #include <linux/timex.h>
-#include <linux/delay.h>
+#include <linux/io.h>
+#include <linux/gpio.h>
+#include <linux/leds.h>
 #include <linux/termios.h>
 #include <linux/amba/bus.h>
 #include <linux/amba/serial.h>
+#include <linux/i2c.h>
+#include <linux/i2c-gpio.h>
 
-#include <asm/types.h>
-#include <asm/setup.h>
-#include <asm/memory.h>
-#include <asm/hardware.h>
-#include <asm/irq.h>
-#include <asm/system.h>
-#include <asm/tlbflush.h>
-#include <asm/pgtable.h>
-#include <asm/io.h>
+#include <mach/hardware.h>
+#include <mach/fb.h>
+#include <mach/ep93xx_keypad.h>
 
 #include <asm/mach/map.h>
 #include <asm/mach/time.h>
 #include <asm/mach/irq.h>
-#include <asm/arch/gpio.h>
 
 #include <asm/hardware/vic.h>
 
@@ -95,12 +84,10 @@ void __init ep93xx_map_io(void)
  */
 static unsigned int last_jiffy_time;
 
-#define TIMER4_TICKS_PER_JIFFY         ((CLOCK_TICK_RATE + (HZ/2)) / HZ)
+#define TIMER4_TICKS_PER_JIFFY         DIV_ROUND_CLOSEST(CLOCK_TICK_RATE, HZ)
 
-static int ep93xx_timer_interrupt(int irq, void *dev_id)
+static irqreturn_t ep93xx_timer_interrupt(int irq, void *dev_id)
 {
-       write_seqlock(&xtime_lock);
-
        __raw_writel(1, EP93XX_TIMER1_CLEAR);
        while ((signed long)
                (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time)
@@ -109,14 +96,12 @@ static int ep93xx_timer_interrupt(int irq, void *dev_id)
                timer_tick();
        }
 
-       write_sequnlock(&xtime_lock);
-
        return IRQ_HANDLED;
 }
 
 static struct irqaction ep93xx_timer_irq = {
        .name           = "ep93xx timer",
-       .flags          = IRQF_DISABLED | IRQF_TIMER,
+       .flags          = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
        .handler        = ep93xx_timer_interrupt,
 };
 
@@ -152,100 +137,60 @@ struct sys_timer ep93xx_timer = {
 /*************************************************************************
  * GPIO handling for EP93xx
  *************************************************************************/
-static unsigned char gpio_int_enable[2];
-static unsigned char gpio_int_type1[2];
-static unsigned char gpio_int_type2[2];
-
-static void update_gpio_ab_int_params(int port)
+static unsigned char gpio_int_unmasked[3];
+static unsigned char gpio_int_enabled[3];
+static unsigned char gpio_int_type1[3];
+static unsigned char gpio_int_type2[3];
+static unsigned char gpio_int_debounce[3];
+
+/* Port ordering is: A B F */
+static const u8 int_type1_register_offset[3]   = { 0x90, 0xac, 0x4c };
+static const u8 int_type2_register_offset[3]   = { 0x94, 0xb0, 0x50 };
+static const u8 eoi_register_offset[3]         = { 0x98, 0xb4, 0x54 };
+static const u8 int_en_register_offset[3]      = { 0x9c, 0xb8, 0x58 };
+static const u8 int_debounce_register_offset[3]        = { 0xa8, 0xc4, 0x64 };
+
+void ep93xx_gpio_update_int_params(unsigned port)
 {
-       if (port == 0) {
-               __raw_writeb(0, EP93XX_GPIO_A_INT_ENABLE);
-               __raw_writeb(gpio_int_type2[0], EP93XX_GPIO_A_INT_TYPE2);
-               __raw_writeb(gpio_int_type1[0], EP93XX_GPIO_A_INT_TYPE1);
-               __raw_writeb(gpio_int_enable[0], EP93XX_GPIO_A_INT_ENABLE);
-       } else if (port == 1) {
-               __raw_writeb(0, EP93XX_GPIO_B_INT_ENABLE);
-               __raw_writeb(gpio_int_type2[1], EP93XX_GPIO_B_INT_TYPE2);
-               __raw_writeb(gpio_int_type1[1], EP93XX_GPIO_B_INT_TYPE1);
-               __raw_writeb(gpio_int_enable[1], EP93XX_GPIO_B_INT_ENABLE);
-       }
-}
+       BUG_ON(port > 2);
 
+       __raw_writeb(0, EP93XX_GPIO_REG(int_en_register_offset[port]));
 
-static unsigned char data_register_offset[8] = {
-       0x00, 0x04, 0x08, 0x0c, 0x20, 0x30, 0x38, 0x40,
-};
+       __raw_writeb(gpio_int_type2[port],
+               EP93XX_GPIO_REG(int_type2_register_offset[port]));
 
-static unsigned char data_direction_register_offset[8] = {
-       0x10, 0x14, 0x18, 0x1c, 0x24, 0x34, 0x3c, 0x44,
-};
-
-void gpio_line_config(int line, int direction)
-{
-       unsigned int data_direction_register;
-       unsigned long flags;
-       unsigned char v;
-
-       data_direction_register =
-               EP93XX_GPIO_REG(data_direction_register_offset[line >> 3]);
-
-       local_irq_save(flags);
-       if (direction == GPIO_OUT) {
-               if (line >= 0 && line < 16) {
-                       gpio_int_enable[line >> 3] &= ~(1 << (line & 7));
-                       update_gpio_ab_int_params(line >> 3);
-               }
+       __raw_writeb(gpio_int_type1[port],
+               EP93XX_GPIO_REG(int_type1_register_offset[port]));
 
-               v = __raw_readb(data_direction_register);
-               v |= 1 << (line & 7);
-               __raw_writeb(v, data_direction_register);
-       } else if (direction == GPIO_IN) {
-               v = __raw_readb(data_direction_register);
-               v &= ~(1 << (line & 7));
-               __raw_writeb(v, data_direction_register);
-       }
-       local_irq_restore(flags);
+       __raw_writeb(gpio_int_unmasked[port] & gpio_int_enabled[port],
+               EP93XX_GPIO_REG(int_en_register_offset[port]));
 }
-EXPORT_SYMBOL(gpio_line_config);
 
-int gpio_line_get(int line)
+void ep93xx_gpio_int_mask(unsigned line)
 {
-       unsigned int data_register;
-
-       data_register = EP93XX_GPIO_REG(data_register_offset[line >> 3]);
-
-       return !!(__raw_readb(data_register) & (1 << (line & 7)));
+       gpio_int_unmasked[line >> 3] &= ~(1 << (line & 7));
 }
-EXPORT_SYMBOL(gpio_line_get);
 
-void gpio_line_set(int line, int value)
+void ep93xx_gpio_int_debounce(unsigned int irq, int enable)
 {
-       unsigned int data_register;
-       unsigned long flags;
-       unsigned char v;
-
-       data_register = EP93XX_GPIO_REG(data_register_offset[line >> 3]);
-
-       local_irq_save(flags);
-       if (value == EP93XX_GPIO_HIGH) {
-               v = __raw_readb(data_register);
-               v |= 1 << (line & 7);
-               __raw_writeb(v, data_register);
-       } else if (value == EP93XX_GPIO_LOW) {
-               v = __raw_readb(data_register);
-               v &= ~(1 << (line & 7));
-               __raw_writeb(v, data_register);
-       }
-       local_irq_restore(flags);
-}
-EXPORT_SYMBOL(gpio_line_set);
+       int line = irq_to_gpio(irq);
+       int port = line >> 3;
+       int port_mask = 1 << (line & 7);
+
+       if (enable)
+               gpio_int_debounce[port] |= port_mask;
+       else
+               gpio_int_debounce[port] &= ~port_mask;
 
+       __raw_writeb(gpio_int_debounce[port],
+               EP93XX_GPIO_REG(int_debounce_register_offset[port]));
+}
+EXPORT_SYMBOL(ep93xx_gpio_int_debounce);
 
 /*************************************************************************
  * EP93xx IRQ handling
  *************************************************************************/
-static void ep93xx_gpio_ab_irq_handler(unsigned int irq,
-               struct irq_desc *desc)
+static void ep93xx_gpio_ab_irq_handler(unsigned int irq, struct irq_desc *desc)
 {
        unsigned char status;
        int i;
@@ -253,51 +198,78 @@ static void ep93xx_gpio_ab_irq_handler(unsigned int irq,
        status = __raw_readb(EP93XX_GPIO_A_INT_STATUS);
        for (i = 0; i < 8; i++) {
                if (status & (1 << i)) {
-                       desc = irq_desc + IRQ_EP93XX_GPIO(0) + i;
-                       desc_handle_irq(IRQ_EP93XX_GPIO(0) + i, desc);
+                       int gpio_irq = gpio_to_irq(EP93XX_GPIO_LINE_A(0)) + i;
+                       generic_handle_irq(gpio_irq);
                }
        }
 
        status = __raw_readb(EP93XX_GPIO_B_INT_STATUS);
        for (i = 0; i < 8; i++) {
                if (status & (1 << i)) {
-                       desc = irq_desc + IRQ_EP93XX_GPIO(8) + i;
-                       desc_handle_irq(IRQ_EP93XX_GPIO(8) + i, desc);
+                       int gpio_irq = gpio_to_irq(EP93XX_GPIO_LINE_B(0)) + i;
+                       generic_handle_irq(gpio_irq);
                }
        }
 }
 
-static void ep93xx_gpio_ab_irq_mask_ack(unsigned int irq)
+static void ep93xx_gpio_f_irq_handler(unsigned int irq, struct irq_desc *desc)
 {
-       int line = irq - IRQ_EP93XX_GPIO(0);
-       int port = line >> 3;
+       /*
+        * map discontiguous hw irq range to continous sw irq range:
+        *
+        *  IRQ_EP93XX_GPIO{0..7}MUX -> gpio_to_irq(EP93XX_GPIO_LINE_F({0..7})
+        */
+       int port_f_idx = ((irq + 1) & 7) ^ 4; /* {19..22,47..50} -> {0..7} */
+       int gpio_irq = gpio_to_irq(EP93XX_GPIO_LINE_F(0)) + port_f_idx;
 
-       gpio_int_enable[port] &= ~(1 << (line & 7));
-       update_gpio_ab_int_params(port);
+       generic_handle_irq(gpio_irq);
+}
 
-       if (line >> 3) {
-               __raw_writel(1 << (line & 7), EP93XX_GPIO_B_INT_ACK);
-       } else {
-               __raw_writel(1 << (line & 7), EP93XX_GPIO_A_INT_ACK);
+static void ep93xx_gpio_irq_ack(unsigned int irq)
+{
+       int line = irq_to_gpio(irq);
+       int port = line >> 3;
+       int port_mask = 1 << (line & 7);
+
+       if ((irq_desc[irq].status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) {
+               gpio_int_type2[port] ^= port_mask; /* switch edge direction */
+               ep93xx_gpio_update_int_params(port);
        }
+
+       __raw_writeb(port_mask, EP93XX_GPIO_REG(eoi_register_offset[port]));
+}
+
+static void ep93xx_gpio_irq_mask_ack(unsigned int irq)
+{
+       int line = irq_to_gpio(irq);
+       int port = line >> 3;
+       int port_mask = 1 << (line & 7);
+
+       if ((irq_desc[irq].status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH)
+               gpio_int_type2[port] ^= port_mask; /* switch edge direction */
+
+       gpio_int_unmasked[port] &= ~port_mask;
+       ep93xx_gpio_update_int_params(port);
+
+       __raw_writeb(port_mask, EP93XX_GPIO_REG(eoi_register_offset[port]));
 }
 
-static void ep93xx_gpio_ab_irq_mask(unsigned int irq)
+static void ep93xx_gpio_irq_mask(unsigned int irq)
 {
-       int line = irq - IRQ_EP93XX_GPIO(0);
+       int line = irq_to_gpio(irq);
        int port = line >> 3;
 
-       gpio_int_enable[port] &= ~(1 << (line & 7));
-       update_gpio_ab_int_params(port);
+       gpio_int_unmasked[port] &= ~(1 << (line & 7));
+       ep93xx_gpio_update_int_params(port);
 }
 
-static void ep93xx_gpio_ab_irq_unmask(unsigned int irq)
+static void ep93xx_gpio_irq_unmask(unsigned int irq)
 {
-       int line = irq - IRQ_EP93XX_GPIO(0);
+       int line = irq_to_gpio(irq);
        int port = line >> 3;
 
-       gpio_int_enable[port] |= 1 << (line & 7);
-       update_gpio_ab_int_params(port);
+       gpio_int_unmasked[port] |= 1 << (line & 7);
+       ep93xx_gpio_update_int_params(port);
 }
 
 
@@ -306,57 +278,136 @@ static void ep93xx_gpio_ab_irq_unmask(unsigned int irq)
  * edge (1) triggered, while gpio_int_type2 controls whether it
  * triggers on low/falling (0) or high/rising (1).
  */
-static int ep93xx_gpio_ab_irq_type(unsigned int irq, unsigned int type)
+static int ep93xx_gpio_irq_type(unsigned int irq, unsigned int type)
 {
-       int port;
-       int line;
-
-       line = irq - IRQ_EP93XX_GPIO(0);
-       gpio_line_config(line, GPIO_IN);
-
-       port = line >> 3;
-       line &= 7;
-
-       if (type & IRQT_RISING) {
-               gpio_int_type1[port] |= 1 << line;
-               gpio_int_type2[port] |= 1 << line;
-       } else if (type & IRQT_FALLING) {
-               gpio_int_type1[port] |= 1 << line;
-               gpio_int_type2[port] &= ~(1 << line);
-       } else if (type & IRQT_HIGH) {
-               gpio_int_type1[port] &= ~(1 << line);
-               gpio_int_type2[port] |= 1 << line;
-       } else if (type & IRQT_LOW) {
-               gpio_int_type1[port] &= ~(1 << line);
-               gpio_int_type2[port] &= ~(1 << line);
+       struct irq_desc *desc = irq_desc + irq;
+       const int gpio = irq_to_gpio(irq);
+       const int port = gpio >> 3;
+       const int port_mask = 1 << (gpio & 7);
+
+       gpio_direction_input(gpio);
+
+       switch (type) {
+       case IRQ_TYPE_EDGE_RISING:
+               gpio_int_type1[port] |= port_mask;
+               gpio_int_type2[port] |= port_mask;
+               desc->handle_irq = handle_edge_irq;
+               break;
+       case IRQ_TYPE_EDGE_FALLING:
+               gpio_int_type1[port] |= port_mask;
+               gpio_int_type2[port] &= ~port_mask;
+               desc->handle_irq = handle_edge_irq;
+               break;
+       case IRQ_TYPE_LEVEL_HIGH:
+               gpio_int_type1[port] &= ~port_mask;
+               gpio_int_type2[port] |= port_mask;
+               desc->handle_irq = handle_level_irq;
+               break;
+       case IRQ_TYPE_LEVEL_LOW:
+               gpio_int_type1[port] &= ~port_mask;
+               gpio_int_type2[port] &= ~port_mask;
+               desc->handle_irq = handle_level_irq;
+               break;
+       case IRQ_TYPE_EDGE_BOTH:
+               gpio_int_type1[port] |= port_mask;
+               /* set initial polarity based on current input level */
+               if (gpio_get_value(gpio))
+                       gpio_int_type2[port] &= ~port_mask; /* falling */
+               else
+                       gpio_int_type2[port] |= port_mask; /* rising */
+               desc->handle_irq = handle_edge_irq;
+               break;
+       default:
+               pr_err("ep93xx: failed to set irq type %d for gpio %d\n",
+                      type, gpio);
+               return -EINVAL;
        }
-       update_gpio_ab_int_params(port);
+
+       gpio_int_enabled[port] |= port_mask;
+
+       desc->status &= ~IRQ_TYPE_SENSE_MASK;
+       desc->status |= type & IRQ_TYPE_SENSE_MASK;
+
+       ep93xx_gpio_update_int_params(port);
 
        return 0;
 }
 
-static struct irq_chip ep93xx_gpio_ab_irq_chip = {
-       .ack            = ep93xx_gpio_ab_irq_mask_ack,
-       .mask           = ep93xx_gpio_ab_irq_mask,
-       .unmask         = ep93xx_gpio_ab_irq_unmask,
-       .set_type       = ep93xx_gpio_ab_irq_type,
+static struct irq_chip ep93xx_gpio_irq_chip = {
+       .name           = "GPIO",
+       .ack            = ep93xx_gpio_irq_ack,
+       .mask_ack       = ep93xx_gpio_irq_mask_ack,
+       .mask           = ep93xx_gpio_irq_mask,
+       .unmask         = ep93xx_gpio_irq_unmask,
+       .set_type       = ep93xx_gpio_irq_type,
 };
 
 
 void __init ep93xx_init_irq(void)
 {
-       int irq;
+       int gpio_irq;
 
-       vic_init((void *)EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK);
-       vic_init((void *)EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK);
+       vic_init(EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK, 0);
+       vic_init(EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK, 0);
 
-       for (irq = IRQ_EP93XX_GPIO(0) ; irq <= IRQ_EP93XX_GPIO(15); irq++) {
-               set_irq_chip(irq, &ep93xx_gpio_ab_irq_chip);
-               set_irq_handler(irq, handle_level_irq);
-               set_irq_flags(irq, IRQF_VALID);
+       for (gpio_irq = gpio_to_irq(0);
+            gpio_irq <= gpio_to_irq(EP93XX_GPIO_LINE_MAX_IRQ); ++gpio_irq) {
+               set_irq_chip(gpio_irq, &ep93xx_gpio_irq_chip);
+               set_irq_handler(gpio_irq, handle_level_irq);
+               set_irq_flags(gpio_irq, IRQF_VALID);
        }
+
        set_irq_chained_handler(IRQ_EP93XX_GPIO_AB, ep93xx_gpio_ab_irq_handler);
+       set_irq_chained_handler(IRQ_EP93XX_GPIO0MUX, ep93xx_gpio_f_irq_handler);
+       set_irq_chained_handler(IRQ_EP93XX_GPIO1MUX, ep93xx_gpio_f_irq_handler);
+       set_irq_chained_handler(IRQ_EP93XX_GPIO2MUX, ep93xx_gpio_f_irq_handler);
+       set_irq_chained_handler(IRQ_EP93XX_GPIO3MUX, ep93xx_gpio_f_irq_handler);
+       set_irq_chained_handler(IRQ_EP93XX_GPIO4MUX, ep93xx_gpio_f_irq_handler);
+       set_irq_chained_handler(IRQ_EP93XX_GPIO5MUX, ep93xx_gpio_f_irq_handler);
+       set_irq_chained_handler(IRQ_EP93XX_GPIO6MUX, ep93xx_gpio_f_irq_handler);
+       set_irq_chained_handler(IRQ_EP93XX_GPIO7MUX, ep93xx_gpio_f_irq_handler);
+}
+
+
+/*************************************************************************
+ * EP93xx System Controller Software Locked register handling
+ *************************************************************************/
+
+/*
+ * syscon_swlock prevents anything else from writing to the syscon
+ * block while a software locked register is being written.
+ */
+static DEFINE_SPINLOCK(syscon_swlock);
+
+void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg)
+{
+       unsigned long flags;
+
+       spin_lock_irqsave(&syscon_swlock, flags);
+
+       __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
+       __raw_writel(val, reg);
+
+       spin_unlock_irqrestore(&syscon_swlock, flags);
 }
+EXPORT_SYMBOL(ep93xx_syscon_swlocked_write);
+
+void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits)
+{
+       unsigned long flags;
+       unsigned int val;
+
+       spin_lock_irqsave(&syscon_swlock, flags);
+
+       val = __raw_readl(EP93XX_SYSCON_DEVCFG);
+       val |= set_bits;
+       val &= ~clear_bits;
+       __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
+       __raw_writel(val, EP93XX_SYSCON_DEVCFG);
+
+       spin_unlock_irqrestore(&syscon_swlock, flags);
+}
+EXPORT_SYMBOL(ep93xx_devcfg_set_clear);
 
 
 /*************************************************************************
@@ -384,7 +435,7 @@ static struct amba_pl010_data ep93xx_uart_data = {
 
 static struct amba_device uart1_device = {
        .dev            = {
-               .bus_id         = "apb:uart1",
+               .init_name      = "apb:uart1",
                .platform_data  = &ep93xx_uart_data,
        },
        .res            = {
@@ -398,7 +449,7 @@ static struct amba_device uart1_device = {
 
 static struct amba_device uart2_device = {
        .dev            = {
-               .bus_id         = "apb:uart2",
+               .init_name      = "apb:uart2",
                .platform_data  = &ep93xx_uart_data,
        },
        .res            = {
@@ -412,7 +463,7 @@ static struct amba_device uart2_device = {
 
 static struct amba_device uart3_device = {
        .dev            = {
-               .bus_id         = "apb:uart3",
+               .init_name      = "apb:uart3",
                .platform_data  = &ep93xx_uart_data,
        },
        .res            = {
@@ -425,10 +476,19 @@ static struct amba_device uart3_device = {
 };
 
 
+static struct resource ep93xx_rtc_resource[] = {
+       {
+               .start          = EP93XX_RTC_PHYS_BASE,
+               .end            = EP93XX_RTC_PHYS_BASE + 0x10c - 1,
+               .flags          = IORESOURCE_MEM,
+       },
+};
+
 static struct platform_device ep93xx_rtc_device = {
-       .name           = "ep93xx-rtc",
-       .id             = -1,
-       .num_resources  = 0,
+       .name           = "ep93xx-rtc",
+       .id             = -1,
+       .num_resources  = ARRAY_SIZE(ep93xx_rtc_resource),
+       .resource       = ep93xx_rtc_resource,
 };
 
 
@@ -445,29 +505,314 @@ static struct resource ep93xx_ohci_resources[] = {
        },
 };
 
+
 static struct platform_device ep93xx_ohci_device = {
        .name           = "ep93xx-ohci",
        .id             = -1,
        .dev            = {
-               .dma_mask               = (void *)0xffffffff,
-               .coherent_dma_mask      = 0xffffffff,
+               .dma_mask               = &ep93xx_ohci_device.dev.coherent_dma_mask,
+               .coherent_dma_mask      = DMA_BIT_MASK(32),
        },
        .num_resources  = ARRAY_SIZE(ep93xx_ohci_resources),
        .resource       = ep93xx_ohci_resources,
 };
 
+static struct ep93xx_eth_data ep93xx_eth_data;
 
-void __init ep93xx_init_devices(void)
+static struct resource ep93xx_eth_resource[] = {
+       {
+               .start  = EP93XX_ETHERNET_PHYS_BASE,
+               .end    = EP93XX_ETHERNET_PHYS_BASE + 0xffff,
+               .flags  = IORESOURCE_MEM,
+       }, {
+               .start  = IRQ_EP93XX_ETHERNET,
+               .end    = IRQ_EP93XX_ETHERNET,
+               .flags  = IORESOURCE_IRQ,
+       }
+};
+
+static struct platform_device ep93xx_eth_device = {
+       .name           = "ep93xx-eth",
+       .id             = -1,
+       .dev            = {
+               .platform_data  = &ep93xx_eth_data,
+       },
+       .num_resources  = ARRAY_SIZE(ep93xx_eth_resource),
+       .resource       = ep93xx_eth_resource,
+};
+
+void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr)
 {
-       unsigned int v;
+       if (copy_addr)
+               memcpy_fromio(data->dev_addr, EP93XX_ETHERNET_BASE + 0x50, 6);
+
+       ep93xx_eth_data = *data;
+       platform_device_register(&ep93xx_eth_device);
+}
+
 
+/*************************************************************************
+ * EP93xx i2c peripheral handling
+ *************************************************************************/
+static struct i2c_gpio_platform_data ep93xx_i2c_data;
+
+static struct platform_device ep93xx_i2c_device = {
+       .name                   = "i2c-gpio",
+       .id                     = 0,
+       .dev.platform_data      = &ep93xx_i2c_data,
+};
+
+void __init ep93xx_register_i2c(struct i2c_gpio_platform_data *data,
+                               struct i2c_board_info *devices, int num)
+{
        /*
-        * Disallow access to MaverickCrunch initially.
+        * Set the EEPROM interface pin drive type control.
+        * Defines the driver type for the EECLK and EEDAT pins as either
+        * open drain, which will require an external pull-up, or a normal
+        * CMOS driver.
         */
-       v = __raw_readl(EP93XX_SYSCON_DEVICE_CONFIG);
-       v &= ~EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE;
-       __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
-       __raw_writel(v, EP93XX_SYSCON_DEVICE_CONFIG);
+       if (data->sda_is_open_drain && data->sda_pin != EP93XX_GPIO_LINE_EEDAT)
+               pr_warning("ep93xx: sda != EEDAT, open drain has no effect\n");
+       if (data->scl_is_open_drain && data->scl_pin != EP93XX_GPIO_LINE_EECLK)
+               pr_warning("ep93xx: scl != EECLK, open drain has no effect\n");
+
+       __raw_writel((data->sda_is_open_drain << 1) |
+                    (data->scl_is_open_drain << 0),
+                    EP93XX_GPIO_EEDRIVE);
+
+       ep93xx_i2c_data = *data;
+       i2c_register_board_info(0, devices, num);
+       platform_device_register(&ep93xx_i2c_device);
+}
+
+
+/*************************************************************************
+ * EP93xx LEDs
+ *************************************************************************/
+static struct gpio_led ep93xx_led_pins[] = {
+       {
+               .name                   = "platform:grled",
+               .gpio                   = EP93XX_GPIO_LINE_GRLED,
+       }, {
+               .name                   = "platform:rdled",
+               .gpio                   = EP93XX_GPIO_LINE_RDLED,
+       },
+};
+
+static struct gpio_led_platform_data ep93xx_led_data = {
+       .num_leds       = ARRAY_SIZE(ep93xx_led_pins),
+       .leds           = ep93xx_led_pins,
+};
+
+static struct platform_device ep93xx_leds = {
+       .name           = "leds-gpio",
+       .id             = -1,
+       .dev            = {
+               .platform_data  = &ep93xx_led_data,
+       },
+};
+
+
+/*************************************************************************
+ * EP93xx pwm peripheral handling
+ *************************************************************************/
+static struct resource ep93xx_pwm0_resource[] = {
+       {
+               .start  = EP93XX_PWM_PHYS_BASE,
+               .end    = EP93XX_PWM_PHYS_BASE + 0x10 - 1,
+               .flags  = IORESOURCE_MEM,
+       },
+};
+
+static struct platform_device ep93xx_pwm0_device = {
+       .name           = "ep93xx-pwm",
+       .id             = 0,
+       .num_resources  = ARRAY_SIZE(ep93xx_pwm0_resource),
+       .resource       = ep93xx_pwm0_resource,
+};
+
+static struct resource ep93xx_pwm1_resource[] = {
+       {
+               .start  = EP93XX_PWM_PHYS_BASE + 0x20,
+               .end    = EP93XX_PWM_PHYS_BASE + 0x30 - 1,
+               .flags  = IORESOURCE_MEM,
+       },
+};
+
+static struct platform_device ep93xx_pwm1_device = {
+       .name           = "ep93xx-pwm",
+       .id             = 1,
+       .num_resources  = ARRAY_SIZE(ep93xx_pwm1_resource),
+       .resource       = ep93xx_pwm1_resource,
+};
+
+void __init ep93xx_register_pwm(int pwm0, int pwm1)
+{
+       if (pwm0)
+               platform_device_register(&ep93xx_pwm0_device);
+
+       /* NOTE: EP9307 does not have PWMOUT1 (pin EGPIO14) */
+       if (pwm1)
+               platform_device_register(&ep93xx_pwm1_device);
+}
+
+int ep93xx_pwm_acquire_gpio(struct platform_device *pdev)
+{
+       int err;
+
+       if (pdev->id == 0) {
+               err = 0;
+       } else if (pdev->id == 1) {
+               err = gpio_request(EP93XX_GPIO_LINE_EGPIO14,
+                                  dev_name(&pdev->dev));
+               if (err)
+                       return err;
+               err = gpio_direction_output(EP93XX_GPIO_LINE_EGPIO14, 0);
+               if (err)
+                       goto fail;
+
+               /* PWM 1 output on EGPIO[14] */
+               ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_PONG);
+       } else {
+               err = -ENODEV;
+       }
+
+       return err;
+
+fail:
+       gpio_free(EP93XX_GPIO_LINE_EGPIO14);
+       return err;
+}
+EXPORT_SYMBOL(ep93xx_pwm_acquire_gpio);
+
+void ep93xx_pwm_release_gpio(struct platform_device *pdev)
+{
+       if (pdev->id == 1) {
+               gpio_direction_input(EP93XX_GPIO_LINE_EGPIO14);
+               gpio_free(EP93XX_GPIO_LINE_EGPIO14);
+
+               /* EGPIO[14] used for GPIO */
+               ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_PONG);
+       }
+}
+EXPORT_SYMBOL(ep93xx_pwm_release_gpio);
+
+
+/*************************************************************************
+ * EP93xx video peripheral handling
+ *************************************************************************/
+static struct ep93xxfb_mach_info ep93xxfb_data;
+
+static struct resource ep93xx_fb_resource[] = {
+       {
+               .start          = EP93XX_RASTER_PHYS_BASE,
+               .end            = EP93XX_RASTER_PHYS_BASE + 0x800 - 1,
+               .flags          = IORESOURCE_MEM,
+       },
+};
+
+static struct platform_device ep93xx_fb_device = {
+       .name                   = "ep93xx-fb",
+       .id                     = -1,
+       .dev                    = {
+               .platform_data  = &ep93xxfb_data,
+               .coherent_dma_mask      = DMA_BIT_MASK(32),
+               .dma_mask               = &ep93xx_fb_device.dev.coherent_dma_mask,
+       },
+       .num_resources          = ARRAY_SIZE(ep93xx_fb_resource),
+       .resource               = ep93xx_fb_resource,
+};
+
+void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data)
+{
+       ep93xxfb_data = *data;
+       platform_device_register(&ep93xx_fb_device);
+}
+
+
+/*************************************************************************
+ * EP93xx matrix keypad peripheral handling
+ *************************************************************************/
+static struct resource ep93xx_keypad_resource[] = {
+       {
+               .start  = EP93XX_KEY_MATRIX_PHYS_BASE,
+               .end    = EP93XX_KEY_MATRIX_PHYS_BASE + 0x0c - 1,
+               .flags  = IORESOURCE_MEM,
+       }, {
+               .start  = IRQ_EP93XX_KEY,
+               .end    = IRQ_EP93XX_KEY,
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+static struct platform_device ep93xx_keypad_device = {
+       .name                   = "ep93xx-keypad",
+       .id                     = -1,
+       .num_resources          = ARRAY_SIZE(ep93xx_keypad_resource),
+       .resource               = ep93xx_keypad_resource,
+};
+
+void __init ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data)
+{
+       ep93xx_keypad_device.dev.platform_data = data;
+       platform_device_register(&ep93xx_keypad_device);
+}
+
+int ep93xx_keypad_acquire_gpio(struct platform_device *pdev)
+{
+       int err;
+       int i;
+
+       for (i = 0; i < 8; i++) {
+               err = gpio_request(EP93XX_GPIO_LINE_C(i), dev_name(&pdev->dev));
+               if (err)
+                       goto fail_gpio_c;
+               err = gpio_request(EP93XX_GPIO_LINE_D(i), dev_name(&pdev->dev));
+               if (err)
+                       goto fail_gpio_d;
+       }
+
+       /* Enable the keypad controller; GPIO ports C and D used for keypad */
+       ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_KEYS |
+                                EP93XX_SYSCON_DEVCFG_GONK);
+
+       return 0;
+
+fail_gpio_d:
+       gpio_free(EP93XX_GPIO_LINE_C(i));
+fail_gpio_c:
+       for ( ; i >= 0; --i) {
+               gpio_free(EP93XX_GPIO_LINE_C(i));
+               gpio_free(EP93XX_GPIO_LINE_D(i));
+       }
+       return err;
+}
+EXPORT_SYMBOL(ep93xx_keypad_acquire_gpio);
+
+void ep93xx_keypad_release_gpio(struct platform_device *pdev)
+{
+       int i;
+
+       for (i = 0; i < 8; i++) {
+               gpio_free(EP93XX_GPIO_LINE_C(i));
+               gpio_free(EP93XX_GPIO_LINE_D(i));
+       }
+
+       /* Disable the keypad controller; GPIO ports C and D used for GPIO */
+       ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
+                              EP93XX_SYSCON_DEVCFG_GONK);
+}
+EXPORT_SYMBOL(ep93xx_keypad_release_gpio);
+
+
+extern void ep93xx_gpio_init(void);
+
+void __init ep93xx_init_devices(void)
+{
+       /* Disallow access to MaverickCrunch initially */
+       ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_CPENA);
+
+       ep93xx_gpio_init();
 
        amba_device_register(&uart1_device, &iomem_resource);
        amba_device_register(&uart2_device, &iomem_resource);
@@ -475,8 +820,5 @@ void __init ep93xx_init_devices(void)
 
        platform_device_register(&ep93xx_rtc_device);
        platform_device_register(&ep93xx_ohci_device);
-
-#ifdef CONFIG_CRUNCH
-       elf_hwcap |= HWCAP_CRUNCH;
-#endif
+       platform_device_register(&ep93xx_leds);
 }