davinci: remove watchdog from soc_info

[safe/jmp/linux-2.6] / arch / arm / mach-davinci / dm646x.c

diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 12189c7..2c76a4d 100644 (file)
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -162,6 +162,41 @@ static struct clk arm_clk = {
        .flags = ALWAYS_ENABLED,
 };
 
+static struct clk edma_cc_clk = {
+       .name = "edma_cc",
+       .parent = &pll1_sysclk2,
+       .lpsc = DM646X_LPSC_TPCC,
+       .flags = ALWAYS_ENABLED,
+};
+
+static struct clk edma_tc0_clk = {
+       .name = "edma_tc0",
+       .parent = &pll1_sysclk2,
+       .lpsc = DM646X_LPSC_TPTC0,
+       .flags = ALWAYS_ENABLED,
+};
+
+static struct clk edma_tc1_clk = {
+       .name = "edma_tc1",
+       .parent = &pll1_sysclk2,
+       .lpsc = DM646X_LPSC_TPTC1,
+       .flags = ALWAYS_ENABLED,
+};
+
+static struct clk edma_tc2_clk = {
+       .name = "edma_tc2",
+       .parent = &pll1_sysclk2,
+       .lpsc = DM646X_LPSC_TPTC2,
+       .flags = ALWAYS_ENABLED,
+};
+
+static struct clk edma_tc3_clk = {
+       .name = "edma_tc3",
+       .parent = &pll1_sysclk2,
+       .lpsc = DM646X_LPSC_TPTC3,
+       .flags = ALWAYS_ENABLED,
+};
+
 static struct clk uart0_clk = {
        .name = "uart0",
        .parent = &aux_clkin,
@@ -192,6 +227,18 @@ static struct clk gpio_clk = {
        .lpsc = DM646X_LPSC_GPIO,
 };
 
+static struct clk mcasp0_clk = {
+       .name = "mcasp0",
+       .parent = &pll1_sysclk3,
+       .lpsc = DM646X_LPSC_McASP0,
+};
+
+static struct clk mcasp1_clk = {
+       .name = "mcasp1",
+       .parent = &pll1_sysclk3,
+       .lpsc = DM646X_LPSC_McASP1,
+};
+
 static struct clk aemif_clk = {
        .name = "aemif",
        .parent = &pll1_sysclk3,
@@ -269,11 +316,18 @@ struct davinci_clk dm646x_clks[] = {
        CLK(NULL, "pll2_sysclk1", &pll2_sysclk1),
        CLK(NULL, "dsp", &dsp_clk),
        CLK(NULL, "arm", &arm_clk),
+       CLK(NULL, "edma_cc", &edma_cc_clk),
+       CLK(NULL, "edma_tc0", &edma_tc0_clk),
+       CLK(NULL, "edma_tc1", &edma_tc1_clk),
+       CLK(NULL, "edma_tc2", &edma_tc2_clk),
+       CLK(NULL, "edma_tc3", &edma_tc3_clk),
        CLK(NULL, "uart0", &uart0_clk),
        CLK(NULL, "uart1", &uart1_clk),
        CLK(NULL, "uart2", &uart2_clk),
        CLK("i2c_davinci.1", NULL, &i2c_clk),
        CLK(NULL, "gpio", &gpio_clk),
+       CLK(NULL, "mcasp0", &mcasp0_clk),
+       CLK(NULL, "mcasp1", &mcasp1_clk),
        CLK(NULL, "aemif", &aemif_clk),
        CLK("davinci_emac.1", NULL, &emac_clk),
        CLK(NULL, "pwm0", &pwm0_clk),
@@ -451,17 +505,43 @@ static const s8 dma_chan_dm646x_no_event[] = {
        -1
 };
 
-static struct edma_soc_info dm646x_edma_info = {
-       .n_channel      = 64,
-       .n_region       = 6,    /* 0-1, 4-7 */
-       .n_slot         = 512,
-       .n_tc           = 4,
-       .noevent        = dma_chan_dm646x_no_event,
+/* Four Transfer Controllers on DM646x */
+static const s8
+dm646x_queue_tc_mapping[][2] = {
+       /* {event queue no, TC no} */
+       {0, 0},
+       {1, 1},
+       {2, 2},
+       {3, 3},
+       {-1, -1},
+};
+
+static const s8
+dm646x_queue_priority_mapping[][2] = {
+       /* {event queue no, Priority} */
+       {0, 4},
+       {1, 0},
+       {2, 5},
+       {3, 1},
+       {-1, -1},
+};
+
+static struct edma_soc_info dm646x_edma_info[] = {
+       {
+               .n_channel              = 64,
+               .n_region               = 6,    /* 0-1, 4-7 */
+               .n_slot                 = 512,
+               .n_tc                   = 4,
+               .n_cc                   = 1,
+               .noevent                = dma_chan_dm646x_no_event,
+               .queue_tc_mapping       = dm646x_queue_tc_mapping,
+               .queue_priority_mapping = dm646x_queue_priority_mapping,
+       },
 };
 
 static struct resource edma_resources[] = {
        {
-               .name   = "edma_cc",
+               .name   = "edma_cc0",
                .start  = 0x01c00000,
                .end    = 0x01c00000 + SZ_64K - 1,
                .flags  = IORESOURCE_MEM,
@@ -491,10 +571,12 @@ static struct resource edma_resources[] = {
                .flags  = IORESOURCE_MEM,
        },
        {
+               .name   = "edma0",
                .start  = IRQ_CCINT0,
                .flags  = IORESOURCE_IRQ,
        },
        {
+               .name   = "edma0_err",
                .start  = IRQ_CCERRINT,
                .flags  = IORESOURCE_IRQ,
        },
@@ -503,8 +585,8 @@ static struct resource edma_resources[] = {
 
 static struct platform_device dm646x_edma_device = {
        .name                   = "edma",
-       .id                     = -1,
-       .dev.platform_data      = &dm646x_edma_info,
+       .id                     = 0,
+       .dev.platform_data      = dm646x_edma_info,
        .num_resources          = ARRAY_SIZE(edma_resources),
        .resource               = edma_resources,
 };
@@ -518,6 +600,13 @@ static struct map_desc dm646x_io_desc[] = {
                .length         = IO_SIZE,
                .type           = MT_DEVICE
        },
+       {
+               .virtual        = SRAM_VIRT,
+               .pfn            = __phys_to_pfn(0x00010000),
+               .length         = SZ_32K,
+               /* MT_MEMORY_NONCACHED requires supersection alignment */
+               .type           = MT_DEVICE,
+       },
 };
 
 /* Contents of JTAG ID register used to identify exact cpu type */
@@ -602,12 +691,13 @@ static struct davinci_soc_info davinci_soc_info_dm646x = {
        .intc_irq_prios         = dm646x_default_priorities,
        .intc_irq_num           = DAVINCI_N_AINTC_IRQ,
        .timer_info             = &dm646x_timer_info,
-       .wdt_base               = IO_ADDRESS(DAVINCI_WDOG_BASE),
        .gpio_base              = IO_ADDRESS(DAVINCI_GPIO_BASE),
        .gpio_num               = 43, /* Only 33 usable */
        .gpio_irq               = IRQ_DM646X_GPIOBNK0,
        .serial_dev             = &dm646x_serial_device,
        .emac_pdata             = &dm646x_emac_pdata,
+       .sram_dma               = 0x10010000,
+       .sram_len               = SZ_32K,
 };
 
 void __init dm646x_init(void)