omap3: Add minimal IGEP v2 support

[safe/jmp/linux-2.6] / arch / arm / mach-davinci / dm646x.c

diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 199f288..0976049 100644 (file)
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -32,6 +32,15 @@
 #include "clock.h"
 #include "mux.h"
 
+#define DAVINCI_VPIF_BASE       (0x01C12000)
+#define VDD3P3V_PWDN_OFFSET    (0x48)
+#define VSCLKDIS_OFFSET                (0x6C)
+
+#define VDD3P3V_VID_MASK       (BIT_MASK(3) | BIT_MASK(2) | BIT_MASK(1) |\
+                                       BIT_MASK(0))
+#define VSCLKDIS_MASK          (BIT_MASK(11) | BIT_MASK(10) | BIT_MASK(9) |\
+                                       BIT_MASK(8))
+
 /*
  * Device specific clocks
  */
@@ -285,6 +294,13 @@ static struct clk timer2_clk = {
        .flags = ALWAYS_ENABLED, /* no LPSC, always enabled; c.f. spruep9a */
 };
 
+
+static struct clk ide_clk = {
+       .name = "ide",
+       .parent = &pll1_sysclk4,
+       .lpsc = DAVINCI_LPSC_ATA,
+};
+
 static struct clk vpif0_clk = {
        .name = "vpif0",
        .parent = &ref_clk,
@@ -327,8 +343,8 @@ struct davinci_clk dm646x_clks[] = {
        CLK(NULL, "uart2", &uart2_clk),
        CLK("i2c_davinci.1", NULL, &i2c_clk),
        CLK(NULL, "gpio", &gpio_clk),
-       CLK(NULL, "mcasp0", &mcasp0_clk),
-       CLK(NULL, "mcasp1", &mcasp1_clk),
+       CLK("davinci-mcasp.0", NULL, &mcasp0_clk),
+       CLK("davinci-mcasp.1", NULL, &mcasp1_clk),
        CLK(NULL, "aemif", &aemif_clk),
        CLK("davinci_emac.1", NULL, &emac_clk),
        CLK(NULL, "pwm0", &pwm0_clk),
@@ -336,6 +352,7 @@ struct davinci_clk dm646x_clks[] = {
        CLK(NULL, "timer0", &timer0_clk),
        CLK(NULL, "timer1", &timer1_clk),
        CLK("watchdog", NULL, &timer2_clk),
+       CLK("palm_bk3710", NULL, &ide_clk),
        CLK(NULL, "vpif0", &vpif0_clk),
        CLK(NULL, "vpif1", &vpif1_clk),
        CLK(NULL, NULL, NULL),
@@ -399,7 +416,7 @@ static struct platform_device dm646x_emac_device = {
  */
 static const struct mux_config dm646x_pins[] = {
 #ifdef CONFIG_DAVINCI_MUX
-MUX_CFG(DM646X, ATAEN,         0,   0,     1,    1,     true)
+MUX_CFG(DM646X, ATAEN,         0,   0,     5,    1,     true)
 
 MUX_CFG(DM646X, AUDCK1,                0,   29,    1,    0,     false)
 
@@ -592,6 +609,32 @@ static struct platform_device dm646x_edma_device = {
        .resource               = edma_resources,
 };
 
+static struct resource ide_resources[] = {
+       {
+               .start          = DM646X_ATA_REG_BASE,
+               .end            = DM646X_ATA_REG_BASE + 0x7ff,
+               .flags          = IORESOURCE_MEM,
+       },
+       {
+               .start          = IRQ_DM646X_IDE,
+               .end            = IRQ_DM646X_IDE,
+               .flags          = IORESOURCE_IRQ,
+       },
+};
+
+static u64 ide_dma_mask = DMA_BIT_MASK(32);
+
+static struct platform_device ide_dev = {
+       .name           = "palm_bk3710",
+       .id             = -1,
+       .resource       = ide_resources,
+       .num_resources  = ARRAY_SIZE(ide_resources),
+       .dev = {
+               .dma_mask               = &ide_dma_mask,
+               .coherent_dma_mask      = DMA_BIT_MASK(32),
+       },
+};
+
 static struct resource dm646x_mcasp0_resources[] = {
        {
                .name   = "mcasp0",
@@ -652,6 +695,75 @@ static struct platform_device dm646x_dit_device = {
        .id     = -1,
 };
 
+static u64 vpif_dma_mask = DMA_BIT_MASK(32);
+
+static struct resource vpif_resource[] = {
+       {
+               .start  = DAVINCI_VPIF_BASE,
+               .end    = DAVINCI_VPIF_BASE + 0x03ff,
+               .flags  = IORESOURCE_MEM,
+       }
+};
+
+static struct platform_device vpif_dev = {
+       .name           = "vpif",
+       .id             = -1,
+       .dev            = {
+                       .dma_mask               = &vpif_dma_mask,
+                       .coherent_dma_mask      = DMA_BIT_MASK(32),
+       },
+       .resource       = vpif_resource,
+       .num_resources  = ARRAY_SIZE(vpif_resource),
+};
+
+static struct resource vpif_display_resource[] = {
+       {
+               .start = IRQ_DM646X_VP_VERTINT2,
+               .end   = IRQ_DM646X_VP_VERTINT2,
+               .flags = IORESOURCE_IRQ,
+       },
+       {
+               .start = IRQ_DM646X_VP_VERTINT3,
+               .end   = IRQ_DM646X_VP_VERTINT3,
+               .flags = IORESOURCE_IRQ,
+       },
+};
+
+static struct platform_device vpif_display_dev = {
+       .name           = "vpif_display",
+       .id             = -1,
+       .dev            = {
+                       .dma_mask               = &vpif_dma_mask,
+                       .coherent_dma_mask      = DMA_BIT_MASK(32),
+       },
+       .resource       = vpif_display_resource,
+       .num_resources  = ARRAY_SIZE(vpif_display_resource),
+};
+
+static struct resource vpif_capture_resource[] = {
+       {
+               .start = IRQ_DM646X_VP_VERTINT0,
+               .end   = IRQ_DM646X_VP_VERTINT0,
+               .flags = IORESOURCE_IRQ,
+       },
+       {
+               .start = IRQ_DM646X_VP_VERTINT1,
+               .end   = IRQ_DM646X_VP_VERTINT1,
+               .flags = IORESOURCE_IRQ,
+       },
+};
+
+static struct platform_device vpif_capture_dev = {
+       .name           = "vpif_capture",
+       .id             = -1,
+       .dev            = {
+                       .dma_mask               = &vpif_dma_mask,
+                       .coherent_dma_mask      = DMA_BIT_MASK(32),
+       },
+       .resource       = vpif_capture_resource,
+       .num_resources  = ARRAY_SIZE(vpif_capture_resource),
+};
+
 /*----------------------------------------------------------------------*/
 
 static struct map_desc dm646x_io_desc[] = {
@@ -761,6 +873,12 @@ static struct davinci_soc_info davinci_soc_info_dm646x = {
        .sram_len               = SZ_32K,
 };
 
+void __init dm646x_init_ide()
+{
+       davinci_cfg_reg(DM646X_ATAEN);
+       platform_device_register(&ide_dev);
+}
+
 void __init dm646x_init_mcasp0(struct snd_platform_data *pdata)
 {
        dm646x_mcasp0_device.dev.platform_data = pdata;
@@ -774,6 +892,32 @@ void __init dm646x_init_mcasp1(struct snd_platform_data *pdata)
        platform_device_register(&dm646x_dit_device);
 }
 
+void dm646x_setup_vpif(struct vpif_display_config *display_config,
+                      struct vpif_capture_config *capture_config)
+{
+       unsigned int value;
+       void __iomem *base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE);
+
+       value = __raw_readl(base + VSCLKDIS_OFFSET);
+       value &= ~VSCLKDIS_MASK;
+       __raw_writel(value, base + VSCLKDIS_OFFSET);
+
+       value = __raw_readl(base + VDD3P3V_PWDN_OFFSET);
+       value &= ~VDD3P3V_VID_MASK;
+       __raw_writel(value, base + VDD3P3V_PWDN_OFFSET);
+
+       davinci_cfg_reg(DM646X_STSOMUX_DISABLE);
+       davinci_cfg_reg(DM646X_STSIMUX_DISABLE);
+       davinci_cfg_reg(DM646X_PTSOMUX_DISABLE);
+       davinci_cfg_reg(DM646X_PTSIMUX_DISABLE);
+
+       vpif_display_dev.dev.platform_data = display_config;
+       vpif_capture_dev.dev.platform_data = capture_config;
+       platform_device_register(&vpif_dev);
+       platform_device_register(&vpif_display_dev);
+       platform_device_register(&vpif_capture_dev);
+}
+
 void __init dm646x_init(void)
 {
        davinci_common_init(&davinci_soc_info_dm646x);