davinci: dm365: add NAND support to EVM board

[safe/jmp/linux-2.6] / arch / arm / mach-davinci / dm355.c

diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 78fc598..48f33e4 100644 (file)
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -34,6 +34,8 @@
 #include "clock.h"
 #include "mux.h"
 
+#define DM355_UART2_BASE       (IO_PHYS + 0x206000)
+
 /*
  * Device specific clocks
  */
@@ -556,17 +558,38 @@ static const s8 dma_chan_dm355_no_event[] = {
        -1
 };
 
-static struct edma_soc_info dm355_edma_info = {
-       .n_channel      = 64,
-       .n_region       = 4,
-       .n_slot         = 128,
-       .n_tc           = 2,
-       .noevent        = dma_chan_dm355_no_event,
+static const s8
+queue_tc_mapping[][2] = {
+       /* {event queue no, TC no} */
+       {0, 0},
+       {1, 1},
+       {-1, -1},
+};
+
+static const s8
+queue_priority_mapping[][2] = {
+       /* {event queue no, Priority} */
+       {0, 3},
+       {1, 7},
+       {-1, -1},
+};
+
+static struct edma_soc_info dm355_edma_info[] = {
+       {
+               .n_channel              = 64,
+               .n_region               = 4,
+               .n_slot                 = 128,
+               .n_tc                   = 2,
+               .n_cc                   = 1,
+               .noevent                = dma_chan_dm355_no_event,
+               .queue_tc_mapping       = queue_tc_mapping,
+               .queue_priority_mapping = queue_priority_mapping,
+       },
 };
 
 static struct resource edma_resources[] = {
        {
-               .name   = "edma_cc",
+               .name   = "edma_cc0",
                .start  = 0x01c00000,
                .end    = 0x01c00000 + SZ_64K - 1,
                .flags  = IORESOURCE_MEM,
@@ -584,10 +607,12 @@ static struct resource edma_resources[] = {
                .flags  = IORESOURCE_MEM,
        },
        {
+               .name   = "edma0",
                .start  = IRQ_CCINT0,
                .flags  = IORESOURCE_IRQ,
        },
        {
+               .name   = "edma0_err",
                .start  = IRQ_CCERRINT,
                .flags  = IORESOURCE_IRQ,
        },
@@ -596,8 +621,8 @@ static struct resource edma_resources[] = {
 
 static struct platform_device dm355_edma_device = {
        .name                   = "edma",
-       .id                     = -1,
-       .dev.platform_data      = &dm355_edma_info,
+       .id                     = 0,
+       .dev.platform_data      = dm355_edma_info,
        .num_resources          = ARRAY_SIZE(edma_resources),
        .resource               = edma_resources,
 };
@@ -611,6 +636,13 @@ static struct map_desc dm355_io_desc[] = {
                .length         = IO_SIZE,
                .type           = MT_DEVICE
        },
+       {
+               .virtual        = SRAM_VIRT,
+               .pfn            = __phys_to_pfn(0x00010000),
+               .length         = SZ_32K,
+               /* MT_MEMORY_NONCACHED requires supersection alignment */
+               .type           = MT_DEVICE,
+       },
 };
 
 /* Contents of JTAG ID register used to identify exact cpu type */
@@ -695,11 +727,12 @@ static struct davinci_soc_info davinci_soc_info_dm355 = {
        .intc_irq_prios         = dm355_default_priorities,
        .intc_irq_num           = DAVINCI_N_AINTC_IRQ,
        .timer_info             = &dm355_timer_info,
-       .wdt_base               = IO_ADDRESS(DAVINCI_WDOG_BASE),
        .gpio_base              = IO_ADDRESS(DAVINCI_GPIO_BASE),
        .gpio_num               = 104,
        .gpio_irq               = IRQ_DM355_GPIOBNK0,
        .serial_dev             = &dm355_serial_device,
+       .sram_dma               = 0x00010000,
+       .sram_len               = SZ_32K,
 };
 
 void __init dm355_init(void)