select HAVE_ARCH_KGDB
select HAVE_KPROBES if (!XIP_KERNEL)
select HAVE_KRETPROBES if (HAVE_KPROBES)
- select HAVE_FTRACE if (!XIP_KERNEL)
- select HAVE_DYNAMIC_FTRACE if (HAVE_FTRACE)
+ select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
select HAVE_GENERIC_DMA_COHERENT
help
The ARM series is a line of low-power-consumption RISC chip designs
config GENERIC_GPIO
bool
- default n
config GENERIC_TIME
bool
- default n
config GENERIC_CLOCKEVENTS
bool
- default n
config GENERIC_CLOCKEVENTS_BROADCAST
bool
config NO_IOPORT
bool
- default n
config EISA
bool
config ARCH_HAS_ILOG2_U32
bool
- default n
config ARCH_HAS_ILOG2_U64
bool
- default n
config GENERIC_HWEIGHT
bool
bool
config GENERIC_HARDIRQS_NO__DO_IRQ
- bool
def_bool y
if OPROFILE
source "init/Kconfig"
+source "kernel/Kconfig.freezer"
+
menu "System Type"
choice
config ARCH_AAEC2000
bool "Agilent AAEC-2000 based"
+ select CPU_ARM920T
select ARM_AMBA
select HAVE_CLK
help
bool "ARM Ltd. Integrator family"
select ARM_AMBA
select HAVE_CLK
+ select COMMON_CLKDEV
select ICST525
help
Support for ARM's Integrator platform.
bool "ARM Ltd. RealView family"
select ARM_AMBA
select HAVE_CLK
+ select COMMON_CLKDEV
select ICST307
select GENERIC_TIME
select GENERIC_CLOCKEVENTS
select ARM_AMBA
select ARM_VIC
select HAVE_CLK
+ select COMMON_CLKDEV
select ICST307
select GENERIC_TIME
select GENERIC_CLOCKEVENTS
config ARCH_AT91
bool "Atmel AT91"
select GENERIC_GPIO
+ select ARCH_REQUIRE_GPIOLIB
select HAVE_CLK
help
This enables support for systems based on the Atmel AT91RM9200,
AT91SAM9 and AT91CAP9 processors.
-config ARCH_CLPS7500
- bool "Cirrus CL-PS7500FE"
- select TIMER_ACORN
- select ISA
- select NO_IOPORT
- select ARCH_SPARSEMEM_ENABLE
- help
- Support for the Cirrus Logic PS7500FE system-on-a-chip.
-
config ARCH_CLPS711X
bool "Cirrus Logic CLPS711x/EP721x-based"
+ select CPU_ARM720T
help
Support for Cirrus Logic 711x/721x based boards.
+config ARCH_GEMINI
+ bool "Cortina Systems Gemini"
+ select CPU_FA526
+ select GENERIC_GPIO
+ select ARCH_REQUIRE_GPIOLIB
+ help
+ Support for the Cortina Systems Gemini family SoCs
+
config ARCH_EBSA110
bool "EBSA-110"
+ select CPU_SA110
select ISA
select NO_IOPORT
help
config ARCH_EP93XX
bool "EP93xx-based"
+ select CPU_ARM920T
select ARM_AMBA
select ARM_VIC
select GENERIC_GPIO
select HAVE_CLK
+ select COMMON_CLKDEV
select ARCH_REQUIRE_GPIOLIB
+ select ARCH_HAS_HOLES_MEMORYMODEL
help
This enables support for the Cirrus EP93xx series of CPUs.
config ARCH_FOOTBRIDGE
bool "FootBridge"
+ select CPU_SA110
select FOOTBRIDGE
help
Support for systems based on the DC21285 companion chip
("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
+config ARCH_MXC
+ bool "Freescale MXC/iMX-based"
+ select GENERIC_TIME
+ select GENERIC_CLOCKEVENTS
+ select ARCH_MTD_XIP
+ select GENERIC_GPIO
+ select ARCH_REQUIRE_GPIOLIB
+ select HAVE_CLK
+ help
+ Support for Freescale MXC/iMX-based family of processors
+
+config ARCH_STMP3XXX
+ bool "Freescale STMP3xxx"
+ select CPU_ARM926T
+ select HAVE_CLK
+ select COMMON_CLKDEV
+ select ARCH_REQUIRE_GPIOLIB
+ select GENERIC_TIME
+ select GENERIC_CLOCKEVENTS
+ select GENERIC_GPIO
+ select USB_ARCH_HAS_EHCI
+ help
+ Support for systems based on the Freescale 3xxx CPUs.
+
config ARCH_NETX
bool "Hilscher NetX based"
+ select CPU_ARM926T
select ARM_VIC
+ select GENERIC_CLOCKEVENTS
+ select GENERIC_TIME
help
This enables support for systems based on the Hilscher NetX Soc
config ARCH_H720X
bool "Hynix HMS720x-based"
+ select CPU_ARM720T
select ISA_DMA_API
help
This enables support for systems based on the Hynix HMS720x
-config ARCH_IMX
- bool "IMX"
- select GENERIC_GPIO
- select GENERIC_TIME
- select GENERIC_CLOCKEVENTS
- help
- Support for Motorola's i.MX family of processors (MX1, MXL).
-
config ARCH_IOP13XX
bool "IOP13xx-based"
depends on MMU
+ select CPU_XSC3
select PLAT_IOP
select PCI
select ARCH_SUPPORTS_MSI
config ARCH_IOP32X
bool "IOP32x-based"
depends on MMU
+ select CPU_XSCALE
select PLAT_IOP
select PCI
select GENERIC_GPIO
config ARCH_IOP33X
bool "IOP33x-based"
depends on MMU
+ select CPU_XSCALE
select PLAT_IOP
select PCI
select GENERIC_GPIO
config ARCH_IXP23XX
bool "IXP23XX-based"
depends on MMU
+ select CPU_XSC3
select PCI
help
Support for Intel's IXP23xx (XScale) family of processors.
config ARCH_IXP2000
bool "IXP2400/2800-based"
depends on MMU
+ select CPU_XSCALE
select PCI
help
Support for Intel's IXP2400/2800 (XScale) family of processors.
config ARCH_IXP4XX
bool "IXP4xx-based"
depends on MMU
+ select CPU_XSCALE
select GENERIC_GPIO
select GENERIC_TIME
select GENERIC_CLOCKEVENTS
- select ZONE_DMA if PCI
+ select DMABOUNCE if PCI
help
Support for Intel's IXP4XX (XScale) family of processors.
config ARCH_L7200
bool "LinkUp-L7200"
+ select CPU_ARM720T
select FIQ
help
Say Y here if you intend to run this kernel on a LinkUp Systems
config ARCH_KIRKWOOD
bool "Marvell Kirkwood"
+ select CPU_FEROCEON
select PCI
+ select GENERIC_GPIO
+ select ARCH_REQUIRE_GPIOLIB
select GENERIC_TIME
select GENERIC_CLOCKEVENTS
select PLAT_ORION
Support for the following Marvell Kirkwood series SoCs:
88F6180, 88F6192 and 88F6281.
-config ARCH_KS8695
- bool "Micrel/Kendin KS8695"
- select GENERIC_GPIO
- help
- Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
- System-on-Chip devices.
-
-config ARCH_NS9XXX
- bool "NetSilicon NS9xxx"
- select GENERIC_GPIO
- select GENERIC_TIME
- select GENERIC_CLOCKEVENTS
- select HAVE_CLK
- help
- Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
- System.
-
- <http://www.digi.com/products/microprocessors/index.jsp>
-
config ARCH_LOKI
bool "Marvell Loki (88RC8480)"
+ select CPU_FEROCEON
select GENERIC_TIME
select GENERIC_CLOCKEVENTS
select PLAT_ORION
config ARCH_MV78XX0
bool "Marvell MV78xx0"
+ select CPU_FEROCEON
select PCI
+ select GENERIC_GPIO
+ select ARCH_REQUIRE_GPIOLIB
select GENERIC_TIME
select GENERIC_CLOCKEVENTS
select PLAT_ORION
Support for the following Marvell MV78xx0 series SoCs:
MV781x0, MV782x0.
-config ARCH_MXC
- bool "Freescale MXC/iMX-based"
- select GENERIC_TIME
- select GENERIC_CLOCKEVENTS
- select ARCH_MTD_XIP
- select GENERIC_GPIO
- select ARCH_REQUIRE_GPIOLIB
- help
- Support for Freescale MXC/iMX-based family of processors
-
config ARCH_ORION5X
bool "Marvell Orion"
depends on MMU
+ select CPU_FEROCEON
select PCI
select GENERIC_GPIO
+ select ARCH_REQUIRE_GPIOLIB
select GENERIC_TIME
select GENERIC_CLOCKEVENTS
select PLAT_ORION
Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
Orion-2 (5281), Orion-1-90 (6183).
+config ARCH_MMP
+ bool "Marvell PXA168/910"
+ depends on MMU
+ select GENERIC_GPIO
+ select ARCH_REQUIRE_GPIOLIB
+ select HAVE_CLK
+ select COMMON_CLKDEV
+ select GENERIC_TIME
+ select GENERIC_CLOCKEVENTS
+ select TICK_ONESHOT
+ select PLAT_PXA
+ help
+ Support for Marvell's PXA168/910 processor line.
+
+config ARCH_KS8695
+ bool "Micrel/Kendin KS8695"
+ select CPU_ARM922T
+ select GENERIC_GPIO
+ select ARCH_REQUIRE_GPIOLIB
+ help
+ Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
+ System-on-Chip devices.
+
+config ARCH_NS9XXX
+ bool "NetSilicon NS9xxx"
+ select CPU_ARM926T
+ select GENERIC_GPIO
+ select GENERIC_TIME
+ select GENERIC_CLOCKEVENTS
+ select HAVE_CLK
+ help
+ Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
+ System.
+
+ <http://www.digi.com/products/microprocessors/index.jsp>
+
+config ARCH_W90X900
+ bool "Nuvoton W90X900 CPU"
+ select CPU_ARM926T
+ select ARCH_REQUIRE_GPIOLIB
+ select GENERIC_GPIO
+ select COMMON_CLKDEV
+ help
+ Support for Nuvoton (Winbond logic dept.) ARM9 processor,You
+ can login www.mcuos.com or www.nuvoton.com to know more.
+
config ARCH_PNX4008
bool "Philips Nexperia PNX4008 Mobile"
+ select CPU_ARM926T
select HAVE_CLK
help
This enables support for Philips PNX4008 mobile platform.
select ARCH_MTD_XIP
select GENERIC_GPIO
select HAVE_CLK
+ select COMMON_CLKDEV
select ARCH_REQUIRE_GPIOLIB
select GENERIC_TIME
select GENERIC_CLOCKEVENTS
select TICK_ONESHOT
+ select PLAT_PXA
help
Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
+config ARCH_MSM
+ bool "Qualcomm MSM"
+ select CPU_V6
+ select GENERIC_TIME
+ select GENERIC_CLOCKEVENTS
+ help
+ Support for Qualcomm MSM7K based systems. This runs on the ARM11
+ apps processor of the MSM7K and depends on a shared memory
+ interface to the ARM9 modem processor which runs the baseband stack
+ and controls some vital subsystems (clock and power control, etc).
+
config ARCH_RPC
bool "RiscPC"
select ARCH_ACORN
config ARCH_SA1100
bool "SA1100-based"
+ select CPU_SA1100
select ISA
select ARCH_SPARSEMEM_ENABLE
select ARCH_MTD_XIP
BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
the Samsung SMDK2410 development board (and derivatives).
+config ARCH_S3C64XX
+ bool "Samsung S3C64XX"
+ select GENERIC_GPIO
+ select HAVE_CLK
+ help
+ Samsung S3C64XX series based systems
+
config ARCH_SHARK
bool "Shark"
+ select CPU_SA110
select ISA
select ISA_DMA
select ZONE_DMA
config ARCH_LH7A40X
bool "Sharp LH7A40X"
+ select CPU_ARM922T
select ARCH_DISCONTIGMEM_ENABLE if !LH7A40X_CONTIGMEM
select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
help
core with a wide array of integrated devices for
hand-held and low-power applications.
+config ARCH_U300
+ bool "ST-Ericsson U300 Series"
+ depends on MMU
+ select CPU_ARM926T
+ select ARM_AMBA
+ select ARM_VIC
+ select GENERIC_TIME
+ select GENERIC_CLOCKEVENTS
+ select HAVE_CLK
+ select COMMON_CLKDEV
+ select GENERIC_GPIO
+ help
+ Support for ST-Ericsson U300 series mobile platforms.
+
config ARCH_DAVINCI
bool "TI DaVinci"
+ select CPU_ARM926T
select GENERIC_TIME
select GENERIC_CLOCKEVENTS
select GENERIC_GPIO
select ARCH_REQUIRE_GPIOLIB
select HAVE_CLK
select ZONE_DMA
+ select HAVE_IDE
+ select COMMON_CLKDEV
+ select GENERIC_ALLOCATOR
help
Support for TI's DaVinci platform.
help
Support for TI's OMAP platform (OMAP1 and OMAP2).
-config ARCH_MSM7X00A
- bool "Qualcomm MSM7X00A"
- select GENERIC_TIME
- select GENERIC_CLOCKEVENTS
- help
- Support for Qualcomm MSM7X00A based systems. This runs on the ARM11
- apps processor of the MSM7X00A and depends on a shared memory
- interface to the ARM9 modem processor which runs the baseband stack
- and controls some vital subsystems (clock and power control, etc).
- <http://www.cdmatech.com/products/msm7200_chipset_solution.jsp>
-
endchoice
source "arch/arm/mach-clps711x/Kconfig"
source "arch/arm/mach-footbridge/Kconfig"
+source "arch/arm/mach-gemini/Kconfig"
+
source "arch/arm/mach-integrator/Kconfig"
source "arch/arm/mach-iop32x/Kconfig"
source "arch/arm/mach-mv78xx0/Kconfig"
source "arch/arm/mach-pxa/Kconfig"
+source "arch/arm/plat-pxa/Kconfig"
+
+source "arch/arm/mach-mmp/Kconfig"
source "arch/arm/mach-sa1100/Kconfig"
source "arch/arm/mach-kirkwood/Kconfig"
source "arch/arm/plat-s3c24xx/Kconfig"
+source "arch/arm/plat-s3c64xx/Kconfig"
source "arch/arm/plat-s3c/Kconfig"
if ARCH_S3C2410
source "arch/arm/mach-s3c2443/Kconfig"
endif
-source "arch/arm/mach-lh7a40x/Kconfig"
+if ARCH_S3C64XX
+source "arch/arm/mach-s3c6400/Kconfig"
+source "arch/arm/mach-s3c6410/Kconfig"
+endif
-source "arch/arm/mach-imx/Kconfig"
+source "arch/arm/plat-stmp3xxx/Kconfig"
+
+source "arch/arm/mach-lh7a40x/Kconfig"
source "arch/arm/mach-h720x/Kconfig"
source "arch/arm/mach-msm/Kconfig"
+source "arch/arm/mach-u300/Kconfig"
+
+source "arch/arm/mach-w90x900/Kconfig"
+
# Definitions to make life easier
config ARCH_ACORN
bool
config PLAT_ORION
bool
+config PLAT_PXA
+ bool
+
source arch/arm/mm/Kconfig
config IWMMXT
bool "Enable iWMMXt support"
- depends on CPU_XSCALE || CPU_XSC3
- default y if PXA27x || PXA3xx
+ depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK
+ default y if PXA27x || PXA3xx || ARCH_MMP
help
Enable support for iWMMXt context switching at run time if
running on a CPU that supports it.
source "arch/arm/Kconfig-nommu"
endif
+config ARM_ERRATA_411920
+ bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
+ depends on CPU_V6 && !SMP
+ help
+ Invalidation of the Instruction Cache operation can
+ fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
+ It does not affect the MPCore. This option enables the ARM Ltd.
+ recommended workaround.
+
+config ARM_ERRATA_430973
+ bool "ARM errata: Stale prediction on replaced interworking branch"
+ depends on CPU_V7
+ help
+ This option enables the workaround for the 430973 Cortex-A8
+ (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
+ interworking branch is replaced with another code sequence at the
+ same virtual address, whether due to self-modifying code or virtual
+ to physical address re-mapping, Cortex-A8 does not recover from the
+ stale interworking branch prediction. This results in Cortex-A8
+ executing the new code sequence in the incorrect ARM or Thumb state.
+ The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
+ and also flushes the branch target cache at every context switch.
+ Note that setting specific bits in the ACTLR register may not be
+ available in non-secure mode.
+
+config ARM_ERRATA_458693
+ bool "ARM errata: Processor deadlock when a false hazard is created"
+ depends on CPU_V7
+ help
+ This option enables the workaround for the 458693 Cortex-A8 (r2p0)
+ erratum. For very specific sequences of memory operations, it is
+ possible for a hazard condition intended for a cache line to instead
+ be incorrectly associated with a different cache line. This false
+ hazard might then cause a processor deadlock. The workaround enables
+ the L1 caching of the NEON accesses and disables the PLD instruction
+ in the ACTLR register. Note that setting specific bits in the ACTLR
+ register may not be available in non-secure mode.
+
+config ARM_ERRATA_460075
+ bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
+ depends on CPU_V7
+ help
+ This option enables the workaround for the 460075 Cortex-A8 (r2p0)
+ erratum. Any asynchronous access to the L2 cache may encounter a
+ situation in which recent store transactions to the L2 cache are lost
+ and overwritten with stale memory contents from external memory. The
+ workaround disables the write-allocate mode for the L2 cache via the
+ ACTLR register. Note that setting specific bits in the ACTLR register
+ may not be available in non-secure mode.
+
endmenu
source "arch/arm/common/Kconfig"
config SMP
bool "Symmetric Multi-Processing (EXPERIMENTAL)"
- depends on EXPERIMENTAL && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP)
+ depends on EXPERIMENTAL && (REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP ||\
+ MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4)
+ depends on GENERIC_CLOCKEVENTS
select USE_GENERIC_SMP_HELPERS
+ select HAVE_ARM_SCU if (ARCH_REALVIEW || ARCH_OMAP4)
help
This enables support for systems with more than one CPU. If you have
a system with only one CPU, like most personal computers, say N. If
If you don't know what to do here, say N.
+config HAVE_ARM_SCU
+ bool
+ depends on SMP
+ help
+ This option enables support for the ARM system coherency unit
+
+config HAVE_ARM_TWD
+ bool
+ depends on SMP
+ help
+ This options enables support for the ARM timer and watchdog unit
+
choice
prompt "Memory split"
default VMSPLIT_3G
config LOCAL_TIMERS
bool "Use local timer interrupts"
- depends on SMP && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP)
+ depends on SMP && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || \
+ REALVIEW_EB_A9MP || MACH_REALVIEW_PBX || ARCH_OMAP4)
default y
+ select HAVE_ARM_TWD if (ARCH_REALVIEW || ARCH_OMAP4)
help
Enable support for local timers on SMP platforms, rather then the
legacy IPI broadcast method. Local timers allows the system
default AT91_TIMER_HZ if ARCH_AT91
default 100
+config THUMB2_KERNEL
+ bool "Compile the kernel in Thumb-2 mode"
+ depends on CPU_V7 && EXPERIMENTAL
+ select AEABI
+ select ARM_ASM_UNIFIED
+ help
+ By enabling this option, the kernel will be compiled in
+ Thumb-2 mode. A compiler/assembler that understand the unified
+ ARM-Thumb syntax is needed.
+
+ If unsure, say N.
+
+config ARM_ASM_UNIFIED
+ bool
+
config AEABI
bool "Use the ARM EABI to compile the kernel"
help
UNPREDICTABLE (in fact it can be predicted that it won't work
at all). If in doubt say Y.
-config ARCH_FLATMEM_HAS_HOLES
+config ARCH_HAS_HOLES_MEMORYMODEL
bool
- default y
- depends on FLATMEM
# Discontigmem is deprecated
config ARCH_DISCONTIGMEM_ENABLE
default "2"
depends on NEED_MULTIPLE_NODES
+config HIGHMEM
+ bool "High Memory Support (EXPERIMENTAL)"
+ depends on MMU && EXPERIMENTAL
+ help
+ The address space of ARM processors is only 4 Gigabytes large
+ and it has to accommodate user address space, kernel address
+ space as well as some memory mapped IO. That means that, if you
+ have a large amount of physical memory and/or IO, not all of the
+ memory can be "permanently mapped" by the kernel. The physical
+ memory that is not permanently mapped is called "high memory".
+
+ Depending on the selected kernel/user memory split, minimum
+ vmalloc space and actual amount of RAM, you may not need this
+ option which should result in a slightly faster kernel.
+
+ If unsure, say n.
+
source "mm/Kconfig"
config LEDS
bool "Timer and CPU usage LEDs"
depends on ARCH_CDB89712 || ARCH_EBSA110 || \
- ARCH_EBSA285 || ARCH_IMX || ARCH_INTEGRATOR || \
+ ARCH_EBSA285 || ARCH_INTEGRATOR || \
ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
ARCH_AT91 || ARCH_DAVINCI || \
- ARCH_KS8695 || MACH_RD88F5182
+ ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
help
If you say Y here, the LEDs on your machine will be used
to provide useful information about your current system status.
correct operation of some network protocols. With an IP-only
configuration it is safe to say N, otherwise say Y.
+config UACCESS_WITH_MEMCPY
+ bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
+ depends on MMU && EXPERIMENTAL
+ default y if CPU_FEROCEON
+ help
+ Implement faster copy_to_user and clear_user methods for CPU
+ cores where a 8-word STM instruction give significantly higher
+ memory write throughput than a sequence of individual 32bit stores.
+
+ A possible side effect is a slight increase in scheduling latency
+ between threads sharing the same address space if they invoke
+ such copy operations with large buffers.
+
+ However, if the CPU data cache is using a write-allocate mode,
+ this option is unlikely to provide any performance gain.
+
endmenu
menu "Boot options"
menu "CPU Power Management"
-if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP || ARCH_IMX || ARCH_PXA)
+if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP || ARCH_PXA || ARCH_S3C64XX)
source "drivers/cpufreq/Kconfig"
config CPU_FREQ_SA1100
bool
- depends on CPU_FREQ && (SA1100_H3100 || SA1100_H3600 || SA1100_H3800 || SA1100_LART || SA1100_PLEB || SA1100_BADGE4 || SA1100_HACKKIT)
+ depends on CPU_FREQ && (SA1100_H3100 || SA1100_H3600 || SA1100_LART || SA1100_PLEB || SA1100_BADGE4 || SA1100_HACKKIT)
default y
config CPU_FREQ_SA1110
If in doubt, say Y.
-config CPU_FREQ_IMX
- tristate "CPUfreq driver for i.MX CPUs"
- depends on ARCH_IMX && CPU_FREQ
- default n
- help
- This enables the CPUfreq driver for i.MX CPUs.
-
- If in doubt, say N.
-
config CPU_FREQ_PXA
bool
depends on CPU_FREQ && ARCH_PXA && PXA25x
default y
select CPU_FREQ_DEFAULT_GOV_USERSPACE
+config CPU_FREQ_S3C64XX
+ bool "CPUfreq support for Samsung S3C64XX CPUs"
+ depends on CPU_FREQ && CPU_S3C6410
+
endif
source "drivers/cpuidle/Kconfig"
source "drivers/uio/Kconfig"
+source "drivers/staging/Kconfig"
+
endmenu
source "fs/Kconfig"