[ARM] 5572/1: at91: Support for at91sam9g45 series: core chip & board support

[safe/jmp/linux-2.6] / arch / sh / Kconfig

diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 6ed16c4..e2bdd7b 100644 (file)
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -15,7 +15,9 @@ config SUPERH
        select HAVE_IOREMAP_PROT if MMU
        select HAVE_ARCH_TRACEHOOK
        select HAVE_DMA_API_DEBUG
        select HAVE_IOREMAP_PROT if MMU
        select HAVE_ARCH_TRACEHOOK
        select HAVE_DMA_API_DEBUG

+       select HAVE_PERF_COUNTERS

        select RTC_LIB
        select RTC_LIB

+       select GENERIC_ATOMIC64

        help
          The SuperH is a RISC processor targeted for use in embedded systems
          and consumer electronics; it was also used in the Sega Dreamcast
        help
          The SuperH is a RISC processor targeted for use in embedded systems
          and consumer electronics; it was also used in the Sega Dreamcast


@@ -50,6 +52,10 @@ config GENERIC_BUG
        def_bool y
        depends on BUG && SUPERH32
 
        def_bool y
        depends on BUG && SUPERH32
 

+config GENERIC_CSUM
+       def_bool y
+       depends on SUPERH64
+

 config GENERIC_FIND_NEXT_BIT
        def_bool y
 
 config GENERIC_FIND_NEXT_BIT
        def_bool y
 


@@ -65,6 +71,9 @@ config GENERIC_HARDIRQS_NO__DO_IRQ
 config GENERIC_IRQ_PROBE
        def_bool y
 
 config GENERIC_IRQ_PROBE
        def_bool y
 

+config IRQ_PER_CPU
+       def_bool y
+

 config GENERIC_GPIO
        def_bool n
 
 config GENERIC_GPIO
        def_bool n
 


@@ -145,6 +154,9 @@ config ARCH_NO_VIRT_TO_BUS
 config ARCH_HAS_DEFAULT_IDLE
        def_bool y
 
 config ARCH_HAS_DEFAULT_IDLE
        def_bool y
 

+config ARCH_HAS_CPU_IDLE_WAIT
+       def_bool y
+

 config IO_TRAPPED
        bool
 
 config IO_TRAPPED
        bool
 


@@ -174,7 +186,6 @@ config CPU_SH4
        bool
        select CPU_HAS_INTEVT
        select CPU_HAS_SR_RB
        bool
        select CPU_HAS_INTEVT
        select CPU_HAS_SR_RB

-       select CPU_HAS_PTEA if !CPU_SH4A || CPU_SHX2

        select CPU_HAS_FPU if !CPU_SH4AL_DSP
        select SYS_SUPPORTS_TMU
 
        select CPU_HAS_FPU if !CPU_SH4AL_DSP
        select SYS_SUPPORTS_TMU
 


@@ -302,6 +313,7 @@ config CPU_SUBTYPE_SH7720
        bool "Support SH7720 processor"
        select CPU_SH3
        select CPU_HAS_DSP
        bool "Support SH7720 processor"
        select CPU_SH3
        select CPU_HAS_DSP

+       select SYS_SUPPORTS_CMT

        help
          Select SH7720 if you have a SH3-DSP SH7720 CPU.
 
        help
          Select SH7720 if you have a SH3-DSP SH7720 CPU.
 


@@ -309,6 +321,7 @@ config CPU_SUBTYPE_SH7721
        bool "Support SH7721 processor"
        select CPU_SH3
        select CPU_HAS_DSP
        bool "Support SH7721 processor"
        select CPU_SH3
        select CPU_HAS_DSP

+       select SYS_SUPPORTS_CMT

        help
          Select SH7721 if you have a SH3-DSP SH7721 CPU.
 
        help
          Select SH7721 if you have a SH3-DSP SH7721 CPU.
 


@@ -404,6 +417,8 @@ config CPU_SUBTYPE_SH7786
        select CPU_HAS_PTEAEX
        select ARCH_SPARSEMEM_ENABLE
        select SYS_SUPPORTS_NUMA
        select CPU_HAS_PTEAEX
        select ARCH_SPARSEMEM_ENABLE
        select SYS_SUPPORTS_NUMA

+       select SYS_SUPPORTS_SMP
+       select GENERIC_CLOCKEVENTS_BROADCAST if SMP

 
 config CPU_SUBTYPE_SHX3
        bool "Support SH-X3 processor"
 
 config CPU_SUBTYPE_SHX3
        bool "Support SH-X3 processor"


@@ -471,16 +486,9 @@ source "arch/sh/boards/Kconfig"
 
 menu "Timer and clock configuration"
 
 
 menu "Timer and clock configuration"
 

-config SH_TMU
-       bool "TMU timer support"
-       depends on CPU_SH3 || CPU_SH4
-       default y
-       help
-         This enables the use of the TMU as the system timer.
-

 config SH_TIMER_TMU
        bool "TMU timer driver"
 config SH_TIMER_TMU
        bool "TMU timer driver"

-       depends on !SH_TMU && SYS_SUPPORTS_TMU
+       depends on SYS_SUPPORTS_TMU

        default y
        help
          This enables the build of the TMU timer driver.
        default y
        help
          This enables the build of the TMU timer driver.


@@ -499,17 +507,6 @@ config SH_TIMER_MTU2
        help
          This enables build of the MTU2 timer driver.
 
        help
          This enables build of the MTU2 timer driver.
 

-config SH_TIMER_IRQ
-       int
-       default "28" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785 || \
-                       CPU_SUBTYPE_SH7763
-       default "86" if CPU_SUBTYPE_SH7619
-       default "140" if CPU_SUBTYPE_SH7206
-       default "142" if CPU_SUBTYPE_SH7203 && SH_CMT
-       default "153" if CPU_SUBTYPE_SH7203 && SH_MTU2
-       default "238" if CPU_SUBTYPE_MXG
-       default "16"
-

 config SH_PCLK_FREQ
        int "Peripheral clock frequency (in Hz)"
        default "27000000" if CPU_SUBTYPE_SH7343
 config SH_PCLK_FREQ
        int "Peripheral clock frequency (in Hz)"
        default "27000000" if CPU_SUBTYPE_SH7343


@@ -519,8 +516,7 @@ config SH_PCLK_FREQ
                              CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7705 || \
                              CPU_SUBTYPE_SH7203 || CPU_SUBTYPE_SH7206 || \
                              CPU_SUBTYPE_SH7263 || CPU_SUBTYPE_MXG    || \
                              CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7705 || \
                              CPU_SUBTYPE_SH7203 || CPU_SUBTYPE_SH7206 || \
                              CPU_SUBTYPE_SH7263 || CPU_SUBTYPE_MXG    || \

-                             CPU_SUBTYPE_SH7786
-       default "41666666" if CPU_SUBTYPE_SH7724
+                             CPU_SUBTYPE_SH7786 || CPU_SUBTYPE_SH7724

        default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R
        default "66000000" if CPU_SUBTYPE_SH4_202
        default "50000000"
        default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R
        default "66000000" if CPU_SUBTYPE_SH4_202
        default "50000000"


@@ -529,6 +525,13 @@ config SH_PCLK_FREQ
          This is necessary for determining the reference clock value on
          platforms lacking an RTC.
 
          This is necessary for determining the reference clock value on
          platforms lacking an RTC.
 

+config SH_CLK_CPG
+       def_bool y
+
+config SH_CLK_CPG_LEGACY
+       depends on SH_CLK_CPG
+       def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE
+

 config SH_CLK_MD
        int "CPU Mode Pin Setting"
        depends on CPU_SH2
 config SH_CLK_MD
        int "CPU Mode Pin Setting"
        depends on CPU_SH2


@@ -653,7 +656,7 @@ config NR_CPUS
        int "Maximum number of CPUs (2-32)"
        range 2 32
        depends on SMP
        int "Maximum number of CPUs (2-32)"
        range 2 32
        depends on SMP

-       default "4" if CPU_SHX3
+       default "4" if CPU_SUBTYPE_SHX3

        default "2"
        help
          This allows you to specify the maximum number of CPUs which this
        default "2"
        help
          This allows you to specify the maximum number of CPUs which this


@@ -689,27 +692,54 @@ config GUSA_RB
          LLSC, this should be more efficient than the other alternative of
          disabling interrupts around the atomic sequence.
 
          LLSC, this should be more efficient than the other alternative of
          disabling interrupts around the atomic sequence.
 

+config SPARSE_IRQ
+       bool "Support sparse irq numbering"
+       depends on EXPERIMENTAL
+       help
+         This enables support for sparse irqs. This is useful in general
+         as most CPUs have a fairly sparse array of IRQ vectors, which
+         the irq_desc then maps directly on to. Systems with a high
+         number of off-chip IRQs will want to treat this as
+         experimental until they have been independently verified.
+
+         If you don't know what to do here, say N.
+

 endmenu
 
 menu "Boot options"
 
 config ZERO_PAGE_OFFSET
 endmenu
 
 menu "Boot options"
 
 config ZERO_PAGE_OFFSET

-       hex "Zero page offset"
-       default "0x00004000" if SH_SH03
-       default "0x00010000" if PAGE_SIZE_64KB
+       hex
+       default "0x00010000" if PAGE_SIZE_64KB || SH_RTS7751R2D || \
+                               SH_7751_SOLUTION_ENGINE
+       default "0x00004000" if PAGE_SIZE_16KB || SH_SH03

        default "0x00002000" if PAGE_SIZE_8KB
        default "0x00001000"
        help
          This sets the default offset of zero page.
 
 config BOOT_LINK_OFFSET
        default "0x00002000" if PAGE_SIZE_8KB
        default "0x00001000"
        help
          This sets the default offset of zero page.
 
 config BOOT_LINK_OFFSET

-       hex "Link address offset for booting"
+       hex
+       default "0x00210000" if SH_SHMIN
+       default "0x00400000" if SH_CAYMAN
+       default "0x00810000" if SH_7780_SOLUTION_ENGINE
+       default "0x009e0000" if SH_TITAN
+       default "0x01800000" if SH_SDK7780
+       default "0x02000000" if SH_EDOSK7760

        default "0x00800000"
        help
          This option allows you to set the link address offset of the zImage.
          This can be useful if you are on a board which has a small amount of
          memory.
 
        default "0x00800000"
        help
          This option allows you to set the link address offset of the zImage.
          This can be useful if you are on a board which has a small amount of
          memory.
 

+config ENTRY_OFFSET
+       hex
+       default "0x00001000" if PAGE_SIZE_4KB
+       default "0x00002000" if PAGE_SIZE_8KB
+       default "0x00004000" if PAGE_SIZE_16KB
+       default "0x00010000" if PAGE_SIZE_64KB
+       default "0x00000000"
+

 config UBC_WAKEUP
        bool "Wakeup UBC on startup"
        depends on CPU_SH4 && !CPU_SH4A
 config UBC_WAKEUP
        bool "Wakeup UBC on startup"
        depends on CPU_SH4 && !CPU_SH4A