[PATCH] Add struct dev pointer to dma_is_consistent()

[safe/jmp/linux-2.6] / arch / mips / Kconfig

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 3fa67af..d8af858 100644 (file)
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -16,6 +16,7 @@ config MIPS_MTX1
        bool "4G Systems MTX-1 board"
        select DMA_NONCOHERENT
        select HW_HAS_PCI
        bool "4G Systems MTX-1 board"
        select DMA_NONCOHERENT
        select HW_HAS_PCI

+       select RESOURCES_64BIT if PCI

        select SOC_AU1500
        select SYS_HAS_CPU_MIPS32_R1
        select SYS_SUPPORTS_LITTLE_ENDIAN
        select SOC_AU1500
        select SYS_HAS_CPU_MIPS32_R1
        select SYS_SUPPORTS_LITTLE_ENDIAN


@@ -32,6 +33,7 @@ config MIPS_PB1000
        select SOC_AU1000
        select DMA_NONCOHERENT
        select HW_HAS_PCI
        select SOC_AU1000
        select DMA_NONCOHERENT
        select HW_HAS_PCI

+       select RESOURCES_64BIT if PCI

        select SWAP_IO_SPACE
        select SYS_HAS_CPU_MIPS32_R1
        select SYS_SUPPORTS_LITTLE_ENDIAN
        select SWAP_IO_SPACE
        select SYS_HAS_CPU_MIPS32_R1
        select SYS_SUPPORTS_LITTLE_ENDIAN


@@ -41,6 +43,7 @@ config MIPS_PB1100
        select SOC_AU1100
        select DMA_NONCOHERENT
        select HW_HAS_PCI
        select SOC_AU1100
        select DMA_NONCOHERENT
        select HW_HAS_PCI

+       select RESOURCES_64BIT if PCI

        select SWAP_IO_SPACE
        select SYS_HAS_CPU_MIPS32_R1
        select SYS_SUPPORTS_LITTLE_ENDIAN
        select SWAP_IO_SPACE
        select SYS_HAS_CPU_MIPS32_R1
        select SYS_SUPPORTS_LITTLE_ENDIAN


@@ -50,6 +53,7 @@ config MIPS_PB1500
        select SOC_AU1500
        select DMA_NONCOHERENT
        select HW_HAS_PCI
        select SOC_AU1500
        select DMA_NONCOHERENT
        select HW_HAS_PCI

+       select RESOURCES_64BIT if PCI

        select SYS_HAS_CPU_MIPS32_R1
        select SYS_SUPPORTS_LITTLE_ENDIAN
 
        select SYS_HAS_CPU_MIPS32_R1
        select SYS_SUPPORTS_LITTLE_ENDIAN
 


@@ -59,6 +63,7 @@ config MIPS_PB1550
        select DMA_NONCOHERENT
        select HW_HAS_PCI
        select MIPS_DISABLE_OBSOLETE_IDE
        select DMA_NONCOHERENT
        select HW_HAS_PCI
        select MIPS_DISABLE_OBSOLETE_IDE

+       select RESOURCES_64BIT if PCI

        select SYS_HAS_CPU_MIPS32_R1
        select SYS_SUPPORTS_LITTLE_ENDIAN
 
        select SYS_HAS_CPU_MIPS32_R1
        select SYS_SUPPORTS_LITTLE_ENDIAN
 


@@ -67,6 +72,7 @@ config MIPS_PB1200
        select SOC_AU1200
        select DMA_NONCOHERENT
        select MIPS_DISABLE_OBSOLETE_IDE
        select SOC_AU1200
        select DMA_NONCOHERENT
        select MIPS_DISABLE_OBSOLETE_IDE

+       select RESOURCES_64BIT if PCI

        select SYS_HAS_CPU_MIPS32_R1
        select SYS_SUPPORTS_LITTLE_ENDIAN
 
        select SYS_HAS_CPU_MIPS32_R1
        select SYS_SUPPORTS_LITTLE_ENDIAN
 


@@ -75,6 +81,7 @@ config MIPS_DB1000
        select SOC_AU1000
        select DMA_NONCOHERENT
        select HW_HAS_PCI
        select SOC_AU1000
        select DMA_NONCOHERENT
        select HW_HAS_PCI

+       select RESOURCES_64BIT if PCI

        select SYS_HAS_CPU_MIPS32_R1
        select SYS_SUPPORTS_LITTLE_ENDIAN
 
        select SYS_HAS_CPU_MIPS32_R1
        select SYS_SUPPORTS_LITTLE_ENDIAN
 


@@ -91,6 +98,7 @@ config MIPS_DB1500
        select DMA_NONCOHERENT
        select HW_HAS_PCI
        select MIPS_DISABLE_OBSOLETE_IDE
        select DMA_NONCOHERENT
        select HW_HAS_PCI
        select MIPS_DISABLE_OBSOLETE_IDE

+       select RESOURCES_64BIT if PCI

        select SYS_HAS_CPU_MIPS32_R1
        select SYS_SUPPORTS_BIG_ENDIAN
        select SYS_SUPPORTS_LITTLE_ENDIAN
        select SYS_HAS_CPU_MIPS32_R1
        select SYS_SUPPORTS_BIG_ENDIAN
        select SYS_SUPPORTS_LITTLE_ENDIAN


@@ -101,6 +109,7 @@ config MIPS_DB1550
        select HW_HAS_PCI
        select DMA_NONCOHERENT
        select MIPS_DISABLE_OBSOLETE_IDE
        select HW_HAS_PCI
        select DMA_NONCOHERENT
        select MIPS_DISABLE_OBSOLETE_IDE

+       select RESOURCES_64BIT if PCI

        select SYS_HAS_CPU_MIPS32_R1
        select SYS_SUPPORTS_LITTLE_ENDIAN
 
        select SYS_HAS_CPU_MIPS32_R1
        select SYS_SUPPORTS_LITTLE_ENDIAN
 


@@ -126,7 +135,7 @@ config BASLER_EXCITE
        select IRQ_CPU
        select IRQ_CPU_RM7K
        select IRQ_CPU_RM9K
        select IRQ_CPU
        select IRQ_CPU_RM7K
        select IRQ_CPU_RM9K

-       select SERIAL_RM9000
+       select MIPS_RM9122

        select SYS_HAS_CPU_RM9000
        select SYS_SUPPORTS_32BIT_KERNEL
        select SYS_SUPPORTS_64BIT_KERNEL
        select SYS_HAS_CPU_RM9000
        select SYS_SUPPORTS_32BIT_KERNEL
        select SYS_SUPPORTS_64BIT_KERNEL


@@ -203,59 +212,6 @@ config MIPS_EV64120
          <http://www.marvell.com/>.  Say Y here if you wish to build a
          kernel for this platform.
 
          <http://www.marvell.com/>.  Say Y here if you wish to build a
          kernel for this platform.
 

-config MIPS_EV96100
-       bool "Galileo EV96100 Evaluation board (EXPERIMENTAL)"
-       depends on EXPERIMENTAL
-       select DMA_NONCOHERENT
-       select HW_HAS_PCI
-       select IRQ_CPU
-       select MIPS_GT96100
-       select RM7000_CPU_SCACHE
-       select SWAP_IO_SPACE
-       select SYS_HAS_CPU_R5000
-       select SYS_HAS_CPU_RM7000
-       select SYS_SUPPORTS_32BIT_KERNEL
-       select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
-       select SYS_SUPPORTS_BIG_ENDIAN
-       help
-         This is an evaluation board based on the Galileo GT-96100 LAN/WAN
-         communications controllers containing a MIPS R5000 compatible core
-         running at 83MHz. Their website is <http://www.marvell.com/>. Say Y
-         here if you wish to build a kernel for this platform.
-
-config MIPS_IVR
-       bool "Globespan IVR board"
-       select DMA_NONCOHERENT
-       select HW_HAS_PCI
-       select ITE_BOARD_GEN
-       select SYS_HAS_CPU_NEVADA
-       select SYS_SUPPORTS_32BIT_KERNEL
-       select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
-       select SYS_SUPPORTS_LITTLE_ENDIAN
-       help
-         This is an evaluation board built by Globespan to showcase thir
-         iVR (Internet Video Recorder) design. It utilizes a QED RM5231
-         R5000 MIPS core. More information can be found out their website
-         located at <http://www.globespan.net/>. Say Y here if you wish to
-         build a kernel for this platform.
-
-config MIPS_ITE8172
-       bool "ITE 8172G board"
-       select DMA_NONCOHERENT
-       select HW_HAS_PCI
-       select ITE_BOARD_GEN
-       select SYS_HAS_CPU_R5432
-       select SYS_HAS_CPU_NEVADA
-       select SYS_SUPPORTS_32BIT_KERNEL
-       select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
-       select SYS_SUPPORTS_LITTLE_ENDIAN
-       help
-         Ths is an evaluation board made by ITE <http://www.ite.com.tw/>
-         with ATX form factor that utilizes a MIPS R5000 to work with its
-         ITE8172G companion internet appliance chip. The MIPS core can be
-         either a NEC Vr5432 or QED RM5231. Say Y here if you wish to build
-         a kernel for this platform.
-

 config MACH_JAZZ
        bool "Jazz family of machines"
        select ARC
 config MACH_JAZZ
        bool "Jazz family of machines"
        select ARC


@@ -286,6 +242,7 @@ config LASAT
        select SYS_SUPPORTS_32BIT_KERNEL
        select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
        select SYS_SUPPORTS_LITTLE_ENDIAN
        select SYS_SUPPORTS_32BIT_KERNEL
        select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
        select SYS_SUPPORTS_LITTLE_ENDIAN

+       select GENERIC_HARDIRQS_NO__DO_IRQ

 
 config MIPS_ATLAS
        bool "MIPS Atlas board"
 
 config MIPS_ATLAS
        bool "MIPS Atlas board"


@@ -308,6 +265,8 @@ config MIPS_ATLAS
        select SYS_SUPPORTS_64BIT_KERNEL
        select SYS_SUPPORTS_BIG_ENDIAN
        select SYS_SUPPORTS_LITTLE_ENDIAN
        select SYS_SUPPORTS_64BIT_KERNEL
        select SYS_SUPPORTS_BIG_ENDIAN
        select SYS_SUPPORTS_LITTLE_ENDIAN

+       select SYS_SUPPORTS_MULTITHREADING if EXPERIMENTAL
+       select GENERIC_HARDIRQS_NO__DO_IRQ

        help
          This enables support for the MIPS Technologies Atlas evaluation
          board.
        help
          This enables support for the MIPS Technologies Atlas evaluation
          board.


@@ -318,12 +277,13 @@ config MIPS_MALTA
        select BOOT_ELF32
        select HAVE_STD_PC_SERIAL_PORT
        select DMA_NONCOHERENT
        select BOOT_ELF32
        select HAVE_STD_PC_SERIAL_PORT
        select DMA_NONCOHERENT

-       select IRQ_CPU

        select GENERIC_ISA_DMA
        select GENERIC_ISA_DMA

+       select IRQ_CPU

        select HW_HAS_PCI
        select I8259
        select MIPS_BOARDS_GEN
        select MIPS_BONITO64
        select HW_HAS_PCI
        select I8259
        select MIPS_BOARDS_GEN
        select MIPS_BONITO64

+       select MIPS_CPU_SCACHE

        select MIPS_GT64120
        select MIPS_MSC
        select SWAP_IO_SPACE
        select MIPS_GT64120
        select MIPS_MSC
        select SWAP_IO_SPACE


@@ -336,6 +296,7 @@ config MIPS_MALTA
        select SYS_SUPPORTS_64BIT_KERNEL
        select SYS_SUPPORTS_BIG_ENDIAN
        select SYS_SUPPORTS_LITTLE_ENDIAN
        select SYS_SUPPORTS_64BIT_KERNEL
        select SYS_SUPPORTS_BIG_ENDIAN
        select SYS_SUPPORTS_LITTLE_ENDIAN

+       select SYS_SUPPORTS_MULTITHREADING

        help
          This enables support for the MIPS Technologies Malta evaluation
          board.
        help
          This enables support for the MIPS Technologies Malta evaluation
          board.


@@ -460,6 +421,7 @@ config MOMENCO_OCELOT_C
        select SYS_SUPPORTS_32BIT_KERNEL
        select SYS_SUPPORTS_64BIT_KERNEL
        select SYS_SUPPORTS_BIG_ENDIAN
        select SYS_SUPPORTS_32BIT_KERNEL
        select SYS_SUPPORTS_64BIT_KERNEL
        select SYS_SUPPORTS_BIG_ENDIAN

+       select GENERIC_HARDIRQS_NO__DO_IRQ

        help
          The Ocelot is a MIPS-based Single Board Computer (SBC) made by
          Momentum Computer <http://www.momenco.com/>.
        help
          The Ocelot is a MIPS-based Single Board Computer (SBC) made by
          Momentum Computer <http://www.momenco.com/>.


@@ -475,7 +437,7 @@ config MOMENCO_OCELOT_G
        select SWAP_IO_SPACE
        select SYS_HAS_CPU_RM7000
        select SYS_SUPPORTS_32BIT_KERNEL
        select SWAP_IO_SPACE
        select SYS_HAS_CPU_RM7000
        select SYS_SUPPORTS_32BIT_KERNEL

-       select SYS_SUPPORTS_64BIT_KERNEL
+       select SYS_SUPPORTS_64BIT_KERNEL if BROKEN

        select SYS_SUPPORTS_BIG_ENDIAN
        help
          The Ocelot is a MIPS-based Single Board Computer (SBC) made by
        select SYS_SUPPORTS_BIG_ENDIAN
        help
          The Ocelot is a MIPS-based Single Board Computer (SBC) made by


@@ -489,13 +451,11 @@ config MIPS_XXS1500
 
 config PNX8550_V2PCI
        bool "Philips PNX8550 based Viper2-PCI board"
 
 config PNX8550_V2PCI
        bool "Philips PNX8550 based Viper2-PCI board"

-       depends on BROKEN

        select PNX8550
        select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config PNX8550_JBS
        bool "Philips PNX8550 based JBS board"
        select PNX8550
        select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config PNX8550_JBS
        bool "Philips PNX8550 based JBS board"

-       depends on BROKEN

        select PNX8550
        select SYS_SUPPORTS_LITTLE_ENDIAN
 
        select PNX8550
        select SYS_SUPPORTS_LITTLE_ENDIAN
 


@@ -536,6 +496,7 @@ config PMC_YOSEMITE
        select SYS_SUPPORTS_64BIT_KERNEL
        select SYS_SUPPORTS_BIG_ENDIAN
        select SYS_SUPPORTS_HIGHMEM
        select SYS_SUPPORTS_64BIT_KERNEL
        select SYS_SUPPORTS_BIG_ENDIAN
        select SYS_SUPPORTS_HIGHMEM

+       select SYS_SUPPORTS_SMP

        help
          Yosemite is an evaluation board for the RM9000x2 processor
          manufactured by PMC-Sierra.
        help
          Yosemite is an evaluation board for the RM9000x2 processor
          manufactured by PMC-Sierra.


@@ -552,6 +513,8 @@ config QEMU
        select SYS_HAS_CPU_MIPS32_R1
        select SYS_SUPPORTS_32BIT_KERNEL
        select SYS_SUPPORTS_BIG_ENDIAN
        select SYS_HAS_CPU_MIPS32_R1
        select SYS_SUPPORTS_32BIT_KERNEL
        select SYS_SUPPORTS_BIG_ENDIAN

+       select SYS_SUPPORTS_LITTLE_ENDIAN
+       select ARCH_SPARSEMEM_ENABLE

        help
          Qemu is a software emulator which among other architectures also
          can simulate a MIPS32 4Kc system.  This patch adds support for the
        help
          Qemu is a software emulator which among other architectures also
          can simulate a MIPS32 4Kc system.  This patch adds support for the


@@ -583,7 +546,7 @@ config SGI_IP22
        select HW_HAS_EISA
        select IP22_CPU_SCACHE
        select IRQ_CPU
        select HW_HAS_EISA
        select IP22_CPU_SCACHE
        select IRQ_CPU

-       select NO_ISA if ISA
+       select GENERIC_ISA_DMA_SUPPORT_BROKEN

        select SWAP_IO_SPACE
        select SYS_HAS_CPU_R4X00
        select SYS_HAS_CPU_R5000
        select SWAP_IO_SPACE
        select SYS_HAS_CPU_R4X00
        select SYS_HAS_CPU_R5000


@@ -601,12 +564,15 @@ config SGI_IP27
        select ARC64
        select BOOT_ELF64
        select DMA_IP27
        select ARC64
        select BOOT_ELF64
        select DMA_IP27

+       select EARLY_PRINTK

        select HW_HAS_PCI
        select PCI_DOMAINS
        select SYS_HAS_CPU_R10000
        select SYS_SUPPORTS_64BIT_KERNEL
        select SYS_SUPPORTS_BIG_ENDIAN
        select SYS_SUPPORTS_NUMA
        select HW_HAS_PCI
        select PCI_DOMAINS
        select SYS_HAS_CPU_R10000
        select SYS_SUPPORTS_64BIT_KERNEL
        select SYS_SUPPORTS_BIG_ENDIAN
        select SYS_SUPPORTS_NUMA

+       select SYS_SUPPORTS_SMP
+       select GENERIC_HARDIRQS_NO__DO_IRQ

        help
          This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
          workstations.  To compile a Linux kernel that runs on these, say Y
        help
          This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
          workstations.  To compile a Linux kernel that runs on these, say Y


@@ -813,10 +779,26 @@ config TOSHIBA_RBTX4938
 
 endchoice
 
 
 endchoice
 

+config KEXEC
+       bool "Kexec system call (EXPERIMENTAL)"
+       depends on EXPERIMENTAL
+       help
+         kexec is a system call that implements the ability to shutdown your
+         current kernel, and to start another kernel.  It is like a reboot
+         but it is indepedent of the system firmware.   And like a reboot
+         you can start any kernel with it, not just Linux.
+
+         The name comes from the similiarity to the exec system call.
+
+         It is an ongoing process to be certain the hardware in a machine
+         is properly shutdown, so do not be surprised if this code does not
+         initially work for you.  It may help to enable device hotplugging
+         support.  As of this writing the exact hardware interface is
+         strongly in flux, so no good recommendation can be made.
+

 source "arch/mips/ddb5xxx/Kconfig"
 source "arch/mips/gt64120/ev64120/Kconfig"
 source "arch/mips/jazz/Kconfig"
 source "arch/mips/ddb5xxx/Kconfig"
 source "arch/mips/gt64120/ev64120/Kconfig"
 source "arch/mips/jazz/Kconfig"

-source "arch/mips/ite-boards/Kconfig"

 source "arch/mips/lasat/Kconfig"
 source "arch/mips/momentum/Kconfig"
 source "arch/mips/pmc-sierra/Kconfig"
 source "arch/mips/lasat/Kconfig"
 source "arch/mips/momentum/Kconfig"
 source "arch/mips/pmc-sierra/Kconfig"


@@ -849,10 +831,18 @@ config GENERIC_CALIBRATE_DELAY
        bool
        default y
 
        bool
        default y
 

+config GENERIC_TIME
+       bool
+       default y
+

 config SCHED_NO_NO_OMIT_FRAME_POINTER
        bool
        default y
 
 config SCHED_NO_NO_OMIT_FRAME_POINTER
        bool
        default y
 

+config GENERIC_HARDIRQS_NO__DO_IRQ
+       bool
+       default n
+

 #
 # Select some configuration options automatically based on user selections.
 #
 #
 # Select some configuration options automatically based on user selections.
 #


@@ -908,8 +898,11 @@ config MIPS_NILE4
 config MIPS_DISABLE_OBSOLETE_IDE
        bool
 
 config MIPS_DISABLE_OBSOLETE_IDE
        bool
 

+config GENERIC_ISA_DMA_SUPPORT_BROKEN
+       bool
+

 #
 #

-# Endianess selection.  Suffiently obscure so many users don't know what to
+# Endianess selection.  Sufficiently obscure so many users don't know what to

 # answer,so we try hard to limit the available choices.  Also the use of a
 # choice statement should be more obvious to the user.
 #
 # answer,so we try hard to limit the available choices.  Also the use of a
 # choice statement should be more obvious to the user.
 #


@@ -918,7 +911,7 @@ choice
        help
          Some MIPS machines can be configured for either little or big endian
          byte order. These modes require different kernels and a different
        help
          Some MIPS machines can be configured for either little or big endian
          byte order. These modes require different kernels and a different

-         Linux distribution.  In general there is one prefered byteorder for a
+         Linux distribution.  In general there is one preferred byteorder for a

          particular system but some systems are just as commonly used in the
          one or the other endianess.
 
          particular system but some systems are just as commonly used in the
          one or the other endianess.
 


@@ -967,10 +960,13 @@ config MIPS_TX3927
        bool
        select HAS_TXX9_SERIAL
 
        bool
        select HAS_TXX9_SERIAL
 

-config PCI_MARVELL
+config MIPS_RM9122

        bool
        bool

+       select SERIAL_RM9000
+       select GPI_RM9000
+       select WDT_RM9000

 
 

-config ITE_BOARD_GEN
+config PCI_MARVELL

        bool
 
 config SOC_AU1000
        bool
 
 config SOC_AU1000


@@ -1008,6 +1004,7 @@ config SOC_PNX8550
        select HW_HAS_PCI
        select SYS_HAS_CPU_MIPS32_R1
        select SYS_SUPPORTS_32BIT_KERNEL
        select HW_HAS_PCI
        select SYS_HAS_CPU_MIPS32_R1
        select SYS_SUPPORTS_32BIT_KERNEL

+       select GENERIC_HARDIRQS_NO__DO_IRQ

 
 config SWAP_IO_SPACE
        bool
 
 config SWAP_IO_SPACE
        bool


@@ -1017,6 +1014,15 @@ config EMMA2RH
        depends on MARKEINS
        default y
 
        depends on MARKEINS
        default y
 

+config SERIAL_RM9000
+       bool
+
+config GPI_RM9000
+       bool
+
+config WDT_RM9000
+       bool
+

 #
 # Unfortunately not all GT64120 systems run the chip at the same clock.
 # As the user for the clock rate and try to minimize the available options.
 #
 # Unfortunately not all GT64120 systems run the chip at the same clock.
 # As the user for the clock rate and try to minimize the available options.


@@ -1042,25 +1048,6 @@ endchoice
 config ARC32
        bool
 
 config ARC32
        bool
 

-config AU1X00_USB_DEVICE
-       bool
-       depends on MIPS_PB1500 || MIPS_PB1100 || MIPS_PB1000
-       default n
-
-config MIPS_GT96100
-       bool
-       select MIPS_GT64120
-
-config IT8172_CIR
-       bool
-       depends on MIPS_ITE8172 || MIPS_IVR
-       default y
-
-config IT8712
-       bool
-       depends on MIPS_ITE8172
-       default y
-

 config BOOT_ELF32
        bool
 
 config BOOT_ELF32
        bool
 


@@ -1249,7 +1236,7 @@ config CPU_R6000
        select CPU_SUPPORTS_32BIT_KERNEL
        help
          MIPS Technologies R6000 and R6000A series processors.  Note these
        select CPU_SUPPORTS_32BIT_KERNEL
        help
          MIPS Technologies R6000 and R6000A series processors.  Note these

-         processors are extremly rare and the support for them is incomplete.
+         processors are extremely rare and the support for them is incomplete.

 
 config CPU_NEVADA
        bool "RM52xx"
 
 config CPU_NEVADA
        bool "RM52xx"


@@ -1299,6 +1286,7 @@ config CPU_RM9000
        select CPU_SUPPORTS_32BIT_KERNEL
        select CPU_SUPPORTS_64BIT_KERNEL
        select CPU_SUPPORTS_HIGHMEM
        select CPU_SUPPORTS_32BIT_KERNEL
        select CPU_SUPPORTS_64BIT_KERNEL
        select CPU_SUPPORTS_HIGHMEM

+       select WEAK_ORDERING

 
 config CPU_SB1
        bool "SB1"
 
 config CPU_SB1
        bool "SB1"


@@ -1307,6 +1295,7 @@ config CPU_SB1
        select CPU_SUPPORTS_32BIT_KERNEL
        select CPU_SUPPORTS_64BIT_KERNEL
        select CPU_SUPPORTS_HIGHMEM
        select CPU_SUPPORTS_32BIT_KERNEL
        select CPU_SUPPORTS_64BIT_KERNEL
        select CPU_SUPPORTS_HIGHMEM

+       select WEAK_ORDERING

 
 endchoice
 
 
 endchoice
 


@@ -1367,10 +1356,12 @@ config SYS_HAS_CPU_RM9000
 config SYS_HAS_CPU_SB1
        bool
 
 config SYS_HAS_CPU_SB1
        bool
 

+config WEAK_ORDERING
+       bool

 endmenu
 
 #
 endmenu
 
 #

-# These two indicate any levelof the MIPS32 and MIPS64 architecture
+# These two indicate any level of the MIPS32 and MIPS64 architecture

 #
 config CPU_MIPS32
        bool
 #
 config CPU_MIPS32
        bool


@@ -1381,7 +1372,7 @@ config CPU_MIPS64
        default y if CPU_MIPS64_R1 || CPU_MIPS64_R2
 
 #
        default y if CPU_MIPS64_R1 || CPU_MIPS64_R2
 
 #

-# These two indicate the revision of the architecture, either 32 bot 64 bit.
+# These two indicate the revision of the architecture, either Release 1 or Release 2

 #
 config CPU_MIPSR1
        bool
 #
 config CPU_MIPSR1
        bool


@@ -1474,6 +1465,13 @@ config IP22_CPU_SCACHE
        bool
        select BOARD_SCACHE
 
        bool
        select BOARD_SCACHE
 

+#
+# Support for a MIPS32 / MIPS64 style S-caches
+#
+config MIPS_CPU_SCACHE
+       bool
+       select BOARD_SCACHE
+

 config R5000_CPU_SCACHE
        bool
        select BOARD_SCACHE
 config R5000_CPU_SCACHE
        bool
        select BOARD_SCACHE


@@ -1493,32 +1491,59 @@ config SIBYTE_DMA_PAGEOPS
 config CPU_HAS_PREFETCH
        bool
 
 config CPU_HAS_PREFETCH
        bool
 

-config MIPS_MT
-       bool "Enable MIPS MT"
-

 choice
        prompt "MIPS MT options"
 choice
        prompt "MIPS MT options"

-       depends on MIPS_MT

 
 

-config MIPS_MT_SMTC
-       bool "SMTC: Use all TCs on all VPEs for SMP"
+config MIPS_MT_DISABLED
+       bool "Disable multithreading support."
+       help
+         Use this option if your workload can't take advantage of
+         MIPS hardware multithreading support.  On systems that don't have
+         the option of an MT-enabled processor this option will be the only
+         option in this menu.
+
+config MIPS_MT_SMP
+       bool "Use 1 TC on each available VPE for SMP"
+       depends on SYS_SUPPORTS_MULTITHREADING

        select CPU_MIPSR2_IRQ_VI
        select CPU_MIPSR2_SRS
        select CPU_MIPSR2_IRQ_VI
        select CPU_MIPSR2_SRS

+       select MIPS_MT

        select SMP
        select SMP

+       select SYS_SUPPORTS_SMP
+       help
+         This is a kernel model which is also known a VSMP or lately
+         has been marketesed into SMVP.

 
 

-config MIPS_MT_SMP
-       bool "Use 1 TC on each available VPE for SMP"
+config MIPS_MT_SMTC
+       bool "SMTC: Use all TCs on all VPEs for SMP"
+       depends on CPU_MIPS32_R2
+       #depends on CPU_MIPS64_R2               # once there is hardware ...
+       depends on SYS_SUPPORTS_MULTITHREADING
+       select CPU_MIPSR2_IRQ_VI
+       select CPU_MIPSR2_SRS
+       select MIPS_MT

        select SMP
        select SMP

+       select SYS_SUPPORTS_SMP
+       help
+         This is a kernel model which is known a SMTC or lately has been
+         marketesed into SMVP.

 
 config MIPS_VPE_LOADER
        bool "VPE loader support."
 
 config MIPS_VPE_LOADER
        bool "VPE loader support."

-       depends on MIPS_MT
+       depends on SYS_SUPPORTS_MULTITHREADING
+       select MIPS_MT

        help
          Includes a loader for loading an elf relocatable object
          onto another VPE and running it.
 
 endchoice
 
        help
          Includes a loader for loading an elf relocatable object
          onto another VPE and running it.
 
 endchoice
 

+config MIPS_MT
+       bool
+
+config SYS_SUPPORTS_MULTITHREADING
+       bool
+

 config MIPS_MT_FPAFF
        bool "Dynamic FPU affinity for FP-intensive threads"
        depends on MIPS_MT
 config MIPS_MT_FPAFF
        bool "Dynamic FPU affinity for FP-intensive threads"
        depends on MIPS_MT


@@ -1575,32 +1600,23 @@ config CPU_HAS_LLSC
 config CPU_HAS_WB
        bool
 
 config CPU_HAS_WB
        bool
 

+#
+# Vectored interrupt mode is an R2 feature
+#

 config CPU_MIPSR2_IRQ_VI
 config CPU_MIPSR2_IRQ_VI

-       bool "Vectored interrupt mode"
-       depends on CPU_MIPSR2
-       help
-          Vectored interrupt mode allowing faster dispatching of interrupts.
-          The board support code needs to be written to take advantage of this
-          mode.  Compatibility code is included to allow the kernel to run on
-          a CPU that does not support vectored interrupts.  It's safe to
-          say Y here.
+       bool

 
 

+#
+# Extended interrupt mode is an R2 feature
+#

 config CPU_MIPSR2_IRQ_EI
 config CPU_MIPSR2_IRQ_EI

-       bool "External interrupt controller mode"
-       depends on CPU_MIPSR2
-       help
-          Extended interrupt mode takes advantage of an external interrupt
-          controller to allow fast dispatching from many possible interrupt
-          sources. Say N unless you know that external interrupt support is
-          required.
+       bool

 
 

+#
+# Shadow registers are an R2 feature
+#

 config CPU_MIPSR2_SRS
 config CPU_MIPSR2_SRS

-       bool "Make shadow set registers available for interrupt handlers"
-       depends on CPU_MIPSR2_IRQ_VI || CPU_MIPSR2_IRQ_EI
-       help
-          Allow the kernel to use shadow register sets for fast interrupts.
-          Interrupt handlers must be specially written to use shadow sets.
-          Say N unless you know that shadow register set upport is needed.
+       bool

 
 config CPU_HAS_SYNC
        bool
 
 config CPU_HAS_SYNC
        bool


@@ -1618,6 +1634,9 @@ config GENERIC_IRQ_PROBE
        bool
        default y
 
        bool
        default y
 

+config IRQ_PER_CPU
+       bool
+

 #
 # - Highmem only makes sense for the 32-bit kernel.
 # - The current highmem code will only work properly on physically indexed
 #
 # - Highmem only makes sense for the 32-bit kernel.
 # - The current highmem code will only work properly on physically indexed


@@ -1654,6 +1673,10 @@ config ARCH_DISCONTIGMEM_ENABLE
          or have huge holes in the physical address space for other reasons.
          See <file:Documentation/vm/numa> for more.
 
          or have huge holes in the physical address space for other reasons.
          See <file:Documentation/vm/numa> for more.
 

+config ARCH_SPARSEMEM_ENABLE
+       bool
+       select SPARSEMEM_STATIC
+

 config NUMA
        bool "NUMA Support"
        depends on SYS_SUPPORTS_NUMA
 config NUMA
        bool "NUMA Support"
        depends on SYS_SUPPORTS_NUMA


@@ -1676,8 +1699,9 @@ source "mm/Kconfig"
 
 config SMP
        bool "Multi-Processing support"
 
 config SMP
        bool "Multi-Processing support"

-       depends on CPU_RM9000 || ((SIBYTE_BCM1x80 || SIBYTE_BCM1x55 || SIBYTE_SB1250 || QEMU) && !SIBYTE_STANDALONE) || SGI_IP27 || MIPS_MT_SMP || MIPS_MT_SMTC
-       ---help---
+       depends on SYS_SUPPORTS_SMP
+       select IRQ_PER_CPU
+       help

          This enables support for systems with more than one CPU. If you have
          a system with only one CPU, like most personal computers, say N. If
          you have a system with more than one CPU, say Y.
          This enables support for systems with more than one CPU. If you have
          a system with only one CPU, like most personal computers, say N. If
          you have a system with more than one CPU, say Y.


@@ -1696,12 +1720,16 @@ config SMP
 
          If you don't know what to do here, say N.
 
 
          If you don't know what to do here, say N.
 

+config SYS_SUPPORTS_SMP
+       bool
+

 config NR_CPUS
        int "Maximum number of CPUs (2-64)"
        range 2 64
        depends on SMP
        default "64" if SGI_IP27
        default "2"
 config NR_CPUS
        int "Maximum number of CPUs (2-64)"
        range 2 64
        depends on SMP
        default "64" if SGI_IP27
        default "2"

+       default "8" if MIPS_MT_SMTC

        help
          This allows you to specify the maximum number of CPUs which this
          kernel will support.  The maximum supported value is 32 for 32-bit
        help
          This allows you to specify the maximum number of CPUs which this
          kernel will support.  The maximum supported value is 32 for 32-bit


@@ -1804,6 +1832,14 @@ config RWSEM_GENERIC_SPINLOCK
        bool
        default y
 
        bool
        default y
 

+config LOCKDEP_SUPPORT
+       bool
+       default y
+
+config STACKTRACE_SUPPORT
+       bool
+       default y
+

 source "init/Kconfig"
 
 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
 source "init/Kconfig"
 
 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"


@@ -1841,13 +1877,11 @@ source "drivers/pci/Kconfig"
 config ISA
        bool
 
 config ISA
        bool
 

-config NO_ISA
-       bool
-

 config EISA
        bool "EISA support"
        depends on HW_HAS_EISA
        select ISA
 config EISA
        bool "EISA support"
        depends on HW_HAS_EISA
        select ISA

+       select GENERIC_ISA_DMA

        ---help---
          The Extended Industry Standard Architecture (EISA) bus was
          developed as an open alternative to the IBM MicroChannel bus.
        ---help---
          The Extended Industry Standard Architecture (EISA) bus was
          developed as an open alternative to the IBM MicroChannel bus.


@@ -1928,6 +1962,11 @@ config COMPAT
        depends on MIPS32_COMPAT
        default y
 
        depends on MIPS32_COMPAT
        default y
 

+config SYSVIPC_COMPAT
+       bool
+       depends on COMPAT && SYSVIPC
+       default y
+

 config MIPS32_O32
        bool "Kernel support for o32 binaries"
        depends on MIPS32_COMPAT
 config MIPS32_O32
        bool "Kernel support for o32 binaries"
        depends on MIPS32_COMPAT