SAFE public projects git trees. - safe/jmp/linux-2.6/blob - sound/sparc/cs4231.c

   1 /*
   2  * Driver for CS4231 sound chips found on Sparcs.
   3  * Copyright (C) 2002 David S. Miller <davem@redhat.com>
   4  *
   5  * Based entirely upon drivers/sbus/audio/cs4231.c which is:
   6  * Copyright (C) 1996, 1997, 1998, 1998 Derrick J Brashear (shadow@andrew.cmu.edu)
   7  * and also sound/isa/cs423x/cs4231_lib.c which is:
   8  * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
   9  */
  10
  11 #include <linux/config.h>
  12 #include <linux/module.h>
  13 #include <linux/kernel.h>
  14 #include <linux/slab.h>
  15 #include <linux/delay.h>
  16 #include <linux/init.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/moduleparam.h>
  19
  20 #include <sound/driver.h>
  21 #include <sound/core.h>
  22 #include <sound/pcm.h>
  23 #include <sound/info.h>
  24 #include <sound/control.h>
  25 #include <sound/timer.h>
  26 #include <sound/initval.h>
  27 #include <sound/pcm_params.h>
  28
  29 #include <asm/io.h>
  30 #include <asm/irq.h>
  31
  32 #ifdef CONFIG_SBUS
  33 #define SBUS_SUPPORT
  34 #endif
  35
  36 #ifdef SBUS_SUPPORT
  37 #include <asm/sbus.h>
  38 #endif
  39
  40 #if defined(CONFIG_PCI) && defined(CONFIG_SPARC64)
  41 #define EBUS_SUPPORT
  42 #endif
  43
  44 #ifdef EBUS_SUPPORT
  45 #include <linux/pci.h>
  46 #include <asm/ebus.h>
  47 #endif
  48
  49 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
  50 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
  51 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;      /* Enable this card */
  52
  53 module_param_array(index, int, NULL, 0444);
  54 MODULE_PARM_DESC(index, "Index value for Sun CS4231 soundcard.");
  55 module_param_array(id, charp, NULL, 0444);
  56 MODULE_PARM_DESC(id, "ID string for Sun CS4231 soundcard.");
  57 module_param_array(enable, bool, NULL, 0444);
  58 MODULE_PARM_DESC(enable, "Enable Sun CS4231 soundcard.");
  59 MODULE_AUTHOR("Jaroslav Kysela, Derrick J. Brashear and David S. Miller");
  60 MODULE_DESCRIPTION("Sun CS4231");
  61 MODULE_LICENSE("GPL");
  62 MODULE_SUPPORTED_DEVICE("{{Sun,CS4231}}");
  63
  64 #ifdef SBUS_SUPPORT
  65 struct sbus_dma_info {
  66        spinlock_t      lock;
  67        int             dir;
  68        void __iomem    *regs;
  69 };
  70 #endif
  71
  72 struct snd_cs4231;
  73 struct cs4231_dma_control {
  74         void            (*prepare)(struct cs4231_dma_control *dma_cont, int dir);
  75         void            (*enable)(struct cs4231_dma_control *dma_cont, int on);
  76         int             (*request)(struct cs4231_dma_control *dma_cont, dma_addr_t bus_addr, size_t len);
  77         unsigned int    (*address)(struct cs4231_dma_control *dma_cont);
  78         void            (*reset)(struct snd_cs4231 *chip);
  79         void            (*preallocate)(struct snd_cs4231 *chip, struct snd_pcm *pcm);
  80 #ifdef EBUS_SUPPORT
  81         struct          ebus_dma_info   ebus_info;
  82 #endif
  83 #ifdef SBUS_SUPPORT
  84         struct          sbus_dma_info   sbus_info;
  85 #endif
  86 };
  87
  88 struct snd_cs4231 {
  89         spinlock_t              lock;
  90         void __iomem            *port;
  91
  92         struct cs4231_dma_control       p_dma;
  93         struct cs4231_dma_control       c_dma;
  94
  95         u32                     flags;
  96 #define CS4231_FLAG_EBUS        0x00000001
  97 #define CS4231_FLAG_PLAYBACK    0x00000002
  98 #define CS4231_FLAG_CAPTURE     0x00000004
  99
 100         struct snd_card         *card;
 101         struct snd_pcm          *pcm;
 102         struct snd_pcm_substream        *playback_substream;
 103         unsigned int            p_periods_sent;
 104         struct snd_pcm_substream        *capture_substream;
 105         unsigned int            c_periods_sent;
 106         struct snd_timer        *timer;
 107
 108         unsigned short mode;
 109 #define CS4231_MODE_NONE        0x0000
 110 #define CS4231_MODE_PLAY        0x0001
 111 #define CS4231_MODE_RECORD      0x0002
 112 #define CS4231_MODE_TIMER       0x0004
 113 #define CS4231_MODE_OPEN        (CS4231_MODE_PLAY|CS4231_MODE_RECORD|CS4231_MODE_TIMER)
 114
 115         unsigned char           image[32];      /* registers image */
 116         int                     mce_bit;
 117         int                     calibrate_mute;
 118         struct mutex            mce_mutex;
 119         struct mutex            open_mutex;
 120
 121         union {
 122 #ifdef SBUS_SUPPORT
 123                 struct sbus_dev         *sdev;
 124 #endif
 125 #ifdef EBUS_SUPPORT
 126                 struct pci_dev          *pdev;
 127 #endif
 128         } dev_u;
 129         unsigned int            irq[2];
 130         unsigned int            regs_size;
 131         struct snd_cs4231       *next;
 132 };
 133
 134 static struct snd_cs4231 *cs4231_list;
 135
 136 /* Eventually we can use sound/isa/cs423x/cs4231_lib.c directly, but for
 137  * now....  -DaveM
 138  */
 139
 140 /* IO ports */
 141
 142 #define CS4231P(chip, x)        ((chip)->port + c_d_c_CS4231##x)
 143
 144 /* XXX offsets are different than PC ISA chips... */
 145 #define c_d_c_CS4231REGSEL      0x0
 146 #define c_d_c_CS4231REG         0x4
 147 #define c_d_c_CS4231STATUS      0x8
 148 #define c_d_c_CS4231PIO         0xc
 149
 150 /* codec registers */
 151
 152 #define CS4231_LEFT_INPUT       0x00    /* left input control */
 153 #define CS4231_RIGHT_INPUT      0x01    /* right input control */
 154 #define CS4231_AUX1_LEFT_INPUT  0x02    /* left AUX1 input control */
 155 #define CS4231_AUX1_RIGHT_INPUT 0x03    /* right AUX1 input control */
 156 #define CS4231_AUX2_LEFT_INPUT  0x04    /* left AUX2 input control */
 157 #define CS4231_AUX2_RIGHT_INPUT 0x05    /* right AUX2 input control */
 158 #define CS4231_LEFT_OUTPUT      0x06    /* left output control register */
 159 #define CS4231_RIGHT_OUTPUT     0x07    /* right output control register */
 160 #define CS4231_PLAYBK_FORMAT    0x08    /* clock and data format - playback - bits 7-0 MCE */
 161 #define CS4231_IFACE_CTRL       0x09    /* interface control - bits 7-2 MCE */
 162 #define CS4231_PIN_CTRL         0x0a    /* pin control */
 163 #define CS4231_TEST_INIT        0x0b    /* test and initialization */
 164 #define CS4231_MISC_INFO        0x0c    /* miscellaneaous information */
 165 #define CS4231_LOOPBACK         0x0d    /* loopback control */
 166 #define CS4231_PLY_UPR_CNT      0x0e    /* playback upper base count */
 167 #define CS4231_PLY_LWR_CNT      0x0f    /* playback lower base count */
 168 #define CS4231_ALT_FEATURE_1    0x10    /* alternate #1 feature enable */
 169 #define CS4231_ALT_FEATURE_2    0x11    /* alternate #2 feature enable */
 170 #define CS4231_LEFT_LINE_IN     0x12    /* left line input control */
 171 #define CS4231_RIGHT_LINE_IN    0x13    /* right line input control */
 172 #define CS4231_TIMER_LOW        0x14    /* timer low byte */
 173 #define CS4231_TIMER_HIGH       0x15    /* timer high byte */
 174 #define CS4231_LEFT_MIC_INPUT   0x16    /* left MIC input control register (InterWave only) */
 175 #define CS4231_RIGHT_MIC_INPUT  0x17    /* right MIC input control register (InterWave only) */
 176 #define CS4236_EXT_REG          0x17    /* extended register access */
 177 #define CS4231_IRQ_STATUS       0x18    /* irq status register */
 178 #define CS4231_LINE_LEFT_OUTPUT 0x19    /* left line output control register (InterWave only) */
 179 #define CS4231_VERSION          0x19    /* CS4231(A) - version values */
 180 #define CS4231_MONO_CTRL        0x1a    /* mono input/output control */
 181 #define CS4231_LINE_RIGHT_OUTPUT 0x1b   /* right line output control register (InterWave only) */
 182 #define CS4235_LEFT_MASTER      0x1b    /* left master output control */
 183 #define CS4231_REC_FORMAT       0x1c    /* clock and data format - record - bits 7-0 MCE */
 184 #define CS4231_PLY_VAR_FREQ     0x1d    /* playback variable frequency */
 185 #define CS4235_RIGHT_MASTER     0x1d    /* right master output control */
 186 #define CS4231_REC_UPR_CNT      0x1e    /* record upper count */
 187 #define CS4231_REC_LWR_CNT      0x1f    /* record lower count */
 188
 189 /* definitions for codec register select port - CODECP( REGSEL ) */
 190
 191 #define CS4231_INIT             0x80    /* CODEC is initializing */
 192 #define CS4231_MCE              0x40    /* mode change enable */
 193 #define CS4231_TRD              0x20    /* transfer request disable */
 194
 195 /* definitions for codec status register - CODECP( STATUS ) */
 196
 197 #define CS4231_GLOBALIRQ        0x01    /* IRQ is active */
 198
 199 /* definitions for codec irq status - CS4231_IRQ_STATUS */
 200
 201 #define CS4231_PLAYBACK_IRQ     0x10
 202 #define CS4231_RECORD_IRQ       0x20
 203 #define CS4231_TIMER_IRQ        0x40
 204 #define CS4231_ALL_IRQS         0x70
 205 #define CS4231_REC_UNDERRUN     0x08
 206 #define CS4231_REC_OVERRUN      0x04
 207 #define CS4231_PLY_OVERRUN      0x02
 208 #define CS4231_PLY_UNDERRUN     0x01
 209
 210 /* definitions for CS4231_LEFT_INPUT and CS4231_RIGHT_INPUT registers */
 211
 212 #define CS4231_ENABLE_MIC_GAIN  0x20
 213
 214 #define CS4231_MIXS_LINE        0x00
 215 #define CS4231_MIXS_AUX1        0x40
 216 #define CS4231_MIXS_MIC         0x80
 217 #define CS4231_MIXS_ALL         0xc0
 218
 219 /* definitions for clock and data format register - CS4231_PLAYBK_FORMAT */
 220
 221 #define CS4231_LINEAR_8         0x00    /* 8-bit unsigned data */
 222 #define CS4231_ALAW_8           0x60    /* 8-bit A-law companded */
 223 #define CS4231_ULAW_8           0x20    /* 8-bit U-law companded */
 224 #define CS4231_LINEAR_16        0x40    /* 16-bit twos complement data - little endian */
 225 #define CS4231_LINEAR_16_BIG    0xc0    /* 16-bit twos complement data - big endian */
 226 #define CS4231_ADPCM_16         0xa0    /* 16-bit ADPCM */
 227 #define CS4231_STEREO           0x10    /* stereo mode */
 228 /* bits 3-1 define frequency divisor */
 229 #define CS4231_XTAL1            0x00    /* 24.576 crystal */
 230 #define CS4231_XTAL2            0x01    /* 16.9344 crystal */
 231
 232 /* definitions for interface control register - CS4231_IFACE_CTRL */
 233
 234 #define CS4231_RECORD_PIO       0x80    /* record PIO enable */
 235 #define CS4231_PLAYBACK_PIO     0x40    /* playback PIO enable */
 236 #define CS4231_CALIB_MODE       0x18    /* calibration mode bits */
 237 #define CS4231_AUTOCALIB        0x08    /* auto calibrate */
 238 #define CS4231_SINGLE_DMA       0x04    /* use single DMA channel */
 239 #define CS4231_RECORD_ENABLE    0x02    /* record enable */
 240 #define CS4231_PLAYBACK_ENABLE  0x01    /* playback enable */
 241
 242 /* definitions for pin control register - CS4231_PIN_CTRL */
 243
 244 #define CS4231_IRQ_ENABLE       0x02    /* enable IRQ */
 245 #define CS4231_XCTL1            0x40    /* external control #1 */
 246 #define CS4231_XCTL0            0x80    /* external control #0 */
 247
 248 /* definitions for test and init register - CS4231_TEST_INIT */
 249
 250 #define CS4231_CALIB_IN_PROGRESS 0x20   /* auto calibrate in progress */
 251 #define CS4231_DMA_REQUEST      0x10    /* DMA request in progress */
 252
 253 /* definitions for misc control register - CS4231_MISC_INFO */
 254
 255 #define CS4231_MODE2            0x40    /* MODE 2 */
 256 #define CS4231_IW_MODE3         0x6c    /* MODE 3 - InterWave enhanced mode */
 257 #define CS4231_4236_MODE3       0xe0    /* MODE 3 - CS4236+ enhanced mode */
 258
 259 /* definitions for alternate feature 1 register - CS4231_ALT_FEATURE_1 */
 260
 261 #define CS4231_DACZ             0x01    /* zero DAC when underrun */
 262 #define CS4231_TIMER_ENABLE     0x40    /* codec timer enable */
 263 #define CS4231_OLB              0x80    /* output level bit */
 264
 265 /* SBUS DMA register defines.  */
 266
 267 #define APCCSR  0x10UL  /* APC DMA CSR */
 268 #define APCCVA  0x20UL  /* APC Capture DMA Address */
 269 #define APCCC   0x24UL  /* APC Capture Count */
 270 #define APCCNVA 0x28UL  /* APC Capture DMA Next Address */
 271 #define APCCNC  0x2cUL  /* APC Capture Next Count */
 272 #define APCPVA  0x30UL  /* APC Play DMA Address */
 273 #define APCPC   0x34UL  /* APC Play Count */
 274 #define APCPNVA 0x38UL  /* APC Play DMA Next Address */
 275 #define APCPNC  0x3cUL  /* APC Play Next Count */
 276
 277 /* Defines for SBUS DMA-routines */
 278
 279 #define APCVA  0x0UL    /* APC DMA Address */
 280 #define APCC   0x4UL    /* APC Count */
 281 #define APCNVA 0x8UL    /* APC DMA Next Address */
 282 #define APCNC  0xcUL    /* APC Next Count */
 283 #define APC_PLAY 0x30UL /* Play registers start at 0x30 */
 284 #define APC_RECORD 0x20UL /* Record registers start at 0x20 */
 285
 286 /* APCCSR bits */
 287
 288 #define APC_INT_PENDING 0x800000 /* Interrupt Pending */
 289 #define APC_PLAY_INT    0x400000 /* Playback interrupt */
 290 #define APC_CAPT_INT    0x200000 /* Capture interrupt */
 291 #define APC_GENL_INT    0x100000 /* General interrupt */
 292 #define APC_XINT_ENA    0x80000  /* General ext int. enable */
 293 #define APC_XINT_PLAY   0x40000  /* Playback ext intr */
 294 #define APC_XINT_CAPT   0x20000  /* Capture ext intr */
 295 #define APC_XINT_GENL   0x10000  /* Error ext intr */
 296 #define APC_XINT_EMPT   0x8000   /* Pipe empty interrupt (0 write to pva) */
 297 #define APC_XINT_PEMP   0x4000   /* Play pipe empty (pva and pnva not set) */
 298 #define APC_XINT_PNVA   0x2000   /* Playback NVA dirty */
 299 #define APC_XINT_PENA   0x1000   /* play pipe empty Int enable */
 300 #define APC_XINT_COVF   0x800    /* Cap data dropped on floor */
 301 #define APC_XINT_CNVA   0x400    /* Capture NVA dirty */
 302 #define APC_XINT_CEMP   0x200    /* Capture pipe empty (cva and cnva not set) */
 303 #define APC_XINT_CENA   0x100    /* Cap. pipe empty int enable */
 304 #define APC_PPAUSE      0x80     /* Pause the play DMA */
 305 #define APC_CPAUSE      0x40     /* Pause the capture DMA */
 306 #define APC_CDC_RESET   0x20     /* CODEC RESET */
 307 #define APC_PDMA_READY  0x08     /* Play DMA Go */
 308 #define APC_CDMA_READY  0x04     /* Capture DMA Go */
 309 #define APC_CHIP_RESET  0x01     /* Reset the chip */
 310
 311 /* EBUS DMA register offsets  */
 312
 313 #define EBDMA_CSR       0x00UL  /* Control/Status */
 314 #define EBDMA_ADDR      0x04UL  /* DMA Address */
 315 #define EBDMA_COUNT     0x08UL  /* DMA Count */
 316
 317 /*
 318  *  Some variables
 319  */
 320
 321 static unsigned char freq_bits[14] = {
 322         /* 5510 */      0x00 | CS4231_XTAL2,
 323         /* 6620 */      0x0E | CS4231_XTAL2,
 324         /* 8000 */      0x00 | CS4231_XTAL1,
 325         /* 9600 */      0x0E | CS4231_XTAL1,
 326         /* 11025 */     0x02 | CS4231_XTAL2,
 327         /* 16000 */     0x02 | CS4231_XTAL1,
 328         /* 18900 */     0x04 | CS4231_XTAL2,
 329         /* 22050 */     0x06 | CS4231_XTAL2,
 330         /* 27042 */     0x04 | CS4231_XTAL1,
 331         /* 32000 */     0x06 | CS4231_XTAL1,
 332         /* 33075 */     0x0C | CS4231_XTAL2,
 333         /* 37800 */     0x08 | CS4231_XTAL2,
 334         /* 44100 */     0x0A | CS4231_XTAL2,
 335         /* 48000 */     0x0C | CS4231_XTAL1
 336 };
 337
 338 static unsigned int rates[14] = {
 339         5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
 340         27042, 32000, 33075, 37800, 44100, 48000
 341 };
 342
 343 static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
 344         .count  = 14,
 345         .list   = rates,
 346 };
 347
 348 static int snd_cs4231_xrate(struct snd_pcm_runtime *runtime)
 349 {
 350         return snd_pcm_hw_constraint_list(runtime, 0,
 351                                           SNDRV_PCM_HW_PARAM_RATE,
 352                                           &hw_constraints_rates);
 353 }
 354
 355 static unsigned char snd_cs4231_original_image[32] =
 356 {
 357         0x00,                   /* 00/00 - lic */
 358         0x00,                   /* 01/01 - ric */
 359         0x9f,                   /* 02/02 - la1ic */
 360         0x9f,                   /* 03/03 - ra1ic */
 361         0x9f,                   /* 04/04 - la2ic */
 362         0x9f,                   /* 05/05 - ra2ic */
 363         0xbf,                   /* 06/06 - loc */
 364         0xbf,                   /* 07/07 - roc */
 365         0x20,                   /* 08/08 - pdfr */
 366         CS4231_AUTOCALIB,       /* 09/09 - ic */
 367         0x00,                   /* 0a/10 - pc */
 368         0x00,                   /* 0b/11 - ti */
 369         CS4231_MODE2,           /* 0c/12 - mi */
 370         0x00,                   /* 0d/13 - lbc */
 371         0x00,                   /* 0e/14 - pbru */
 372         0x00,                   /* 0f/15 - pbrl */
 373         0x80,                   /* 10/16 - afei */
 374         0x01,                   /* 11/17 - afeii */
 375         0x9f,                   /* 12/18 - llic */
 376         0x9f,                   /* 13/19 - rlic */
 377         0x00,                   /* 14/20 - tlb */
 378         0x00,                   /* 15/21 - thb */
 379         0x00,                   /* 16/22 - la3mic/reserved */
 380         0x00,                   /* 17/23 - ra3mic/reserved */
 381         0x00,                   /* 18/24 - afs */
 382         0x00,                   /* 19/25 - lamoc/version */
 383         0x00,                   /* 1a/26 - mioc */
 384         0x00,                   /* 1b/27 - ramoc/reserved */
 385         0x20,                   /* 1c/28 - cdfr */
 386         0x00,                   /* 1d/29 - res4 */
 387         0x00,                   /* 1e/30 - cbru */
 388         0x00,                   /* 1f/31 - cbrl */
 389 };
 390
 391 static u8 __cs4231_readb(struct snd_cs4231 *cp, void __iomem *reg_addr)
 392 {
 393 #ifdef EBUS_SUPPORT
 394         if (cp->flags & CS4231_FLAG_EBUS) {
 395                 return readb(reg_addr);
 396         } else {
 397 #endif
 398 #ifdef SBUS_SUPPORT
 399                 return sbus_readb(reg_addr);
 400 #endif
 401 #ifdef EBUS_SUPPORT
 402         }
 403 #endif
 404 }
 405
 406 static void __cs4231_writeb(struct snd_cs4231 *cp, u8 val, void __iomem *reg_addr)
 407 {
 408 #ifdef EBUS_SUPPORT
 409         if (cp->flags & CS4231_FLAG_EBUS) {
 410                 return writeb(val, reg_addr);
 411         } else {
 412 #endif
 413 #ifdef SBUS_SUPPORT
 414                 return sbus_writeb(val, reg_addr);
 415 #endif
 416 #ifdef EBUS_SUPPORT
 417         }
 418 #endif
 419 }
 420
 421 /*
 422  *  Basic I/O functions
 423  */
 424
 425 static void snd_cs4231_outm(struct snd_cs4231 *chip, unsigned char reg,
 426                      unsigned char mask, unsigned char value)
 427 {
 428         int timeout;
 429         unsigned char tmp;
 430
 431         for (timeout = 250;
 432              timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT);
 433              timeout--)
 434                 udelay(100);
 435 #ifdef CONFIG_SND_DEBUG
 436         if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
 437                 snd_printdd("outm: auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value);
 438 #endif
 439         if (chip->calibrate_mute) {
 440                 chip->image[reg] &= mask;
 441                 chip->image[reg] |= value;
 442         } else {
 443                 __cs4231_writeb(chip, chip->mce_bit | reg, CS4231P(chip, REGSEL));
 444                 mb();
 445                 tmp = (chip->image[reg] & mask) | value;
 446                 __cs4231_writeb(chip, tmp, CS4231P(chip, REG));
 447                 chip->image[reg] = tmp;
 448                 mb();
 449         }
 450 }
 451
 452 static void snd_cs4231_dout(struct snd_cs4231 *chip, unsigned char reg, unsigned char value)
 453 {
 454         int timeout;
 455
 456         for (timeout = 250;
 457              timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT);
 458              timeout--)
 459                 udelay(100);
 460 #ifdef CONFIG_SND_DEBUG
 461         if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
 462                 snd_printdd("out: auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value);
 463 #endif
 464         __cs4231_writeb(chip, chip->mce_bit | reg, CS4231P(chip, REGSEL));
 465         __cs4231_writeb(chip, value, CS4231P(chip, REG));
 466         mb();
 467 }
 468
 469 static void snd_cs4231_out(struct snd_cs4231 *chip, unsigned char reg, unsigned char value)
 470 {
 471         int timeout;
 472
 473         for (timeout = 250;
 474              timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT);
 475              timeout--)
 476                 udelay(100);
 477 #ifdef CONFIG_SND_DEBUG
 478         if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
 479                 snd_printdd("out: auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value);
 480 #endif
 481         __cs4231_writeb(chip, chip->mce_bit | reg, CS4231P(chip, REGSEL));
 482         __cs4231_writeb(chip, value, CS4231P(chip, REG));
 483         chip->image[reg] = value;
 484         mb();
 485 }
 486
 487 static unsigned char snd_cs4231_in(struct snd_cs4231 *chip, unsigned char reg)
 488 {
 489         int timeout;
 490         unsigned char ret;
 491
 492         for (timeout = 250;
 493              timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT);
 494              timeout--)
 495                 udelay(100);
 496 #ifdef CONFIG_SND_DEBUG
 497         if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
 498                 snd_printdd("in: auto calibration time out - reg = 0x%x\n", reg);
 499 #endif
 500         __cs4231_writeb(chip, chip->mce_bit | reg, CS4231P(chip, REGSEL));
 501         mb();
 502         ret = __cs4231_readb(chip, CS4231P(chip, REG));
 503         return ret;
 504 }
 505
 506 /*
 507  *  CS4231 detection / MCE routines
 508  */
 509
 510 static void snd_cs4231_busy_wait(struct snd_cs4231 *chip)
 511 {
 512         int timeout;
 513
 514         /* huh.. looks like this sequence is proper for CS4231A chip (GUS MAX) */
 515         for (timeout = 5; timeout > 0; timeout--)
 516                 __cs4231_readb(chip, CS4231P(chip, REGSEL));
 517
 518         /* end of cleanup sequence */
 519         for (timeout = 500;
 520              timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT);
 521              timeout--)
 522                 udelay(1000);
 523 }
 524
 525 static void snd_cs4231_mce_up(struct snd_cs4231 *chip)
 526 {
 527         unsigned long flags;
 528         int timeout;
 529
 530         spin_lock_irqsave(&chip->lock, flags);
 531         for (timeout = 250; timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT); timeout--)
 532                 udelay(100);
 533 #ifdef CONFIG_SND_DEBUG
 534         if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
 535                 snd_printdd("mce_up - auto calibration time out (0)\n");
 536 #endif
 537         chip->mce_bit |= CS4231_MCE;
 538         timeout = __cs4231_readb(chip, CS4231P(chip, REGSEL));
 539         if (timeout == 0x80)
 540                 snd_printdd("mce_up [%p]: serious init problem - codec still busy\n", chip->port);
 541         if (!(timeout & CS4231_MCE))
 542                 __cs4231_writeb(chip, chip->mce_bit | (timeout & 0x1f), CS4231P(chip, REGSEL));
 543         spin_unlock_irqrestore(&chip->lock, flags);
 544 }
 545
 546 static void snd_cs4231_mce_down(struct snd_cs4231 *chip)
 547 {
 548         unsigned long flags;
 549         int timeout;
 550
 551         spin_lock_irqsave(&chip->lock, flags);
 552         snd_cs4231_busy_wait(chip);
 553 #ifdef CONFIG_SND_DEBUG
 554         if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
 555                 snd_printdd("mce_down [%p] - auto calibration time out (0)\n", CS4231P(chip, REGSEL));
 556 #endif
 557         chip->mce_bit &= ~CS4231_MCE;
 558         timeout = __cs4231_readb(chip, CS4231P(chip, REGSEL));
 559         __cs4231_writeb(chip, chip->mce_bit | (timeout & 0x1f), CS4231P(chip, REGSEL));
 560         if (timeout == 0x80)
 561                 snd_printdd("mce_down [%p]: serious init problem - codec still busy\n", chip->port);
 562         if ((timeout & CS4231_MCE) == 0) {
 563                 spin_unlock_irqrestore(&chip->lock, flags);
 564                 return;
 565         }
 566         snd_cs4231_busy_wait(chip);
 567
 568         /* calibration process */
 569
 570         for (timeout = 500; timeout > 0 && (snd_cs4231_in(chip, CS4231_TEST_INIT) & CS4231_CALIB_IN_PROGRESS) == 0; timeout--)
 571                 udelay(100);
 572         if ((snd_cs4231_in(chip, CS4231_TEST_INIT) & CS4231_CALIB_IN_PROGRESS) == 0) {
 573                 snd_printd("cs4231_mce_down - auto calibration time out (1)\n");
 574                 spin_unlock_irqrestore(&chip->lock, flags);
 575                 return;
 576         }
 577
 578         /* in 10ms increments, check condition, up to 250ms */
 579         timeout = 25;
 580         while (snd_cs4231_in(chip, CS4231_TEST_INIT) & CS4231_CALIB_IN_PROGRESS) {
 581                 spin_unlock_irqrestore(&chip->lock, flags);
 582                 if (--timeout < 0) {
 583                         snd_printk("mce_down - auto calibration time out (2)\n");
 584                         return;
 585                 }
 586                 msleep(10);
 587                 spin_lock_irqsave(&chip->lock, flags);
 588         }
 589
 590         /* in 10ms increments, check condition, up to 100ms */
 591         timeout = 10;
 592         while (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT) {
 593                 spin_unlock_irqrestore(&chip->lock, flags);
 594                 if (--timeout < 0) {
 595                         snd_printk("mce_down - auto calibration time out (3)\n");
 596                         return;
 597                 }
 598                 msleep(10);
 599                 spin_lock_irqsave(&chip->lock, flags);
 600         }
 601         spin_unlock_irqrestore(&chip->lock, flags);
 602 }
 603
 604 static void snd_cs4231_advance_dma(struct cs4231_dma_control *dma_cont,
 605                                    struct snd_pcm_substream *substream,
 606                                    unsigned int *periods_sent)
 607 {
 608         struct snd_pcm_runtime *runtime = substream->runtime;
 609
 610         while (1) {
 611                 unsigned int period_size = snd_pcm_lib_period_bytes(substream);
 612                 unsigned int offset = period_size * (*periods_sent);
 613
 614                 if (period_size >= (1 << 24))
 615                         BUG();
 616
 617                 if (dma_cont->request(dma_cont, runtime->dma_addr + offset, period_size))
 618                         return;
 619                 (*periods_sent) = ((*periods_sent) + 1) % runtime->periods;
 620         }
 621 }
 622
 623 static void cs4231_dma_trigger(struct snd_pcm_substream *substream,
 624                                unsigned int what, int on)
 625 {
 626         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
 627         struct cs4231_dma_control *dma_cont;
 628
 629         if (what & CS4231_PLAYBACK_ENABLE) {
 630                 dma_cont = &chip->p_dma;
 631                 if (on) {
 632                         dma_cont->prepare(dma_cont, 0);
 633                         dma_cont->enable(dma_cont, 1);
 634                         snd_cs4231_advance_dma(dma_cont,
 635                                 chip->playback_substream,
 636                                 &chip->p_periods_sent);
 637                 } else {
 638                         dma_cont->enable(dma_cont, 0);
 639                 }
 640         }
 641         if (what & CS4231_RECORD_ENABLE) {
 642                 dma_cont = &chip->c_dma;
 643                 if (on) {
 644                         dma_cont->prepare(dma_cont, 1);
 645                         dma_cont->enable(dma_cont, 1);
 646                         snd_cs4231_advance_dma(dma_cont,
 647                                 chip->capture_substream,
 648                                 &chip->c_periods_sent);
 649                 } else {
 650                         dma_cont->enable(dma_cont, 0);
 651                 }
 652         }
 653 }
 654
 655 static int snd_cs4231_trigger(struct snd_pcm_substream *substream, int cmd)
 656 {
 657         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
 658         int result = 0;
 659
 660         switch (cmd) {
 661         case SNDRV_PCM_TRIGGER_START:
 662         case SNDRV_PCM_TRIGGER_STOP:
 663         {
 664                 unsigned int what = 0;
 665                 struct snd_pcm_substream *s;
 666                 struct list_head *pos;
 667                 unsigned long flags;
 668
 669                 snd_pcm_group_for_each(pos, substream) {
 670                         s = snd_pcm_group_substream_entry(pos);
 671                         if (s == chip->playback_substream) {
 672                                 what |= CS4231_PLAYBACK_ENABLE;
 673                                 snd_pcm_trigger_done(s, substream);
 674                         } else if (s == chip->capture_substream) {
 675                                 what |= CS4231_RECORD_ENABLE;
 676                                 snd_pcm_trigger_done(s, substream);
 677                         }
 678                 }
 679
 680                 spin_lock_irqsave(&chip->lock, flags);
 681                 if (cmd == SNDRV_PCM_TRIGGER_START) {
 682                         cs4231_dma_trigger(substream, what, 1);
 683                         chip->image[CS4231_IFACE_CTRL] |= what;
 684                 } else {
 685                         cs4231_dma_trigger(substream, what, 0);
 686                         chip->image[CS4231_IFACE_CTRL] &= ~what;
 687                 }
 688                 snd_cs4231_out(chip, CS4231_IFACE_CTRL,
 689                                chip->image[CS4231_IFACE_CTRL]);
 690                 spin_unlock_irqrestore(&chip->lock, flags);
 691                 break;
 692         }
 693         default:
 694                 result = -EINVAL;
 695                 break;
 696         }
 697
 698         return result;
 699 }
 700
 701 /*
 702  *  CODEC I/O
 703  */
 704
 705 static unsigned char snd_cs4231_get_rate(unsigned int rate)
 706 {
 707         int i;
 708
 709         for (i = 0; i < 14; i++)
 710                 if (rate == rates[i])
 711                         return freq_bits[i];
 712         // snd_BUG();
 713         return freq_bits[13];
 714 }
 715
 716 static unsigned char snd_cs4231_get_format(struct snd_cs4231 *chip, int format, int channels)
 717 {
 718         unsigned char rformat;
 719
 720         rformat = CS4231_LINEAR_8;
 721         switch (format) {
 722         case SNDRV_PCM_FORMAT_MU_LAW:   rformat = CS4231_ULAW_8; break;
 723         case SNDRV_PCM_FORMAT_A_LAW:    rformat = CS4231_ALAW_8; break;
 724         case SNDRV_PCM_FORMAT_S16_LE:   rformat = CS4231_LINEAR_16; break;
 725         case SNDRV_PCM_FORMAT_S16_BE:   rformat = CS4231_LINEAR_16_BIG; break;
 726         case SNDRV_PCM_FORMAT_IMA_ADPCM:        rformat = CS4231_ADPCM_16; break;
 727         }
 728         if (channels > 1)
 729                 rformat |= CS4231_STEREO;
 730         return rformat;
 731 }
 732
 733 static void snd_cs4231_calibrate_mute(struct snd_cs4231 *chip, int mute)
 734 {
 735         unsigned long flags;
 736
 737         mute = mute ? 1 : 0;
 738         spin_lock_irqsave(&chip->lock, flags);
 739         if (chip->calibrate_mute == mute) {
 740                 spin_unlock_irqrestore(&chip->lock, flags);
 741                 return;
 742         }
 743         if (!mute) {
 744                 snd_cs4231_dout(chip, CS4231_LEFT_INPUT,
 745                                 chip->image[CS4231_LEFT_INPUT]);
 746                 snd_cs4231_dout(chip, CS4231_RIGHT_INPUT,
 747                                 chip->image[CS4231_RIGHT_INPUT]);
 748                 snd_cs4231_dout(chip, CS4231_LOOPBACK,
 749                                 chip->image[CS4231_LOOPBACK]);
 750         }
 751         snd_cs4231_dout(chip, CS4231_AUX1_LEFT_INPUT,
 752                         mute ? 0x80 : chip->image[CS4231_AUX1_LEFT_INPUT]);
 753         snd_cs4231_dout(chip, CS4231_AUX1_RIGHT_INPUT,
 754                         mute ? 0x80 : chip->image[CS4231_AUX1_RIGHT_INPUT]);
 755         snd_cs4231_dout(chip, CS4231_AUX2_LEFT_INPUT,
 756                         mute ? 0x80 : chip->image[CS4231_AUX2_LEFT_INPUT]);
 757         snd_cs4231_dout(chip, CS4231_AUX2_RIGHT_INPUT,
 758                         mute ? 0x80 : chip->image[CS4231_AUX2_RIGHT_INPUT]);
 759         snd_cs4231_dout(chip, CS4231_LEFT_OUTPUT,
 760                         mute ? 0x80 : chip->image[CS4231_LEFT_OUTPUT]);
 761         snd_cs4231_dout(chip, CS4231_RIGHT_OUTPUT,
 762                         mute ? 0x80 : chip->image[CS4231_RIGHT_OUTPUT]);
 763         snd_cs4231_dout(chip, CS4231_LEFT_LINE_IN,
 764                         mute ? 0x80 : chip->image[CS4231_LEFT_LINE_IN]);
 765         snd_cs4231_dout(chip, CS4231_RIGHT_LINE_IN,
 766                         mute ? 0x80 : chip->image[CS4231_RIGHT_LINE_IN]);
 767         snd_cs4231_dout(chip, CS4231_MONO_CTRL,
 768                         mute ? 0xc0 : chip->image[CS4231_MONO_CTRL]);
 769         chip->calibrate_mute = mute;
 770         spin_unlock_irqrestore(&chip->lock, flags);
 771 }
 772
 773 static void snd_cs4231_playback_format(struct snd_cs4231 *chip, struct snd_pcm_hw_params *params,
 774                                        unsigned char pdfr)
 775 {
 776         unsigned long flags;
 777
 778         mutex_lock(&chip->mce_mutex);
 779         snd_cs4231_calibrate_mute(chip, 1);
 780
 781         snd_cs4231_mce_up(chip);
 782
 783         spin_lock_irqsave(&chip->lock, flags);
 784         snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
 785                        (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) ?
 786                        (pdfr & 0xf0) | (chip->image[CS4231_REC_FORMAT] & 0x0f) :
 787                        pdfr);
 788         spin_unlock_irqrestore(&chip->lock, flags);
 789
 790         snd_cs4231_mce_down(chip);
 791
 792         snd_cs4231_calibrate_mute(chip, 0);
 793         mutex_unlock(&chip->mce_mutex);
 794 }
 795
 796 static void snd_cs4231_capture_format(struct snd_cs4231 *chip, struct snd_pcm_hw_params *params,
 797                                       unsigned char cdfr)
 798 {
 799         unsigned long flags;
 800
 801         mutex_lock(&chip->mce_mutex);
 802         snd_cs4231_calibrate_mute(chip, 1);
 803
 804         snd_cs4231_mce_up(chip);
 805
 806         spin_lock_irqsave(&chip->lock, flags);
 807         if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
 808                 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
 809                                ((chip->image[CS4231_PLAYBK_FORMAT]) & 0xf0) |
 810                                (cdfr & 0x0f));
 811                 spin_unlock_irqrestore(&chip->lock, flags);
 812                 snd_cs4231_mce_down(chip);
 813                 snd_cs4231_mce_up(chip);
 814                 spin_lock_irqsave(&chip->lock, flags);
 815         }
 816         snd_cs4231_out(chip, CS4231_REC_FORMAT, cdfr);
 817         spin_unlock_irqrestore(&chip->lock, flags);
 818
 819         snd_cs4231_mce_down(chip);
 820
 821         snd_cs4231_calibrate_mute(chip, 0);
 822         mutex_unlock(&chip->mce_mutex);
 823 }
 824
 825 /*
 826  *  Timer interface
 827  */
 828
 829 static unsigned long snd_cs4231_timer_resolution(struct snd_timer *timer)
 830 {
 831         struct snd_cs4231 *chip = snd_timer_chip(timer);
 832
 833         return chip->image[CS4231_PLAYBK_FORMAT] & 1 ? 9969 : 9920;
 834 }
 835
 836 static int snd_cs4231_timer_start(struct snd_timer *timer)
 837 {
 838         unsigned long flags;
 839         unsigned int ticks;
 840         struct snd_cs4231 *chip = snd_timer_chip(timer);
 841
 842         spin_lock_irqsave(&chip->lock, flags);
 843         ticks = timer->sticks;
 844         if ((chip->image[CS4231_ALT_FEATURE_1] & CS4231_TIMER_ENABLE) == 0 ||
 845             (unsigned char)(ticks >> 8) != chip->image[CS4231_TIMER_HIGH] ||
 846             (unsigned char)ticks != chip->image[CS4231_TIMER_LOW]) {
 847                 snd_cs4231_out(chip, CS4231_TIMER_HIGH,
 848                                chip->image[CS4231_TIMER_HIGH] =
 849                                (unsigned char) (ticks >> 8));
 850                 snd_cs4231_out(chip, CS4231_TIMER_LOW,
 851                                chip->image[CS4231_TIMER_LOW] =
 852                                (unsigned char) ticks);
 853                 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
 854                                chip->image[CS4231_ALT_FEATURE_1] | CS4231_TIMER_ENABLE);
 855         }
 856         spin_unlock_irqrestore(&chip->lock, flags);
 857
 858         return 0;
 859 }
 860
 861 static int snd_cs4231_timer_stop(struct snd_timer *timer)
 862 {
 863         unsigned long flags;
 864         struct snd_cs4231 *chip = snd_timer_chip(timer);
 865
 866         spin_lock_irqsave(&chip->lock, flags);
 867         snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
 868                        chip->image[CS4231_ALT_FEATURE_1] &= ~CS4231_TIMER_ENABLE);
 869         spin_unlock_irqrestore(&chip->lock, flags);
 870
 871         return 0;
 872 }
 873
 874 static void __init snd_cs4231_init(struct snd_cs4231 *chip)
 875 {
 876         unsigned long flags;
 877
 878         snd_cs4231_mce_down(chip);
 879
 880 #ifdef SNDRV_DEBUG_MCE
 881         snd_printdd("init: (1)\n");
 882 #endif
 883         snd_cs4231_mce_up(chip);
 884         spin_lock_irqsave(&chip->lock, flags);
 885         chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
 886                                             CS4231_RECORD_ENABLE | CS4231_RECORD_PIO |
 887                                             CS4231_CALIB_MODE);
 888         chip->image[CS4231_IFACE_CTRL] |= CS4231_AUTOCALIB;
 889         snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
 890         spin_unlock_irqrestore(&chip->lock, flags);
 891         snd_cs4231_mce_down(chip);
 892
 893 #ifdef SNDRV_DEBUG_MCE
 894         snd_printdd("init: (2)\n");
 895 #endif
 896
 897         snd_cs4231_mce_up(chip);
 898         spin_lock_irqsave(&chip->lock, flags);
 899         snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1]);
 900         spin_unlock_irqrestore(&chip->lock, flags);
 901         snd_cs4231_mce_down(chip);
 902
 903 #ifdef SNDRV_DEBUG_MCE
 904         snd_printdd("init: (3) - afei = 0x%x\n", chip->image[CS4231_ALT_FEATURE_1]);
 905 #endif
 906
 907         spin_lock_irqsave(&chip->lock, flags);
 908         snd_cs4231_out(chip, CS4231_ALT_FEATURE_2, chip->image[CS4231_ALT_FEATURE_2]);
 909         spin_unlock_irqrestore(&chip->lock, flags);
 910
 911         snd_cs4231_mce_up(chip);
 912         spin_lock_irqsave(&chip->lock, flags);
 913         snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, chip->image[CS4231_PLAYBK_FORMAT]);
 914         spin_unlock_irqrestore(&chip->lock, flags);
 915         snd_cs4231_mce_down(chip);
 916
 917 #ifdef SNDRV_DEBUG_MCE
 918         snd_printdd("init: (4)\n");
 919 #endif
 920
 921         snd_cs4231_mce_up(chip);
 922         spin_lock_irqsave(&chip->lock, flags);
 923         snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT]);
 924         spin_unlock_irqrestore(&chip->lock, flags);
 925         snd_cs4231_mce_down(chip);
 926
 927 #ifdef SNDRV_DEBUG_MCE
 928         snd_printdd("init: (5)\n");
 929 #endif
 930 }
 931
 932 static int snd_cs4231_open(struct snd_cs4231 *chip, unsigned int mode)
 933 {
 934         unsigned long flags;
 935
 936         mutex_lock(&chip->open_mutex);
 937         if ((chip->mode & mode)) {
 938                 mutex_unlock(&chip->open_mutex);
 939                 return -EAGAIN;
 940         }
 941         if (chip->mode & CS4231_MODE_OPEN) {
 942                 chip->mode |= mode;
 943                 mutex_unlock(&chip->open_mutex);
 944                 return 0;
 945         }
 946         /* ok. now enable and ack CODEC IRQ */
 947         spin_lock_irqsave(&chip->lock, flags);
 948         snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
 949                        CS4231_RECORD_IRQ |
 950                        CS4231_TIMER_IRQ);
 951         snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
 952         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));        /* clear IRQ */
 953         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));        /* clear IRQ */
 954
 955         snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
 956                        CS4231_RECORD_IRQ |
 957                        CS4231_TIMER_IRQ);
 958         snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
 959
 960         spin_unlock_irqrestore(&chip->lock, flags);
 961
 962         chip->mode = mode;
 963         mutex_unlock(&chip->open_mutex);
 964         return 0;
 965 }
 966
 967 static void snd_cs4231_close(struct snd_cs4231 *chip, unsigned int mode)
 968 {
 969         unsigned long flags;
 970
 971         mutex_lock(&chip->open_mutex);
 972         chip->mode &= ~mode;
 973         if (chip->mode & CS4231_MODE_OPEN) {
 974                 mutex_unlock(&chip->open_mutex);
 975                 return;
 976         }
 977         snd_cs4231_calibrate_mute(chip, 1);
 978
 979         /* disable IRQ */
 980         spin_lock_irqsave(&chip->lock, flags);
 981         snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
 982         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));        /* clear IRQ */
 983         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));        /* clear IRQ */
 984
 985         /* now disable record & playback */
 986
 987         if (chip->image[CS4231_IFACE_CTRL] &
 988             (CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
 989              CS4231_RECORD_ENABLE | CS4231_RECORD_PIO)) {
 990                 spin_unlock_irqrestore(&chip->lock, flags);
 991                 snd_cs4231_mce_up(chip);
 992                 spin_lock_irqsave(&chip->lock, flags);
 993                 chip->image[CS4231_IFACE_CTRL] &=
 994                         ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
 995                           CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
 996                 snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
 997                 spin_unlock_irqrestore(&chip->lock, flags);
 998                 snd_cs4231_mce_down(chip);
 999                 spin_lock_irqsave(&chip->lock, flags);
1000         }
1001
1002         /* clear IRQ again */
1003         snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
1004         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));        /* clear IRQ */
1005         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));        /* clear IRQ */
1006         spin_unlock_irqrestore(&chip->lock, flags);
1007
1008         snd_cs4231_calibrate_mute(chip, 0);
1009
1010         chip->mode = 0;
1011         mutex_unlock(&chip->open_mutex);
1012 }
1013
1014 /*
1015  *  timer open/close
1016  */
1017
1018 static int snd_cs4231_timer_open(struct snd_timer *timer)
1019 {
1020         struct snd_cs4231 *chip = snd_timer_chip(timer);
1021         snd_cs4231_open(chip, CS4231_MODE_TIMER);
1022         return 0;
1023 }
1024
1025 static int snd_cs4231_timer_close(struct snd_timer * timer)
1026 {
1027         struct snd_cs4231 *chip = snd_timer_chip(timer);
1028         snd_cs4231_close(chip, CS4231_MODE_TIMER);
1029         return 0;
1030 }
1031
1032 static struct snd_timer_hardware snd_cs4231_timer_table =
1033 {
1034         .flags          =       SNDRV_TIMER_HW_AUTO,
1035         .resolution     =       9945,
1036         .ticks          =       65535,
1037         .open           =       snd_cs4231_timer_open,
1038         .close          =       snd_cs4231_timer_close,
1039         .c_resolution   =       snd_cs4231_timer_resolution,
1040         .start          =       snd_cs4231_timer_start,
1041         .stop           =       snd_cs4231_timer_stop,
1042 };
1043
1044 /*
1045  *  ok.. exported functions..
1046  */
1047
1048 static int snd_cs4231_playback_hw_params(struct snd_pcm_substream *substream,
1049                                          struct snd_pcm_hw_params *hw_params)
1050 {
1051         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1052         unsigned char new_pdfr;
1053         int err;
1054
1055         if ((err = snd_pcm_lib_malloc_pages(substream,
1056                                             params_buffer_bytes(hw_params))) < 0)
1057                 return err;
1058         new_pdfr = snd_cs4231_get_format(chip, params_format(hw_params),
1059                                          params_channels(hw_params)) |
1060                 snd_cs4231_get_rate(params_rate(hw_params));
1061         snd_cs4231_playback_format(chip, hw_params, new_pdfr);
1062
1063         return 0;
1064 }
1065
1066 static int snd_cs4231_playback_hw_free(struct snd_pcm_substream *substream)
1067 {
1068         return snd_pcm_lib_free_pages(substream);
1069 }
1070
1071 static int snd_cs4231_playback_prepare(struct snd_pcm_substream *substream)
1072 {
1073         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1074         struct snd_pcm_runtime *runtime = substream->runtime;
1075         unsigned long flags;
1076
1077         spin_lock_irqsave(&chip->lock, flags);
1078
1079         chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE |
1080                                             CS4231_PLAYBACK_PIO);
1081
1082         if (runtime->period_size > 0xffff + 1)
1083                 BUG();
1084
1085         chip->p_periods_sent = 0;
1086         spin_unlock_irqrestore(&chip->lock, flags);
1087
1088         return 0;
1089 }
1090
1091 static int snd_cs4231_capture_hw_params(struct snd_pcm_substream *substream,
1092                                         struct snd_pcm_hw_params *hw_params)
1093 {
1094         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1095         unsigned char new_cdfr;
1096         int err;
1097
1098         if ((err = snd_pcm_lib_malloc_pages(substream,
1099                                             params_buffer_bytes(hw_params))) < 0)
1100                 return err;
1101         new_cdfr = snd_cs4231_get_format(chip, params_format(hw_params),
1102                                          params_channels(hw_params)) |
1103                 snd_cs4231_get_rate(params_rate(hw_params));
1104         snd_cs4231_capture_format(chip, hw_params, new_cdfr);
1105
1106         return 0;
1107 }
1108
1109 static int snd_cs4231_capture_hw_free(struct snd_pcm_substream *substream)
1110 {
1111         return snd_pcm_lib_free_pages(substream);
1112 }
1113
1114 static int snd_cs4231_capture_prepare(struct snd_pcm_substream *substream)
1115 {
1116         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1117         unsigned long flags;
1118
1119         spin_lock_irqsave(&chip->lock, flags);
1120         chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_RECORD_ENABLE |
1121                                             CS4231_RECORD_PIO);
1122
1123
1124         chip->c_periods_sent = 0;
1125         spin_unlock_irqrestore(&chip->lock, flags);
1126
1127         return 0;
1128 }
1129
1130 static void snd_cs4231_overrange(struct snd_cs4231 *chip)
1131 {
1132         unsigned long flags;
1133         unsigned char res;
1134
1135         spin_lock_irqsave(&chip->lock, flags);
1136         res = snd_cs4231_in(chip, CS4231_TEST_INIT);
1137         spin_unlock_irqrestore(&chip->lock, flags);
1138
1139         if (res & (0x08 | 0x02))        /* detect overrange only above 0dB; may be user selectable? */
1140                 chip->capture_substream->runtime->overrange++;
1141 }
1142
1143 static void snd_cs4231_play_callback(struct snd_cs4231 *chip)
1144 {
1145         if (chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE) {
1146                 snd_pcm_period_elapsed(chip->playback_substream);
1147                 snd_cs4231_advance_dma(&chip->p_dma, chip->playback_substream,
1148                                             &chip->p_periods_sent);
1149         }
1150 }
1151
1152 static void snd_cs4231_capture_callback(struct snd_cs4231 *chip)
1153 {
1154         if (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) {
1155                 snd_pcm_period_elapsed(chip->capture_substream);
1156                 snd_cs4231_advance_dma(&chip->c_dma, chip->capture_substream,
1157                                             &chip->c_periods_sent);
1158         }
1159 }
1160
1161 static snd_pcm_uframes_t snd_cs4231_playback_pointer(struct snd_pcm_substream *substream)
1162 {
1163         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1164         struct cs4231_dma_control *dma_cont = &chip->p_dma;
1165         size_t ptr;
1166
1167         if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE))
1168                 return 0;
1169         ptr = dma_cont->address(dma_cont);
1170         if (ptr != 0)
1171                 ptr -= substream->runtime->dma_addr;
1172
1173         return bytes_to_frames(substream->runtime, ptr);
1174 }
1175
1176 static snd_pcm_uframes_t snd_cs4231_capture_pointer(struct snd_pcm_substream *substream)
1177 {
1178         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1179         struct cs4231_dma_control *dma_cont = &chip->c_dma;
1180         size_t ptr;
1181
1182         if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE))
1183                 return 0;
1184         ptr = dma_cont->address(dma_cont);
1185         if (ptr != 0)
1186                 ptr -= substream->runtime->dma_addr;
1187
1188         return bytes_to_frames(substream->runtime, ptr);
1189 }
1190
1191 /*
1192
1193  */
1194
1195 static int __init snd_cs4231_probe(struct snd_cs4231 *chip)
1196 {
1197         unsigned long flags;
1198         int i, id, vers;
1199         unsigned char *ptr;
1200
1201         id = vers = 0;
1202         for (i = 0; i < 50; i++) {
1203                 mb();
1204                 if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
1205                         udelay(2000);
1206                 else {
1207                         spin_lock_irqsave(&chip->lock, flags);
1208                         snd_cs4231_out(chip, CS4231_MISC_INFO, CS4231_MODE2);
1209                         id = snd_cs4231_in(chip, CS4231_MISC_INFO) & 0x0f;
1210                         vers = snd_cs4231_in(chip, CS4231_VERSION);
1211                         spin_unlock_irqrestore(&chip->lock, flags);
1212                         if (id == 0x0a)
1213                                 break;  /* this is valid value */
1214                 }
1215         }
1216         snd_printdd("cs4231: port = %p, id = 0x%x\n", chip->port, id);
1217         if (id != 0x0a)
1218                 return -ENODEV; /* no valid device found */
1219
1220         spin_lock_irqsave(&chip->lock, flags);
1221
1222
1223         /* Reset DMA engine (sbus only).  */
1224         chip->p_dma.reset(chip);
1225
1226         __cs4231_readb(chip, CS4231P(chip, STATUS));    /* clear any pendings IRQ */
1227         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));
1228         mb();
1229
1230         spin_unlock_irqrestore(&chip->lock, flags);
1231
1232         chip->image[CS4231_MISC_INFO] = CS4231_MODE2;
1233         chip->image[CS4231_IFACE_CTRL] =
1234                 chip->image[CS4231_IFACE_CTRL] & ~CS4231_SINGLE_DMA;
1235         chip->image[CS4231_ALT_FEATURE_1] = 0x80;
1236         chip->image[CS4231_ALT_FEATURE_2] = 0x01;
1237         if (vers & 0x20)
1238                 chip->image[CS4231_ALT_FEATURE_2] |= 0x02;
1239
1240         ptr = (unsigned char *) &chip->image;
1241
1242         snd_cs4231_mce_down(chip);
1243
1244         spin_lock_irqsave(&chip->lock, flags);
1245
1246         for (i = 0; i < 32; i++)        /* ok.. fill all CS4231 registers */
1247                 snd_cs4231_out(chip, i, *ptr++);
1248
1249         spin_unlock_irqrestore(&chip->lock, flags);
1250
1251         snd_cs4231_mce_up(chip);
1252
1253         snd_cs4231_mce_down(chip);
1254
1255         mdelay(2);
1256
1257         return 0;               /* all things are ok.. */
1258 }
1259
1260 static struct snd_pcm_hardware snd_cs4231_playback =
1261 {
1262         .info                   = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1263                                  SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_SYNC_START),
1264         .formats                = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
1265                                  SNDRV_PCM_FMTBIT_IMA_ADPCM |
1266                                  SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
1267                                  SNDRV_PCM_FMTBIT_S16_BE),
1268         .rates                  = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
1269         .rate_min               = 5510,
1270         .rate_max               = 48000,
1271         .channels_min           = 1,
1272         .channels_max           = 2,
1273         .buffer_bytes_max       = (32*1024),
1274         .period_bytes_min       = 4096,
1275         .period_bytes_max       = (32*1024),
1276         .periods_min            = 1,
1277         .periods_max            = 1024,
1278 };
1279
1280 static struct snd_pcm_hardware snd_cs4231_capture =
1281 {
1282         .info                   = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1283                                  SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_SYNC_START),
1284         .formats                = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
1285                                  SNDRV_PCM_FMTBIT_IMA_ADPCM |
1286                                  SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
1287                                  SNDRV_PCM_FMTBIT_S16_BE),
1288         .rates                  = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
1289         .rate_min               = 5510,
1290         .rate_max               = 48000,
1291         .channels_min           = 1,
1292         .channels_max           = 2,
1293         .buffer_bytes_max       = (32*1024),
1294         .period_bytes_min       = 4096,
1295         .period_bytes_max       = (32*1024),
1296         .periods_min            = 1,
1297         .periods_max            = 1024,
1298 };
1299
1300 static int snd_cs4231_playback_open(struct snd_pcm_substream *substream)
1301 {
1302         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1303         struct snd_pcm_runtime *runtime = substream->runtime;
1304         int err;
1305
1306         runtime->hw = snd_cs4231_playback;
1307
1308         if ((err = snd_cs4231_open(chip, CS4231_MODE_PLAY)) < 0) {
1309                 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1310                 return err;
1311         }
1312         chip->playback_substream = substream;
1313         chip->p_periods_sent = 0;
1314         snd_pcm_set_sync(substream);
1315         snd_cs4231_xrate(runtime);
1316
1317         return 0;
1318 }
1319
1320 static int snd_cs4231_capture_open(struct snd_pcm_substream *substream)
1321 {
1322         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1323         struct snd_pcm_runtime *runtime = substream->runtime;
1324         int err;
1325
1326         runtime->hw = snd_cs4231_capture;
1327
1328         if ((err = snd_cs4231_open(chip, CS4231_MODE_RECORD)) < 0) {
1329                 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1330                 return err;
1331         }
1332         chip->capture_substream = substream;
1333         chip->c_periods_sent = 0;
1334         snd_pcm_set_sync(substream);
1335         snd_cs4231_xrate(runtime);
1336
1337         return 0;
1338 }
1339
1340 static int snd_cs4231_playback_close(struct snd_pcm_substream *substream)
1341 {
1342         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1343
1344         snd_cs4231_close(chip, CS4231_MODE_PLAY);
1345         chip->playback_substream = NULL;
1346
1347         return 0;
1348 }
1349
1350 static int snd_cs4231_capture_close(struct snd_pcm_substream *substream)
1351 {
1352         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1353
1354         snd_cs4231_close(chip, CS4231_MODE_RECORD);
1355         chip->capture_substream = NULL;
1356
1357         return 0;
1358 }
1359
1360 /* XXX We can do some power-management, in particular on EBUS using
1361  * XXX the audio AUXIO register...
1362  */
1363
1364 static struct snd_pcm_ops snd_cs4231_playback_ops = {
1365         .open           =       snd_cs4231_playback_open,
1366         .close          =       snd_cs4231_playback_close,
1367         .ioctl          =       snd_pcm_lib_ioctl,
1368         .hw_params      =       snd_cs4231_playback_hw_params,
1369         .hw_free        =       snd_cs4231_playback_hw_free,
1370         .prepare        =       snd_cs4231_playback_prepare,
1371         .trigger        =       snd_cs4231_trigger,
1372         .pointer        =       snd_cs4231_playback_pointer,
1373 };
1374
1375 static struct snd_pcm_ops snd_cs4231_capture_ops = {
1376         .open           =       snd_cs4231_capture_open,
1377         .close          =       snd_cs4231_capture_close,
1378         .ioctl          =       snd_pcm_lib_ioctl,
1379         .hw_params      =       snd_cs4231_capture_hw_params,
1380         .hw_free        =       snd_cs4231_capture_hw_free,
1381         .prepare        =       snd_cs4231_capture_prepare,
1382         .trigger        =       snd_cs4231_trigger,
1383         .pointer        =       snd_cs4231_capture_pointer,
1384 };
1385
1386 static int __init snd_cs4231_pcm(struct snd_cs4231 *chip)
1387 {
1388         struct snd_pcm *pcm;
1389         int err;
1390
1391         if ((err = snd_pcm_new(chip->card, "CS4231", 0, 1, 1, &pcm)) < 0)
1392                 return err;
1393
1394         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_cs4231_playback_ops);
1395         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_cs4231_capture_ops);
1396
1397         /* global setup */
1398         pcm->private_data = chip;
1399         pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
1400         strcpy(pcm->name, "CS4231");
1401
1402         chip->p_dma.preallocate(chip, pcm);
1403
1404         chip->pcm = pcm;
1405
1406         return 0;
1407 }
1408
1409 static int __init snd_cs4231_timer(struct snd_cs4231 *chip)
1410 {
1411         struct snd_timer *timer;
1412         struct snd_timer_id tid;
1413         int err;
1414
1415         /* Timer initialization */
1416         tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1417         tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1418         tid.card = chip->card->number;
1419         tid.device = 0;
1420         tid.subdevice = 0;
1421         if ((err = snd_timer_new(chip->card, "CS4231", &tid, &timer)) < 0)
1422                 return err;
1423         strcpy(timer->name, "CS4231");
1424         timer->private_data = chip;
1425         timer->hw = snd_cs4231_timer_table;
1426         chip->timer = timer;
1427
1428         return 0;
1429 }
1430
1431 /*
1432  *  MIXER part
1433  */
1434
1435 static int snd_cs4231_info_mux(struct snd_kcontrol *kcontrol,
1436                                struct snd_ctl_elem_info *uinfo)
1437 {
1438         static char *texts[4] = {
1439                 "Line", "CD", "Mic", "Mix"
1440         };
1441         struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1442
1443         snd_assert(chip->card != NULL, return -EINVAL);
1444         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1445         uinfo->count = 2;
1446         uinfo->value.enumerated.items = 4;
1447         if (uinfo->value.enumerated.item > 3)
1448                 uinfo->value.enumerated.item = 3;
1449         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1450
1451         return 0;
1452 }
1453
1454 static int snd_cs4231_get_mux(struct snd_kcontrol *kcontrol,
1455                               struct snd_ctl_elem_value *ucontrol)
1456 {
1457         struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1458         unsigned long flags;
1459
1460         spin_lock_irqsave(&chip->lock, flags);
1461         ucontrol->value.enumerated.item[0] =
1462                 (chip->image[CS4231_LEFT_INPUT] & CS4231_MIXS_ALL) >> 6;
1463         ucontrol->value.enumerated.item[1] =
1464                 (chip->image[CS4231_RIGHT_INPUT] & CS4231_MIXS_ALL) >> 6;
1465         spin_unlock_irqrestore(&chip->lock, flags);
1466
1467         return 0;
1468 }
1469
1470 static int snd_cs4231_put_mux(struct snd_kcontrol *kcontrol,
1471                               struct snd_ctl_elem_value *ucontrol)
1472 {
1473         struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1474         unsigned long flags;
1475         unsigned short left, right;
1476         int change;
1477
1478         if (ucontrol->value.enumerated.item[0] > 3 ||
1479             ucontrol->value.enumerated.item[1] > 3)
1480                 return -EINVAL;
1481         left = ucontrol->value.enumerated.item[0] << 6;
1482         right = ucontrol->value.enumerated.item[1] << 6;
1483
1484         spin_lock_irqsave(&chip->lock, flags);
1485
1486         left = (chip->image[CS4231_LEFT_INPUT] & ~CS4231_MIXS_ALL) | left;
1487         right = (chip->image[CS4231_RIGHT_INPUT] & ~CS4231_MIXS_ALL) | right;
1488         change = left != chip->image[CS4231_LEFT_INPUT] ||
1489                  right != chip->image[CS4231_RIGHT_INPUT];
1490         snd_cs4231_out(chip, CS4231_LEFT_INPUT, left);
1491         snd_cs4231_out(chip, CS4231_RIGHT_INPUT, right);
1492
1493         spin_unlock_irqrestore(&chip->lock, flags);
1494
1495         return change;
1496 }
1497
1498 static int snd_cs4231_info_single(struct snd_kcontrol *kcontrol,
1499                                   struct snd_ctl_elem_info *uinfo)
1500 {
1501         int mask = (kcontrol->private_value >> 16) & 0xff;
1502
1503         uinfo->type = (mask == 1) ?
1504                 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1505         uinfo->count = 1;
1506         uinfo->value.integer.min = 0;
1507         uinfo->value.integer.max = mask;
1508
1509         return 0;
1510 }
1511
1512 static int snd_cs4231_get_single(struct snd_kcontrol *kcontrol,
1513                                  struct snd_ctl_elem_value *ucontrol)
1514 {
1515         struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1516         unsigned long flags;
1517         int reg = kcontrol->private_value & 0xff;
1518         int shift = (kcontrol->private_value >> 8) & 0xff;
1519         int mask = (kcontrol->private_value >> 16) & 0xff;
1520         int invert = (kcontrol->private_value >> 24) & 0xff;
1521
1522         spin_lock_irqsave(&chip->lock, flags);
1523
1524         ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
1525
1526         spin_unlock_irqrestore(&chip->lock, flags);
1527
1528         if (invert)
1529                 ucontrol->value.integer.value[0] =
1530                         (mask - ucontrol->value.integer.value[0]);
1531
1532         return 0;
1533 }
1534
1535 static int snd_cs4231_put_single(struct snd_kcontrol *kcontrol,
1536                                  struct snd_ctl_elem_value *ucontrol)
1537 {
1538         struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1539         unsigned long flags;
1540         int reg = kcontrol->private_value & 0xff;
1541         int shift = (kcontrol->private_value >> 8) & 0xff;
1542         int mask = (kcontrol->private_value >> 16) & 0xff;
1543         int invert = (kcontrol->private_value >> 24) & 0xff;
1544         int change;
1545         unsigned short val;
1546
1547         val = (ucontrol->value.integer.value[0] & mask);
1548         if (invert)
1549                 val = mask - val;
1550         val <<= shift;
1551
1552         spin_lock_irqsave(&chip->lock, flags);
1553
1554         val = (chip->image[reg] & ~(mask << shift)) | val;
1555         change = val != chip->image[reg];
1556         snd_cs4231_out(chip, reg, val);
1557
1558         spin_unlock_irqrestore(&chip->lock, flags);
1559
1560         return change;
1561 }
1562
1563 static int snd_cs4231_info_double(struct snd_kcontrol *kcontrol,
1564                                   struct snd_ctl_elem_info *uinfo)
1565 {
1566         int mask = (kcontrol->private_value >> 24) & 0xff;
1567
1568         uinfo->type = mask == 1 ?
1569                 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1570         uinfo->count = 2;
1571         uinfo->value.integer.min = 0;
1572         uinfo->value.integer.max = mask;
1573
1574         return 0;
1575 }
1576
1577 static int snd_cs4231_get_double(struct snd_kcontrol *kcontrol,
1578                                  struct snd_ctl_elem_value *ucontrol)
1579 {
1580         struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1581         unsigned long flags;
1582         int left_reg = kcontrol->private_value & 0xff;
1583         int right_reg = (kcontrol->private_value >> 8) & 0xff;
1584         int shift_left = (kcontrol->private_value >> 16) & 0x07;
1585         int shift_right = (kcontrol->private_value >> 19) & 0x07;
1586         int mask = (kcontrol->private_value >> 24) & 0xff;
1587         int invert = (kcontrol->private_value >> 22) & 1;
1588
1589         spin_lock_irqsave(&chip->lock, flags);
1590
1591         ucontrol->value.integer.value[0] = (chip->image[left_reg] >> shift_left) & mask;
1592         ucontrol->value.integer.value[1] = (chip->image[right_reg] >> shift_right) & mask;
1593
1594         spin_unlock_irqrestore(&chip->lock, flags);
1595
1596         if (invert) {
1597                 ucontrol->value.integer.value[0] =
1598                         (mask - ucontrol->value.integer.value[0]);
1599                 ucontrol->value.integer.value[1] =
1600                         (mask - ucontrol->value.integer.value[1]);
1601         }
1602
1603         return 0;
1604 }
1605
1606 static int snd_cs4231_put_double(struct snd_kcontrol *kcontrol,
1607                                  struct snd_ctl_elem_value *ucontrol)
1608 {
1609         struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1610         unsigned long flags;
1611         int left_reg = kcontrol->private_value & 0xff;
1612         int right_reg = (kcontrol->private_value >> 8) & 0xff;
1613         int shift_left = (kcontrol->private_value >> 16) & 0x07;
1614         int shift_right = (kcontrol->private_value >> 19) & 0x07;
1615         int mask = (kcontrol->private_value >> 24) & 0xff;
1616         int invert = (kcontrol->private_value >> 22) & 1;
1617         int change;
1618         unsigned short val1, val2;
1619
1620         val1 = ucontrol->value.integer.value[0] & mask;
1621         val2 = ucontrol->value.integer.value[1] & mask;
1622         if (invert) {
1623                 val1 = mask - val1;
1624                 val2 = mask - val2;
1625         }
1626         val1 <<= shift_left;
1627         val2 <<= shift_right;
1628
1629         spin_lock_irqsave(&chip->lock, flags);
1630
1631         val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
1632         val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
1633         change = val1 != chip->image[left_reg] || val2 != chip->image[right_reg];
1634         snd_cs4231_out(chip, left_reg, val1);
1635         snd_cs4231_out(chip, right_reg, val2);
1636
1637         spin_unlock_irqrestore(&chip->lock, flags);
1638
1639         return change;
1640 }
1641
1642 #define CS4231_SINGLE(xname, xindex, reg, shift, mask, invert) \
1643 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1644   .info = snd_cs4231_info_single, \
1645   .get = snd_cs4231_get_single, .put = snd_cs4231_put_single, \
1646   .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
1647
1648 #define CS4231_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
1649 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1650   .info = snd_cs4231_info_double, \
1651   .get = snd_cs4231_get_double, .put = snd_cs4231_put_double, \
1652   .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) }
1653
1654 static struct snd_kcontrol_new snd_cs4231_controls[] __initdata = {
1655 CS4231_DOUBLE("PCM Playback Switch", 0, CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 7, 7, 1, 1),
1656 CS4231_DOUBLE("PCM Playback Volume", 0, CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 0, 0, 63, 1),
1657 CS4231_DOUBLE("Line Playback Switch", 0, CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 7, 7, 1, 1),
1658 CS4231_DOUBLE("Line Playback Volume", 0, CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 0, 0, 31, 1),
1659 CS4231_DOUBLE("Aux Playback Switch", 0, CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
1660 CS4231_DOUBLE("Aux Playback Volume", 0, CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1),
1661 CS4231_DOUBLE("Aux Playback Switch", 1, CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
1662 CS4231_DOUBLE("Aux Playback Volume", 1, CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1),
1663 CS4231_SINGLE("Mono Playback Switch", 0, CS4231_MONO_CTRL, 7, 1, 1),
1664 CS4231_SINGLE("Mono Playback Volume", 0, CS4231_MONO_CTRL, 0, 15, 1),
1665 CS4231_SINGLE("Mono Output Playback Switch", 0, CS4231_MONO_CTRL, 6, 1, 1),
1666 CS4231_SINGLE("Mono Output Playback Bypass", 0, CS4231_MONO_CTRL, 5, 1, 0),
1667 CS4231_DOUBLE("Capture Volume", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 0, 0, 15, 0),
1668 {
1669         .iface  = SNDRV_CTL_ELEM_IFACE_MIXER,
1670         .name   = "Capture Source",
1671         .info   = snd_cs4231_info_mux,
1672         .get    = snd_cs4231_get_mux,
1673         .put    = snd_cs4231_put_mux,
1674 },
1675 CS4231_DOUBLE("Mic Boost", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 5, 5, 1, 0),
1676 CS4231_SINGLE("Loopback Capture Switch", 0, CS4231_LOOPBACK, 0, 1, 0),
1677 CS4231_SINGLE("Loopback Capture Volume", 0, CS4231_LOOPBACK, 2, 63, 1),
1678 /* SPARC specific uses of XCTL{0,1} general purpose outputs.  */
1679 CS4231_SINGLE("Line Out Switch", 0, CS4231_PIN_CTRL, 6, 1, 1),
1680 CS4231_SINGLE("Headphone Out Switch", 0, CS4231_PIN_CTRL, 7, 1, 1)
1681 };
1682
1683 static int __init snd_cs4231_mixer(struct snd_cs4231 *chip)
1684 {
1685         struct snd_card *card;
1686         int err, idx;
1687
1688         snd_assert(chip != NULL && chip->pcm != NULL, return -EINVAL);
1689
1690         card = chip->card;
1691
1692         strcpy(card->mixername, chip->pcm->name);
1693
1694         for (idx = 0; idx < ARRAY_SIZE(snd_cs4231_controls); idx++) {
1695                 if ((err = snd_ctl_add(card,
1696                                        snd_ctl_new1(&snd_cs4231_controls[idx],
1697                                                     chip))) < 0)
1698                         return err;
1699         }
1700         return 0;
1701 }
1702
1703 static int dev;
1704
1705 static int __init cs4231_attach_begin(struct snd_card **rcard)
1706 {
1707         struct snd_card *card;
1708
1709         *rcard = NULL;
1710
1711         if (dev >= SNDRV_CARDS)
1712                 return -ENODEV;
1713
1714         if (!enable[dev]) {
1715                 dev++;
1716                 return -ENOENT;
1717         }
1718
1719         card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
1720         if (card == NULL)
1721                 return -ENOMEM;
1722
1723         strcpy(card->driver, "CS4231");
1724         strcpy(card->shortname, "Sun CS4231");
1725
1726         *rcard = card;
1727         return 0;
1728 }
1729
1730 static int __init cs4231_attach_finish(struct snd_card *card, struct snd_cs4231 *chip)
1731 {
1732         int err;
1733
1734         if ((err = snd_cs4231_pcm(chip)) < 0)
1735                 goto out_err;
1736
1737         if ((err = snd_cs4231_mixer(chip)) < 0)
1738                 goto out_err;
1739
1740         if ((err = snd_cs4231_timer(chip)) < 0)
1741                 goto out_err;
1742
1743         if ((err = snd_card_register(card)) < 0)
1744                 goto out_err;
1745
1746         chip->next = cs4231_list;
1747         cs4231_list = chip;
1748
1749         dev++;
1750         return 0;
1751
1752 out_err:
1753         snd_card_free(card);
1754         return err;
1755 }
1756
1757 #ifdef SBUS_SUPPORT
1758
1759 static irqreturn_t snd_cs4231_sbus_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1760 {
1761         unsigned long flags;
1762         unsigned char status;
1763         u32 csr;
1764         struct snd_cs4231 *chip = dev_id;
1765
1766         /*This is IRQ is not raised by the cs4231*/
1767         if (!(__cs4231_readb(chip, CS4231P(chip, STATUS)) & CS4231_GLOBALIRQ))
1768                 return IRQ_NONE;
1769
1770         /* ACK the APC interrupt. */
1771         csr = sbus_readl(chip->port + APCCSR);
1772
1773         sbus_writel(csr, chip->port + APCCSR);
1774
1775         if ((csr & APC_PDMA_READY) &&
1776             (csr & APC_PLAY_INT) &&
1777             (csr & APC_XINT_PNVA) &&
1778             !(csr & APC_XINT_EMPT))
1779                         snd_cs4231_play_callback(chip);
1780
1781         if ((csr & APC_CDMA_READY) &&
1782             (csr & APC_CAPT_INT) &&
1783             (csr & APC_XINT_CNVA) &&
1784             !(csr & APC_XINT_EMPT))
1785                         snd_cs4231_capture_callback(chip);
1786
1787         status = snd_cs4231_in(chip, CS4231_IRQ_STATUS);
1788
1789         if (status & CS4231_TIMER_IRQ) {
1790                 if (chip->timer)
1791                         snd_timer_interrupt(chip->timer, chip->timer->sticks);
1792         }
1793
1794         if ((status & CS4231_RECORD_IRQ) && (csr & APC_CDMA_READY))
1795                 snd_cs4231_overrange(chip);
1796
1797         /* ACK the CS4231 interrupt. */
1798         spin_lock_irqsave(&chip->lock, flags);
1799         snd_cs4231_outm(chip, CS4231_IRQ_STATUS, ~CS4231_ALL_IRQS | ~status, 0);
1800         spin_unlock_irqrestore(&chip->lock, flags);
1801
1802         return 0;
1803 }
1804
1805 /*
1806  * SBUS DMA routines
1807  */
1808
1809 static int sbus_dma_request(struct cs4231_dma_control *dma_cont, dma_addr_t bus_addr, size_t len)
1810 {
1811         unsigned long flags;
1812         u32 test, csr;
1813         int err;
1814         struct sbus_dma_info *base = &dma_cont->sbus_info;
1815
1816         if (len >= (1 << 24))
1817                 return -EINVAL;
1818         spin_lock_irqsave(&base->lock, flags);
1819         csr = sbus_readl(base->regs + APCCSR);
1820         err = -EINVAL;
1821         test = APC_CDMA_READY;
1822         if ( base->dir == APC_PLAY )
1823                 test = APC_PDMA_READY;
1824         if (!(csr & test))
1825                 goto out;
1826         err = -EBUSY;
1827         csr = sbus_readl(base->regs + APCCSR);
1828         test = APC_XINT_CNVA;
1829         if ( base->dir == APC_PLAY )
1830                 test = APC_XINT_PNVA;
1831         if (!(csr & test))
1832                 goto out;
1833         err = 0;
1834         sbus_writel(bus_addr, base->regs + base->dir + APCNVA);
1835         sbus_writel(len, base->regs + base->dir + APCNC);
1836 out:
1837         spin_unlock_irqrestore(&base->lock, flags);
1838         return err;
1839 }
1840
1841 static void sbus_dma_prepare(struct cs4231_dma_control *dma_cont, int d)
1842 {
1843         unsigned long flags;
1844         u32 csr, test;
1845         struct sbus_dma_info *base = &dma_cont->sbus_info;
1846
1847         spin_lock_irqsave(&base->lock, flags);
1848         csr = sbus_readl(base->regs + APCCSR);
1849         test =  APC_GENL_INT | APC_PLAY_INT | APC_XINT_ENA |
1850                 APC_XINT_PLAY | APC_XINT_PEMP | APC_XINT_GENL |
1851                  APC_XINT_PENA;
1852         if ( base->dir == APC_RECORD )
1853                 test = APC_GENL_INT | APC_CAPT_INT | APC_XINT_ENA |
1854                         APC_XINT_CAPT | APC_XINT_CEMP | APC_XINT_GENL;
1855         csr |= test;
1856         sbus_writel(csr, base->regs + APCCSR);
1857         spin_unlock_irqrestore(&base->lock, flags);
1858 }
1859
1860 static void sbus_dma_enable(struct cs4231_dma_control *dma_cont, int on)
1861 {
1862         unsigned long flags;
1863         u32 csr, shift;
1864         struct sbus_dma_info *base = &dma_cont->sbus_info;
1865
1866         spin_lock_irqsave(&base->lock, flags);
1867         if (!on) {
1868                 if (base->dir == APC_PLAY) {
1869                         sbus_writel(0, base->regs + base->dir + APCNVA);
1870                         sbus_writel(1, base->regs + base->dir + APCC);
1871                 }
1872                 else
1873                 {
1874                         sbus_writel(0, base->regs + base->dir + APCNC);
1875                         sbus_writel(0, base->regs + base->dir + APCVA);
1876                 }
1877         }
1878         udelay(600);
1879         csr = sbus_readl(base->regs + APCCSR);
1880         shift = 0;
1881         if ( base->dir == APC_PLAY )
1882                 shift = 1;
1883         if (on)
1884                 csr &= ~(APC_CPAUSE << shift);
1885         else
1886                 csr |= (APC_CPAUSE << shift);
1887         sbus_writel(csr, base->regs + APCCSR);
1888         if (on)
1889                 csr |= (APC_CDMA_READY << shift);
1890         else
1891                 csr &= ~(APC_CDMA_READY << shift);
1892         sbus_writel(csr, base->regs + APCCSR);
1893
1894         spin_unlock_irqrestore(&base->lock, flags);
1895 }
1896
1897 static unsigned int sbus_dma_addr(struct cs4231_dma_control *dma_cont)
1898 {
1899         struct sbus_dma_info *base = &dma_cont->sbus_info;
1900
1901         return sbus_readl(base->regs + base->dir + APCVA);
1902 }
1903
1904 static void sbus_dma_reset(struct snd_cs4231 *chip)
1905 {
1906         sbus_writel(APC_CHIP_RESET, chip->port + APCCSR);
1907         sbus_writel(0x00, chip->port + APCCSR);
1908         sbus_writel(sbus_readl(chip->port + APCCSR) | APC_CDC_RESET,
1909                     chip->port + APCCSR);
1910
1911         udelay(20);
1912
1913         sbus_writel(sbus_readl(chip->port + APCCSR) & ~APC_CDC_RESET,
1914                     chip->port + APCCSR);
1915         sbus_writel(sbus_readl(chip->port + APCCSR) | (APC_XINT_ENA |
1916                        APC_XINT_PENA |
1917                        APC_XINT_CENA),
1918                        chip->port + APCCSR);
1919 }
1920
1921 static void sbus_dma_preallocate(struct snd_cs4231 *chip, struct snd_pcm *pcm)
1922 {
1923         snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_SBUS,
1924                                               snd_dma_sbus_data(chip->dev_u.sdev),
1925                                               64*1024, 128*1024);
1926 }
1927
1928 /*
1929  * Init and exit routines
1930  */
1931
1932 static int snd_cs4231_sbus_free(struct snd_cs4231 *chip)
1933 {
1934         if (chip->irq[0])
1935                 free_irq(chip->irq[0], chip);
1936
1937         if (chip->port)
1938                 sbus_iounmap(chip->port, chip->regs_size);
1939
1940         kfree(chip);
1941
1942         return 0;
1943 }
1944
1945 static int snd_cs4231_sbus_dev_free(struct snd_device *device)
1946 {
1947         struct snd_cs4231 *cp = device->device_data;
1948
1949         return snd_cs4231_sbus_free(cp);
1950 }
1951
1952 static struct snd_device_ops snd_cs4231_sbus_dev_ops = {
1953         .dev_free       =       snd_cs4231_sbus_dev_free,
1954 };
1955
1956 static int __init snd_cs4231_sbus_create(struct snd_card *card,
1957                                          struct sbus_dev *sdev,
1958                                          int dev,
1959                                          struct snd_cs4231 **rchip)
1960 {
1961         struct snd_cs4231 *chip;
1962         int err;
1963
1964         *rchip = NULL;
1965         chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1966         if (chip == NULL)
1967                 return -ENOMEM;
1968
1969         spin_lock_init(&chip->lock);
1970         spin_lock_init(&chip->c_dma.sbus_info.lock);
1971         spin_lock_init(&chip->p_dma.sbus_info.lock);
1972         mutex_init(&chip->mce_mutex);
1973         mutex_init(&chip->open_mutex);
1974         chip->card = card;
1975         chip->dev_u.sdev = sdev;
1976         chip->regs_size = sdev->reg_addrs[0].reg_size;
1977         memcpy(&chip->image, &snd_cs4231_original_image,
1978                sizeof(snd_cs4231_original_image));
1979
1980         chip->port = sbus_ioremap(&sdev->resource[0], 0,
1981                                   chip->regs_size, "cs4231");
1982         if (!chip->port) {
1983                 snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev);
1984                 return -EIO;
1985         }
1986
1987         chip->c_dma.sbus_info.regs = chip->port;
1988         chip->p_dma.sbus_info.regs = chip->port;
1989         chip->c_dma.sbus_info.dir = APC_RECORD;
1990         chip->p_dma.sbus_info.dir = APC_PLAY;
1991
1992         chip->p_dma.prepare = sbus_dma_prepare;
1993         chip->p_dma.enable = sbus_dma_enable;
1994         chip->p_dma.request = sbus_dma_request;
1995         chip->p_dma.address = sbus_dma_addr;
1996         chip->p_dma.reset = sbus_dma_reset;
1997         chip->p_dma.preallocate = sbus_dma_preallocate;
1998
1999         chip->c_dma.prepare = sbus_dma_prepare;
2000         chip->c_dma.enable = sbus_dma_enable;
2001         chip->c_dma.request = sbus_dma_request;
2002         chip->c_dma.address = sbus_dma_addr;
2003         chip->c_dma.reset = sbus_dma_reset;
2004         chip->c_dma.preallocate = sbus_dma_preallocate;
2005
2006         if (request_irq(sdev->irqs[0], snd_cs4231_sbus_interrupt,
2007                         SA_SHIRQ, "cs4231", chip)) {
2008                 snd_printdd("cs4231-%d: Unable to grab SBUS IRQ %s\n",
2009                            dev,
2010                            __irq_itoa(sdev->irqs[0]));
2011                 snd_cs4231_sbus_free(chip);
2012                 return -EBUSY;
2013         }
2014         chip->irq[0] = sdev->irqs[0];
2015
2016         if (snd_cs4231_probe(chip) < 0) {
2017                 snd_cs4231_sbus_free(chip);
2018                 return -ENODEV;
2019         }
2020         snd_cs4231_init(chip);
2021
2022         if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
2023                                   chip, &snd_cs4231_sbus_dev_ops)) < 0) {
2024                 snd_cs4231_sbus_free(chip);
2025                 return err;
2026         }
2027
2028         *rchip = chip;
2029         return 0;
2030 }
2031
2032 static int __init cs4231_sbus_attach(struct sbus_dev *sdev)
2033 {
2034         struct resource *rp = &sdev->resource[0];
2035         struct snd_cs4231 *cp;
2036         struct snd_card *card;
2037         int err;
2038
2039         err = cs4231_attach_begin(&card);
2040         if (err)
2041                 return err;
2042
2043         sprintf(card->longname, "%s at 0x%02lx:0x%08lx, irq %s",
2044                 card->shortname,
2045                 rp->flags & 0xffL,
2046                 rp->start,
2047                 __irq_itoa(sdev->irqs[0]));
2048
2049         if ((err = snd_cs4231_sbus_create(card, sdev, dev, &cp)) < 0) {
2050                 snd_card_free(card);
2051                 return err;
2052         }
2053
2054         return cs4231_attach_finish(card, cp);
2055 }
2056 #endif
2057
2058 #ifdef EBUS_SUPPORT
2059
2060 static void snd_cs4231_ebus_play_callback(struct ebus_dma_info *p, int event, void *cookie)
2061 {
2062         struct snd_cs4231 *chip = cookie;
2063
2064         snd_cs4231_play_callback(chip);
2065 }
2066
2067 static void snd_cs4231_ebus_capture_callback(struct ebus_dma_info *p, int event, void *cookie)
2068 {
2069         struct snd_cs4231 *chip = cookie;
2070
2071         snd_cs4231_capture_callback(chip);
2072 }
2073
2074 /*
2075  * EBUS DMA wrappers
2076  */
2077
2078 static int _ebus_dma_request(struct cs4231_dma_control *dma_cont, dma_addr_t bus_addr, size_t len)
2079 {
2080         return ebus_dma_request(&dma_cont->ebus_info, bus_addr, len);
2081 }
2082
2083 static void _ebus_dma_enable(struct cs4231_dma_control *dma_cont, int on)
2084 {
2085         ebus_dma_enable(&dma_cont->ebus_info, on);
2086 }
2087
2088 static void _ebus_dma_prepare(struct cs4231_dma_control *dma_cont, int dir)
2089 {
2090         ebus_dma_prepare(&dma_cont->ebus_info, dir);
2091 }
2092
2093 static unsigned int _ebus_dma_addr(struct cs4231_dma_control *dma_cont)
2094 {
2095         return ebus_dma_addr(&dma_cont->ebus_info);
2096 }
2097
2098 static void _ebus_dma_reset(struct snd_cs4231 *chip)
2099 {
2100         return;
2101 }
2102
2103 static void _ebus_dma_preallocate(struct snd_cs4231 *chip, struct snd_pcm *pcm)
2104 {
2105         snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
2106                                       snd_dma_pci_data(chip->dev_u.pdev),
2107                                       64*1024, 128*1024);
2108 }
2109
2110 /*
2111  * Init and exit routines
2112  */
2113
2114 static int snd_cs4231_ebus_free(struct snd_cs4231 *chip)
2115 {
2116         if (chip->c_dma.ebus_info.regs) {
2117                 ebus_dma_unregister(&chip->c_dma.ebus_info);
2118                 iounmap(chip->c_dma.ebus_info.regs);
2119         }
2120         if (chip->p_dma.ebus_info.regs) {
2121                 ebus_dma_unregister(&chip->p_dma.ebus_info);
2122                 iounmap(chip->p_dma.ebus_info.regs);
2123         }
2124
2125         if (chip->port)
2126                 iounmap(chip->port);
2127
2128         kfree(chip);
2129
2130         return 0;
2131 }
2132
2133 static int snd_cs4231_ebus_dev_free(struct snd_device *device)
2134 {
2135         struct snd_cs4231 *cp = device->device_data;
2136
2137         return snd_cs4231_ebus_free(cp);
2138 }
2139
2140 static struct snd_device_ops snd_cs4231_ebus_dev_ops = {
2141         .dev_free       =       snd_cs4231_ebus_dev_free,
2142 };
2143
2144 static int __init snd_cs4231_ebus_create(struct snd_card *card,
2145                                          struct linux_ebus_device *edev,
2146                                          int dev,
2147                                          struct snd_cs4231 **rchip)
2148 {
2149         struct snd_cs4231 *chip;
2150         int err;
2151
2152         *rchip = NULL;
2153         chip = kzalloc(sizeof(*chip), GFP_KERNEL);
2154         if (chip == NULL)
2155                 return -ENOMEM;
2156
2157         spin_lock_init(&chip->lock);
2158         spin_lock_init(&chip->c_dma.ebus_info.lock);
2159         spin_lock_init(&chip->p_dma.ebus_info.lock);
2160         mutex_init(&chip->mce_mutex);
2161         mutex_init(&chip->open_mutex);
2162         chip->flags |= CS4231_FLAG_EBUS;
2163         chip->card = card;
2164         chip->dev_u.pdev = edev->bus->self;
2165         memcpy(&chip->image, &snd_cs4231_original_image,
2166                sizeof(snd_cs4231_original_image));
2167         strcpy(chip->c_dma.ebus_info.name, "cs4231(capture)");
2168         chip->c_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
2169         chip->c_dma.ebus_info.callback = snd_cs4231_ebus_capture_callback;
2170         chip->c_dma.ebus_info.client_cookie = chip;
2171         chip->c_dma.ebus_info.irq = edev->irqs[0];
2172         strcpy(chip->p_dma.ebus_info.name, "cs4231(play)");
2173         chip->p_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
2174         chip->p_dma.ebus_info.callback = snd_cs4231_ebus_play_callback;
2175         chip->p_dma.ebus_info.client_cookie = chip;
2176         chip->p_dma.ebus_info.irq = edev->irqs[1];
2177
2178         chip->p_dma.prepare = _ebus_dma_prepare;
2179         chip->p_dma.enable = _ebus_dma_enable;
2180         chip->p_dma.request = _ebus_dma_request;
2181         chip->p_dma.address = _ebus_dma_addr;
2182         chip->p_dma.reset = _ebus_dma_reset;
2183         chip->p_dma.preallocate = _ebus_dma_preallocate;
2184
2185         chip->c_dma.prepare = _ebus_dma_prepare;
2186         chip->c_dma.enable = _ebus_dma_enable;
2187         chip->c_dma.request = _ebus_dma_request;
2188         chip->c_dma.address = _ebus_dma_addr;
2189         chip->c_dma.reset = _ebus_dma_reset;
2190         chip->c_dma.preallocate = _ebus_dma_preallocate;
2191
2192         chip->port = ioremap(edev->resource[0].start, 0x10);
2193         chip->p_dma.ebus_info.regs = ioremap(edev->resource[1].start, 0x10);
2194         chip->c_dma.ebus_info.regs = ioremap(edev->resource[2].start, 0x10);
2195         if (!chip->port || !chip->p_dma.ebus_info.regs || !chip->c_dma.ebus_info.regs) {
2196                 snd_cs4231_ebus_free(chip);
2197                 snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev);
2198                 return -EIO;
2199         }
2200
2201         if (ebus_dma_register(&chip->c_dma.ebus_info)) {
2202                 snd_cs4231_ebus_free(chip);
2203                 snd_printdd("cs4231-%d: Unable to register EBUS capture DMA\n", dev);
2204                 return -EBUSY;
2205         }
2206         if (ebus_dma_irq_enable(&chip->c_dma.ebus_info, 1)) {
2207                 snd_cs4231_ebus_free(chip);
2208                 snd_printdd("cs4231-%d: Unable to enable EBUS capture IRQ\n", dev);
2209                 return -EBUSY;
2210         }
2211
2212         if (ebus_dma_register(&chip->p_dma.ebus_info)) {
2213                 snd_cs4231_ebus_free(chip);
2214                 snd_printdd("cs4231-%d: Unable to register EBUS play DMA\n", dev);
2215                 return -EBUSY;
2216         }
2217         if (ebus_dma_irq_enable(&chip->p_dma.ebus_info, 1)) {
2218                 snd_cs4231_ebus_free(chip);
2219                 snd_printdd("cs4231-%d: Unable to enable EBUS play IRQ\n", dev);
2220                 return -EBUSY;
2221         }
2222
2223         if (snd_cs4231_probe(chip) < 0) {
2224                 snd_cs4231_ebus_free(chip);
2225                 return -ENODEV;
2226         }
2227         snd_cs4231_init(chip);
2228
2229         if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
2230                                   chip, &snd_cs4231_ebus_dev_ops)) < 0) {
2231                 snd_cs4231_ebus_free(chip);
2232                 return err;
2233         }
2234
2235         *rchip = chip;
2236         return 0;
2237 }
2238
2239 static int __init cs4231_ebus_attach(struct linux_ebus_device *edev)
2240 {
2241         struct snd_card *card;
2242         struct snd_cs4231 *chip;
2243         int err;
2244
2245         err = cs4231_attach_begin(&card);
2246         if (err)
2247                 return err;
2248
2249         sprintf(card->longname, "%s at 0x%lx, irq %s",
2250                 card->shortname,
2251                 edev->resource[0].start,
2252                 __irq_itoa(edev->irqs[0]));
2253
2254         if ((err = snd_cs4231_ebus_create(card, edev, dev, &chip)) < 0) {
2255                 snd_card_free(card);
2256                 return err;
2257         }
2258
2259         return cs4231_attach_finish(card, chip);
2260 }
2261 #endif
2262
2263 static int __init cs4231_init(void)
2264 {
2265 #ifdef SBUS_SUPPORT
2266         struct sbus_bus *sbus;
2267         struct sbus_dev *sdev;
2268 #endif
2269 #ifdef EBUS_SUPPORT
2270         struct linux_ebus *ebus;
2271         struct linux_ebus_device *edev;
2272 #endif
2273         int found;
2274
2275         found = 0;
2276
2277 #ifdef SBUS_SUPPORT
2278         for_all_sbusdev(sdev, sbus) {
2279                 if (!strcmp(sdev->prom_name, "SUNW,CS4231")) {
2280                         if (cs4231_sbus_attach(sdev) == 0)
2281                                 found++;
2282                 }
2283         }
2284 #endif
2285 #ifdef EBUS_SUPPORT
2286         for_each_ebus(ebus) {
2287                 for_each_ebusdev(edev, ebus) {
2288                         int match = 0;
2289
2290                         if (!strcmp(edev->prom_name, "SUNW,CS4231")) {
2291                                 match = 1;
2292                         } else if (!strcmp(edev->prom_name, "audio")) {
2293                                 char compat[16];
2294
2295                                 prom_getstring(edev->prom_node, "compatible",
2296                                                compat, sizeof(compat));
2297                                 compat[15] = '\0';
2298                                 if (!strcmp(compat, "SUNW,CS4231"))
2299                                         match = 1;
2300                         }
2301
2302                         if (match &&
2303                             cs4231_ebus_attach(edev) == 0)
2304                                 found++;
2305                 }
2306         }
2307 #endif
2308
2309
2310         return (found > 0) ? 0 : -EIO;
2311 }
2312
2313 static void __exit cs4231_exit(void)
2314 {
2315         struct snd_cs4231 *p = cs4231_list;
2316
2317         while (p != NULL) {
2318                 struct snd_cs4231 *next = p->next;
2319
2320                 snd_card_free(p->card);
2321
2322                 p = next;
2323         }
2324
2325         cs4231_list = NULL;
2326 }
2327
2328 module_init(cs4231_init);
2329 module_exit(cs4231_exit);