2 * soc-cache.c -- ASoC register cache helpers
4 * Copyright 2009 Wolfson Microelectronics PLC.
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
14 #include <linux/i2c.h>
15 #include <linux/spi/spi.h>
16 #include <sound/soc.h>
18 static unsigned int snd_soc_4_12_read(struct snd_soc_codec *codec,
21 u16 *cache = codec->reg_cache;
22 if (reg >= codec->reg_cache_size)
27 static int snd_soc_4_12_write(struct snd_soc_codec *codec, unsigned int reg,
30 u16 *cache = codec->reg_cache;
34 BUG_ON(codec->volatile_register);
36 data[0] = (reg << 4) | ((value >> 8) & 0x000f);
37 data[1] = value & 0x00ff;
39 if (reg < codec->reg_cache_size)
42 if (codec->cache_only)
45 ret = codec->hw_write(codec->control_data, data, 2);
54 #if defined(CONFIG_SPI_MASTER)
55 static int snd_soc_4_12_spi_write(void *control_data, const char *data,
58 struct spi_device *spi = control_data;
59 struct spi_transfer t;
70 memset(&t, 0, (sizeof t));
75 spi_message_add_tail(&t, &m);
81 #define snd_soc_4_12_spi_write NULL
84 static unsigned int snd_soc_7_9_read(struct snd_soc_codec *codec,
87 u16 *cache = codec->reg_cache;
88 if (reg >= codec->reg_cache_size)
93 static int snd_soc_7_9_write(struct snd_soc_codec *codec, unsigned int reg,
96 u16 *cache = codec->reg_cache;
100 BUG_ON(codec->volatile_register);
102 data[0] = (reg << 1) | ((value >> 8) & 0x0001);
103 data[1] = value & 0x00ff;
105 if (reg < codec->reg_cache_size)
108 if (codec->cache_only)
111 ret = codec->hw_write(codec->control_data, data, 2);
120 #if defined(CONFIG_SPI_MASTER)
121 static int snd_soc_7_9_spi_write(void *control_data, const char *data,
124 struct spi_device *spi = control_data;
125 struct spi_transfer t;
126 struct spi_message m;
135 spi_message_init(&m);
136 memset(&t, 0, (sizeof t));
141 spi_message_add_tail(&t, &m);
147 #define snd_soc_7_9_spi_write NULL
150 static int snd_soc_8_8_write(struct snd_soc_codec *codec, unsigned int reg,
153 u8 *cache = codec->reg_cache;
156 BUG_ON(codec->volatile_register);
158 data[0] = reg & 0xff;
159 data[1] = value & 0xff;
161 if (reg < codec->reg_cache_size)
164 if (codec->cache_only)
167 if (codec->hw_write(codec->control_data, data, 2) == 2)
173 static unsigned int snd_soc_8_8_read(struct snd_soc_codec *codec,
176 u8 *cache = codec->reg_cache;
177 if (reg >= codec->reg_cache_size)
182 static int snd_soc_8_16_write(struct snd_soc_codec *codec, unsigned int reg,
185 u16 *reg_cache = codec->reg_cache;
189 data[1] = (value >> 8) & 0xff;
190 data[2] = value & 0xff;
192 if (!snd_soc_codec_volatile_register(codec, reg))
193 reg_cache[reg] = value;
195 if (codec->cache_only)
198 if (codec->hw_write(codec->control_data, data, 3) == 3)
204 static unsigned int snd_soc_8_16_read(struct snd_soc_codec *codec,
207 u16 *cache = codec->reg_cache;
209 if (reg >= codec->reg_cache_size ||
210 snd_soc_codec_volatile_register(codec, reg)) {
211 if (codec->cache_only)
214 return codec->hw_read(codec, reg);
220 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
221 static unsigned int snd_soc_8_16_read_i2c(struct snd_soc_codec *codec,
224 struct i2c_msg xfer[2];
228 struct i2c_client *client = codec->control_data;
231 xfer[0].addr = client->addr;
237 xfer[1].addr = client->addr;
238 xfer[1].flags = I2C_M_RD;
240 xfer[1].buf = (u8 *)&data;
242 ret = i2c_transfer(client->adapter, xfer, 2);
244 dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
248 return (data >> 8) | ((data & 0xff) << 8);
251 #define snd_soc_8_16_read_i2c NULL
254 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
255 static unsigned int snd_soc_16_8_read_i2c(struct snd_soc_codec *codec,
258 struct i2c_msg xfer[2];
262 struct i2c_client *client = codec->control_data;
265 xfer[0].addr = client->addr;
268 xfer[0].buf = (u8 *)®
271 xfer[1].addr = client->addr;
272 xfer[1].flags = I2C_M_RD;
276 ret = i2c_transfer(client->adapter, xfer, 2);
278 dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
285 #define snd_soc_16_8_read_i2c NULL
288 static unsigned int snd_soc_16_8_read(struct snd_soc_codec *codec,
291 u16 *cache = codec->reg_cache;
294 if (reg >= codec->reg_cache_size)
299 static int snd_soc_16_8_write(struct snd_soc_codec *codec, unsigned int reg,
302 u16 *cache = codec->reg_cache;
306 BUG_ON(codec->volatile_register);
308 data[0] = (reg >> 8) & 0xff;
309 data[1] = reg & 0xff;
313 if (reg < codec->reg_cache_size)
316 if (codec->cache_only)
319 ret = codec->hw_write(codec->control_data, data, 3);
328 #if defined(CONFIG_SPI_MASTER)
329 static int snd_soc_16_8_spi_write(void *control_data, const char *data,
332 struct spi_device *spi = control_data;
333 struct spi_transfer t;
334 struct spi_message m;
344 spi_message_init(&m);
345 memset(&t, 0, (sizeof t));
350 spi_message_add_tail(&t, &m);
356 #define snd_soc_16_8_spi_write NULL
363 int (*write)(struct snd_soc_codec *codec, unsigned int, unsigned int);
364 int (*spi_write)(void *, const char *, int);
365 unsigned int (*read)(struct snd_soc_codec *, unsigned int);
366 unsigned int (*i2c_read)(struct snd_soc_codec *, unsigned int);
369 .addr_bits = 4, .data_bits = 12,
370 .write = snd_soc_4_12_write, .read = snd_soc_4_12_read,
371 .spi_write = snd_soc_4_12_spi_write,
374 .addr_bits = 7, .data_bits = 9,
375 .write = snd_soc_7_9_write, .read = snd_soc_7_9_read,
376 .spi_write = snd_soc_7_9_spi_write,
379 .addr_bits = 8, .data_bits = 8,
380 .write = snd_soc_8_8_write, .read = snd_soc_8_8_read,
383 .addr_bits = 8, .data_bits = 16,
384 .write = snd_soc_8_16_write, .read = snd_soc_8_16_read,
385 .i2c_read = snd_soc_8_16_read_i2c,
388 .addr_bits = 16, .data_bits = 8,
389 .write = snd_soc_16_8_write, .read = snd_soc_16_8_read,
390 .i2c_read = snd_soc_16_8_read_i2c,
391 .spi_write = snd_soc_16_8_spi_write,
396 * snd_soc_codec_set_cache_io: Set up standard I/O functions.
398 * @codec: CODEC to configure.
399 * @type: Type of cache.
400 * @addr_bits: Number of bits of register address data.
401 * @data_bits: Number of bits of data per register.
402 * @control: Control bus used.
404 * Register formats are frequently shared between many I2C and SPI
405 * devices. In order to promote code reuse the ASoC core provides
406 * some standard implementations of CODEC read and write operations
407 * which can be set up using this function.
409 * The caller is responsible for allocating and initialising the
412 * Note that at present this code cannot be used by CODECs with
413 * volatile registers.
415 int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec,
416 int addr_bits, int data_bits,
417 enum snd_soc_control_type control)
421 for (i = 0; i < ARRAY_SIZE(io_types); i++)
422 if (io_types[i].addr_bits == addr_bits &&
423 io_types[i].data_bits == data_bits)
425 if (i == ARRAY_SIZE(io_types)) {
427 "No I/O functions for %d bit address %d bit data\n",
428 addr_bits, data_bits);
432 codec->write = io_types[i].write;
433 codec->read = io_types[i].read;
440 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
441 codec->hw_write = (hw_write_t)i2c_master_send;
443 if (io_types[i].i2c_read)
444 codec->hw_read = io_types[i].i2c_read;
448 if (io_types[i].spi_write)
449 codec->hw_write = io_types[i].spi_write;
455 EXPORT_SYMBOL_GPL(snd_soc_codec_set_cache_io);