2 * wm8903.c -- WM8903 ALSA SoC Audio driver
4 * Copyright 2008 Wolfson Microelectronics
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 * - TDM mode configuration.
14 * - Digital microphone support.
15 * - Interrupt support (mic detect and sequencer).
18 #include <linux/module.h>
19 #include <linux/moduleparam.h>
20 #include <linux/init.h>
21 #include <linux/delay.h>
23 #include <linux/i2c.h>
24 #include <linux/platform_device.h>
25 #include <sound/core.h>
26 #include <sound/pcm.h>
27 #include <sound/pcm_params.h>
28 #include <sound/tlv.h>
29 #include <sound/soc.h>
30 #include <sound/soc-dapm.h>
31 #include <sound/initval.h>
35 /* Register defaults at reset */
36 static u16 wm8903_reg_defaults[] = {
37 0x8903, /* R0 - SW Reset and ID */
38 0x0000, /* R1 - Revision Number */
41 0x0018, /* R4 - Bias Control 0 */
42 0x0000, /* R5 - VMID Control 0 */
43 0x0000, /* R6 - Mic Bias Control 0 */
45 0x0001, /* R8 - Analogue DAC 0 */
47 0x0001, /* R10 - Analogue ADC 0 */
49 0x0000, /* R12 - Power Management 0 */
50 0x0000, /* R13 - Power Management 1 */
51 0x0000, /* R14 - Power Management 2 */
52 0x0000, /* R15 - Power Management 3 */
53 0x0000, /* R16 - Power Management 4 */
54 0x0000, /* R17 - Power Management 5 */
55 0x0000, /* R18 - Power Management 6 */
57 0x0400, /* R20 - Clock Rates 0 */
58 0x0D07, /* R21 - Clock Rates 1 */
59 0x0000, /* R22 - Clock Rates 2 */
61 0x0050, /* R24 - Audio Interface 0 */
62 0x0242, /* R25 - Audio Interface 1 */
63 0x0008, /* R26 - Audio Interface 2 */
64 0x0022, /* R27 - Audio Interface 3 */
67 0x00C0, /* R30 - DAC Digital Volume Left */
68 0x00C0, /* R31 - DAC Digital Volume Right */
69 0x0000, /* R32 - DAC Digital 0 */
70 0x0000, /* R33 - DAC Digital 1 */
73 0x00C0, /* R36 - ADC Digital Volume Left */
74 0x00C0, /* R37 - ADC Digital Volume Right */
75 0x0000, /* R38 - ADC Digital 0 */
76 0x0073, /* R39 - Digital Microphone 0 */
77 0x09BF, /* R40 - DRC 0 */
78 0x3241, /* R41 - DRC 1 */
79 0x0020, /* R42 - DRC 2 */
80 0x0000, /* R43 - DRC 3 */
81 0x0085, /* R44 - Analogue Left Input 0 */
82 0x0085, /* R45 - Analogue Right Input 0 */
83 0x0044, /* R46 - Analogue Left Input 1 */
84 0x0044, /* R47 - Analogue Right Input 1 */
87 0x0008, /* R50 - Analogue Left Mix 0 */
88 0x0004, /* R51 - Analogue Right Mix 0 */
89 0x0000, /* R52 - Analogue Spk Mix Left 0 */
90 0x0000, /* R53 - Analogue Spk Mix Left 1 */
91 0x0000, /* R54 - Analogue Spk Mix Right 0 */
92 0x0000, /* R55 - Analogue Spk Mix Right 1 */
94 0x002D, /* R57 - Analogue OUT1 Left */
95 0x002D, /* R58 - Analogue OUT1 Right */
96 0x0039, /* R59 - Analogue OUT2 Left */
97 0x0039, /* R60 - Analogue OUT2 Right */
99 0x0139, /* R62 - Analogue OUT3 Left */
100 0x0139, /* R63 - Analogue OUT3 Right */
102 0x0000, /* R65 - Analogue SPK Output Control 0 */
104 0x0010, /* R67 - DC Servo 0 */
106 0x00A4, /* R69 - DC Servo 2 */
127 0x0000, /* R90 - Analogue HP 0 */
131 0x0000, /* R94 - Analogue Lineout 0 */
135 0x0000, /* R98 - Charge Pump 0 */
141 0x0000, /* R104 - Class W 0 */
145 0x0000, /* R108 - Write Sequencer 0 */
146 0x0000, /* R109 - Write Sequencer 1 */
147 0x0000, /* R110 - Write Sequencer 2 */
148 0x0000, /* R111 - Write Sequencer 3 */
149 0x0000, /* R112 - Write Sequencer 4 */
151 0x0000, /* R114 - Control Interface */
153 0x00A8, /* R116 - GPIO Control 1 */
154 0x00A8, /* R117 - GPIO Control 2 */
155 0x00A8, /* R118 - GPIO Control 3 */
156 0x0220, /* R119 - GPIO Control 4 */
157 0x01A0, /* R120 - GPIO Control 5 */
158 0x0000, /* R121 - Interrupt Status 1 */
159 0xFFFF, /* R122 - Interrupt Status 1 Mask */
160 0x0000, /* R123 - Interrupt Polarity 1 */
163 0x0000, /* R126 - Interrupt Control */
166 0x0000, /* R129 - Control Interface Test 1 */
186 0x6810, /* R149 - Charge Pump Test 1 */
201 0x0028, /* R164 - Clock Rate Test 4 */
209 0x0000, /* R172 - Analogue Output Bias 0 */
213 struct snd_soc_codec codec;
214 u16 reg_cache[ARRAY_SIZE(wm8903_reg_defaults)];
218 /* Reference counts */
223 struct snd_pcm_substream *master_substream;
224 struct snd_pcm_substream *slave_substream;
227 static int wm8903_volatile_register(unsigned int reg)
230 case WM8903_SW_RESET_AND_ID:
231 case WM8903_REVISION_NUMBER:
232 case WM8903_INTERRUPT_STATUS_1:
233 case WM8903_WRITE_SEQUENCER_4:
241 static int wm8903_run_sequence(struct snd_soc_codec *codec, unsigned int start)
244 struct i2c_client *i2c = codec->control_data;
248 /* Enable the sequencer if it's not already on */
249 reg[0] = snd_soc_read(codec, WM8903_WRITE_SEQUENCER_0);
250 snd_soc_write(codec, WM8903_WRITE_SEQUENCER_0,
251 reg[0] | WM8903_WSEQ_ENA);
253 dev_dbg(&i2c->dev, "Starting sequence at %d\n", start);
255 snd_soc_write(codec, WM8903_WRITE_SEQUENCER_3,
256 start | WM8903_WSEQ_START);
258 /* Wait for it to complete. If we have the interrupt wired up then
259 * we could block waiting for an interrupt, though polling may still
260 * be desirable for diagnostic purposes.
265 reg[4] = snd_soc_read(codec, WM8903_WRITE_SEQUENCER_4);
266 } while (reg[4] & WM8903_WSEQ_BUSY);
268 dev_dbg(&i2c->dev, "Sequence complete\n");
270 /* Disable the sequencer again if we enabled it */
271 snd_soc_write(codec, WM8903_WRITE_SEQUENCER_0, reg[0]);
276 static void wm8903_sync_reg_cache(struct snd_soc_codec *codec, u16 *cache)
280 /* There really ought to be something better we can do here :/ */
281 for (i = 0; i < ARRAY_SIZE(wm8903_reg_defaults); i++)
282 cache[i] = codec->hw_read(codec, i);
285 static void wm8903_reset(struct snd_soc_codec *codec)
287 snd_soc_write(codec, WM8903_SW_RESET_AND_ID, 0);
288 memcpy(codec->reg_cache, wm8903_reg_defaults,
289 sizeof(wm8903_reg_defaults));
292 #define WM8903_OUTPUT_SHORT 0x8
293 #define WM8903_OUTPUT_OUT 0x4
294 #define WM8903_OUTPUT_INT 0x2
295 #define WM8903_OUTPUT_IN 0x1
297 static int wm8903_cp_event(struct snd_soc_dapm_widget *w,
298 struct snd_kcontrol *kcontrol, int event)
300 WARN_ON(event != SND_SOC_DAPM_POST_PMU);
307 * Event for headphone and line out amplifier power changes. Special
308 * power up/down sequences are required in order to maximise pop/click
311 static int wm8903_output_event(struct snd_soc_dapm_widget *w,
312 struct snd_kcontrol *kcontrol, int event)
314 struct snd_soc_codec *codec = w->codec;
322 case WM8903_POWER_MANAGEMENT_2:
323 reg = WM8903_ANALOGUE_HP_0;
324 dcs_bit = 0 + w->shift;
326 case WM8903_POWER_MANAGEMENT_3:
327 reg = WM8903_ANALOGUE_LINEOUT_0;
328 dcs_bit = 2 + w->shift;
332 return -EINVAL; /* Spurious warning from some compilers */
344 return -EINVAL; /* Spurious warning from some compilers */
347 if (event & SND_SOC_DAPM_PRE_PMU) {
348 val = snd_soc_read(codec, reg);
350 /* Short the output */
351 val &= ~(WM8903_OUTPUT_SHORT << shift);
352 snd_soc_write(codec, reg, val);
355 if (event & SND_SOC_DAPM_POST_PMU) {
356 val = snd_soc_read(codec, reg);
358 val |= (WM8903_OUTPUT_IN << shift);
359 snd_soc_write(codec, reg, val);
361 val |= (WM8903_OUTPUT_INT << shift);
362 snd_soc_write(codec, reg, val);
364 /* Turn on the output ENA_OUTP */
365 val |= (WM8903_OUTPUT_OUT << shift);
366 snd_soc_write(codec, reg, val);
368 /* Enable the DC servo */
369 dcs_reg = snd_soc_read(codec, WM8903_DC_SERVO_0);
371 snd_soc_write(codec, WM8903_DC_SERVO_0, dcs_reg);
373 /* Remove the short */
374 val |= (WM8903_OUTPUT_SHORT << shift);
375 snd_soc_write(codec, reg, val);
378 if (event & SND_SOC_DAPM_PRE_PMD) {
379 val = snd_soc_read(codec, reg);
381 /* Short the output */
382 val &= ~(WM8903_OUTPUT_SHORT << shift);
383 snd_soc_write(codec, reg, val);
385 /* Disable the DC servo */
386 dcs_reg = snd_soc_read(codec, WM8903_DC_SERVO_0);
388 snd_soc_write(codec, WM8903_DC_SERVO_0, dcs_reg);
390 /* Then disable the intermediate and output stages */
391 val &= ~((WM8903_OUTPUT_OUT | WM8903_OUTPUT_INT |
392 WM8903_OUTPUT_IN) << shift);
393 snd_soc_write(codec, reg, val);
400 * When used with DAC outputs only the WM8903 charge pump supports
401 * operation in class W mode, providing very low power consumption
402 * when used with digital sources. Enable and disable this mode
403 * automatically depending on the mixer configuration.
405 * All the relevant controls are simple switches.
407 static int wm8903_class_w_put(struct snd_kcontrol *kcontrol,
408 struct snd_ctl_elem_value *ucontrol)
410 struct snd_soc_dapm_widget *widget = snd_kcontrol_chip(kcontrol);
411 struct snd_soc_codec *codec = widget->codec;
412 struct wm8903_priv *wm8903 = codec->private_data;
413 struct i2c_client *i2c = codec->control_data;
417 reg = snd_soc_read(codec, WM8903_CLASS_W_0);
419 /* Turn it off if we're about to enable bypass */
420 if (ucontrol->value.integer.value[0]) {
421 if (wm8903->class_w_users == 0) {
422 dev_dbg(&i2c->dev, "Disabling Class W\n");
423 snd_soc_write(codec, WM8903_CLASS_W_0, reg &
424 ~(WM8903_CP_DYN_FREQ | WM8903_CP_DYN_V));
426 wm8903->class_w_users++;
429 /* Implement the change */
430 ret = snd_soc_dapm_put_volsw(kcontrol, ucontrol);
432 /* If we've just disabled the last bypass path turn Class W on */
433 if (!ucontrol->value.integer.value[0]) {
434 if (wm8903->class_w_users == 1) {
435 dev_dbg(&i2c->dev, "Enabling Class W\n");
436 snd_soc_write(codec, WM8903_CLASS_W_0, reg |
437 WM8903_CP_DYN_FREQ | WM8903_CP_DYN_V);
439 wm8903->class_w_users--;
442 dev_dbg(&i2c->dev, "Bypass use count now %d\n",
443 wm8903->class_w_users);
448 #define SOC_DAPM_SINGLE_W(xname, reg, shift, max, invert) \
449 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
450 .info = snd_soc_info_volsw, \
451 .get = snd_soc_dapm_get_volsw, .put = wm8903_class_w_put, \
452 .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert) }
455 /* ALSA can only do steps of .01dB */
456 static const DECLARE_TLV_DB_SCALE(digital_tlv, -7200, 75, 1);
458 static const DECLARE_TLV_DB_SCALE(digital_sidetone_tlv, -3600, 300, 0);
459 static const DECLARE_TLV_DB_SCALE(out_tlv, -5700, 100, 0);
461 static const DECLARE_TLV_DB_SCALE(drc_tlv_thresh, 0, 75, 0);
462 static const DECLARE_TLV_DB_SCALE(drc_tlv_amp, -2250, 75, 0);
463 static const DECLARE_TLV_DB_SCALE(drc_tlv_min, 0, 600, 0);
464 static const DECLARE_TLV_DB_SCALE(drc_tlv_max, 1200, 600, 0);
465 static const DECLARE_TLV_DB_SCALE(drc_tlv_startup, -300, 50, 0);
467 static const char *drc_slope_text[] = {
468 "1", "1/2", "1/4", "1/8", "1/16", "0"
471 static const struct soc_enum drc_slope_r0 =
472 SOC_ENUM_SINGLE(WM8903_DRC_2, 3, 6, drc_slope_text);
474 static const struct soc_enum drc_slope_r1 =
475 SOC_ENUM_SINGLE(WM8903_DRC_2, 0, 6, drc_slope_text);
477 static const char *drc_attack_text[] = {
479 "363us", "762us", "1.45ms", "2.9ms", "5.8ms", "11.6ms", "23.2ms",
480 "46.4ms", "92.8ms", "185.6ms"
483 static const struct soc_enum drc_attack =
484 SOC_ENUM_SINGLE(WM8903_DRC_1, 12, 11, drc_attack_text);
486 static const char *drc_decay_text[] = {
487 "186ms", "372ms", "743ms", "1.49s", "2.97s", "5.94s", "11.89s",
491 static const struct soc_enum drc_decay =
492 SOC_ENUM_SINGLE(WM8903_DRC_1, 8, 9, drc_decay_text);
494 static const char *drc_ff_delay_text[] = {
495 "5 samples", "9 samples"
498 static const struct soc_enum drc_ff_delay =
499 SOC_ENUM_SINGLE(WM8903_DRC_0, 5, 2, drc_ff_delay_text);
501 static const char *drc_qr_decay_text[] = {
502 "0.725ms", "1.45ms", "5.8ms"
505 static const struct soc_enum drc_qr_decay =
506 SOC_ENUM_SINGLE(WM8903_DRC_1, 4, 3, drc_qr_decay_text);
508 static const char *drc_smoothing_text[] = {
509 "Low", "Medium", "High"
512 static const struct soc_enum drc_smoothing =
513 SOC_ENUM_SINGLE(WM8903_DRC_0, 11, 3, drc_smoothing_text);
515 static const char *soft_mute_text[] = {
516 "Fast (fs/2)", "Slow (fs/32)"
519 static const struct soc_enum soft_mute =
520 SOC_ENUM_SINGLE(WM8903_DAC_DIGITAL_1, 10, 2, soft_mute_text);
522 static const char *mute_mode_text[] = {
526 static const struct soc_enum mute_mode =
527 SOC_ENUM_SINGLE(WM8903_DAC_DIGITAL_1, 9, 2, mute_mode_text);
529 static const char *dac_deemphasis_text[] = {
530 "Disabled", "32kHz", "44.1kHz", "48kHz"
533 static const struct soc_enum dac_deemphasis =
534 SOC_ENUM_SINGLE(WM8903_DAC_DIGITAL_1, 1, 4, dac_deemphasis_text);
536 static const char *companding_text[] = {
540 static const struct soc_enum dac_companding =
541 SOC_ENUM_SINGLE(WM8903_AUDIO_INTERFACE_0, 0, 2, companding_text);
543 static const struct soc_enum adc_companding =
544 SOC_ENUM_SINGLE(WM8903_AUDIO_INTERFACE_0, 2, 2, companding_text);
546 static const char *input_mode_text[] = {
547 "Single-Ended", "Differential Line", "Differential Mic"
550 static const struct soc_enum linput_mode_enum =
551 SOC_ENUM_SINGLE(WM8903_ANALOGUE_LEFT_INPUT_1, 0, 3, input_mode_text);
553 static const struct soc_enum rinput_mode_enum =
554 SOC_ENUM_SINGLE(WM8903_ANALOGUE_RIGHT_INPUT_1, 0, 3, input_mode_text);
556 static const char *linput_mux_text[] = {
557 "IN1L", "IN2L", "IN3L"
560 static const struct soc_enum linput_enum =
561 SOC_ENUM_SINGLE(WM8903_ANALOGUE_LEFT_INPUT_1, 2, 3, linput_mux_text);
563 static const struct soc_enum linput_inv_enum =
564 SOC_ENUM_SINGLE(WM8903_ANALOGUE_LEFT_INPUT_1, 4, 3, linput_mux_text);
566 static const char *rinput_mux_text[] = {
567 "IN1R", "IN2R", "IN3R"
570 static const struct soc_enum rinput_enum =
571 SOC_ENUM_SINGLE(WM8903_ANALOGUE_RIGHT_INPUT_1, 2, 3, rinput_mux_text);
573 static const struct soc_enum rinput_inv_enum =
574 SOC_ENUM_SINGLE(WM8903_ANALOGUE_RIGHT_INPUT_1, 4, 3, rinput_mux_text);
577 static const char *sidetone_text[] = {
578 "None", "Left", "Right"
581 static const struct soc_enum lsidetone_enum =
582 SOC_ENUM_SINGLE(WM8903_DAC_DIGITAL_0, 2, 3, sidetone_text);
584 static const struct soc_enum rsidetone_enum =
585 SOC_ENUM_SINGLE(WM8903_DAC_DIGITAL_0, 0, 3, sidetone_text);
587 static const struct snd_kcontrol_new wm8903_snd_controls[] = {
589 /* Input PGAs - No TLV since the scale depends on PGA mode */
590 SOC_SINGLE("Left Input PGA Switch", WM8903_ANALOGUE_LEFT_INPUT_0,
592 SOC_SINGLE("Left Input PGA Volume", WM8903_ANALOGUE_LEFT_INPUT_0,
594 SOC_SINGLE("Left Input PGA Common Mode Switch", WM8903_ANALOGUE_LEFT_INPUT_1,
597 SOC_SINGLE("Right Input PGA Switch", WM8903_ANALOGUE_RIGHT_INPUT_0,
599 SOC_SINGLE("Right Input PGA Volume", WM8903_ANALOGUE_RIGHT_INPUT_0,
601 SOC_SINGLE("Right Input PGA Common Mode Switch", WM8903_ANALOGUE_RIGHT_INPUT_1,
605 SOC_SINGLE("DRC Switch", WM8903_DRC_0, 15, 1, 0),
606 SOC_ENUM("DRC Compressor Slope R0", drc_slope_r0),
607 SOC_ENUM("DRC Compressor Slope R1", drc_slope_r1),
608 SOC_SINGLE_TLV("DRC Compressor Threshold Volume", WM8903_DRC_3, 5, 124, 1,
610 SOC_SINGLE_TLV("DRC Volume", WM8903_DRC_3, 0, 30, 1, drc_tlv_amp),
611 SOC_SINGLE_TLV("DRC Minimum Gain Volume", WM8903_DRC_1, 2, 3, 1, drc_tlv_min),
612 SOC_SINGLE_TLV("DRC Maximum Gain Volume", WM8903_DRC_1, 0, 3, 0, drc_tlv_max),
613 SOC_ENUM("DRC Attack Rate", drc_attack),
614 SOC_ENUM("DRC Decay Rate", drc_decay),
615 SOC_ENUM("DRC FF Delay", drc_ff_delay),
616 SOC_SINGLE("DRC Anticlip Switch", WM8903_DRC_0, 1, 1, 0),
617 SOC_SINGLE("DRC QR Switch", WM8903_DRC_0, 2, 1, 0),
618 SOC_SINGLE_TLV("DRC QR Threshold Volume", WM8903_DRC_0, 6, 3, 0, drc_tlv_max),
619 SOC_ENUM("DRC QR Decay Rate", drc_qr_decay),
620 SOC_SINGLE("DRC Smoothing Switch", WM8903_DRC_0, 3, 1, 0),
621 SOC_SINGLE("DRC Smoothing Hysteresis Switch", WM8903_DRC_0, 0, 1, 0),
622 SOC_ENUM("DRC Smoothing Threshold", drc_smoothing),
623 SOC_SINGLE_TLV("DRC Startup Volume", WM8903_DRC_0, 6, 18, 0, drc_tlv_startup),
625 SOC_DOUBLE_R_TLV("Digital Capture Volume", WM8903_ADC_DIGITAL_VOLUME_LEFT,
626 WM8903_ADC_DIGITAL_VOLUME_RIGHT, 1, 96, 0, digital_tlv),
627 SOC_ENUM("ADC Companding Mode", adc_companding),
628 SOC_SINGLE("ADC Companding Switch", WM8903_AUDIO_INTERFACE_0, 3, 1, 0),
630 SOC_DOUBLE_TLV("Digital Sidetone Volume", WM8903_DAC_DIGITAL_0, 4, 8,
631 12, 0, digital_sidetone_tlv),
634 SOC_DOUBLE_R_TLV("Digital Playback Volume", WM8903_DAC_DIGITAL_VOLUME_LEFT,
635 WM8903_DAC_DIGITAL_VOLUME_RIGHT, 1, 120, 0, digital_tlv),
636 SOC_ENUM("DAC Soft Mute Rate", soft_mute),
637 SOC_ENUM("DAC Mute Mode", mute_mode),
638 SOC_SINGLE("DAC Mono Switch", WM8903_DAC_DIGITAL_1, 12, 1, 0),
639 SOC_ENUM("DAC De-emphasis", dac_deemphasis),
640 SOC_ENUM("DAC Companding Mode", dac_companding),
641 SOC_SINGLE("DAC Companding Switch", WM8903_AUDIO_INTERFACE_0, 1, 1, 0),
644 SOC_DOUBLE_R("Headphone Switch",
645 WM8903_ANALOGUE_OUT1_LEFT, WM8903_ANALOGUE_OUT1_RIGHT,
647 SOC_DOUBLE_R("Headphone ZC Switch",
648 WM8903_ANALOGUE_OUT1_LEFT, WM8903_ANALOGUE_OUT1_RIGHT,
650 SOC_DOUBLE_R_TLV("Headphone Volume",
651 WM8903_ANALOGUE_OUT1_LEFT, WM8903_ANALOGUE_OUT1_RIGHT,
655 SOC_DOUBLE_R("Line Out Switch",
656 WM8903_ANALOGUE_OUT2_LEFT, WM8903_ANALOGUE_OUT2_RIGHT,
658 SOC_DOUBLE_R("Line Out ZC Switch",
659 WM8903_ANALOGUE_OUT2_LEFT, WM8903_ANALOGUE_OUT2_RIGHT,
661 SOC_DOUBLE_R_TLV("Line Out Volume",
662 WM8903_ANALOGUE_OUT2_LEFT, WM8903_ANALOGUE_OUT2_RIGHT,
666 SOC_DOUBLE_R("Speaker Switch",
667 WM8903_ANALOGUE_OUT3_LEFT, WM8903_ANALOGUE_OUT3_RIGHT, 8, 1, 1),
668 SOC_DOUBLE_R("Speaker ZC Switch",
669 WM8903_ANALOGUE_OUT3_LEFT, WM8903_ANALOGUE_OUT3_RIGHT, 6, 1, 0),
670 SOC_DOUBLE_R_TLV("Speaker Volume",
671 WM8903_ANALOGUE_OUT3_LEFT, WM8903_ANALOGUE_OUT3_RIGHT,
675 static const struct snd_kcontrol_new linput_mode_mux =
676 SOC_DAPM_ENUM("Left Input Mode Mux", linput_mode_enum);
678 static const struct snd_kcontrol_new rinput_mode_mux =
679 SOC_DAPM_ENUM("Right Input Mode Mux", rinput_mode_enum);
681 static const struct snd_kcontrol_new linput_mux =
682 SOC_DAPM_ENUM("Left Input Mux", linput_enum);
684 static const struct snd_kcontrol_new linput_inv_mux =
685 SOC_DAPM_ENUM("Left Inverting Input Mux", linput_inv_enum);
687 static const struct snd_kcontrol_new rinput_mux =
688 SOC_DAPM_ENUM("Right Input Mux", rinput_enum);
690 static const struct snd_kcontrol_new rinput_inv_mux =
691 SOC_DAPM_ENUM("Right Inverting Input Mux", rinput_inv_enum);
693 static const struct snd_kcontrol_new lsidetone_mux =
694 SOC_DAPM_ENUM("DACL Sidetone Mux", lsidetone_enum);
696 static const struct snd_kcontrol_new rsidetone_mux =
697 SOC_DAPM_ENUM("DACR Sidetone Mux", rsidetone_enum);
699 static const struct snd_kcontrol_new left_output_mixer[] = {
700 SOC_DAPM_SINGLE("DACL Switch", WM8903_ANALOGUE_LEFT_MIX_0, 3, 1, 0),
701 SOC_DAPM_SINGLE("DACR Switch", WM8903_ANALOGUE_LEFT_MIX_0, 2, 1, 0),
702 SOC_DAPM_SINGLE_W("Left Bypass Switch", WM8903_ANALOGUE_LEFT_MIX_0, 1, 1, 0),
703 SOC_DAPM_SINGLE_W("Right Bypass Switch", WM8903_ANALOGUE_LEFT_MIX_0, 0, 1, 0),
706 static const struct snd_kcontrol_new right_output_mixer[] = {
707 SOC_DAPM_SINGLE("DACL Switch", WM8903_ANALOGUE_RIGHT_MIX_0, 3, 1, 0),
708 SOC_DAPM_SINGLE("DACR Switch", WM8903_ANALOGUE_RIGHT_MIX_0, 2, 1, 0),
709 SOC_DAPM_SINGLE_W("Left Bypass Switch", WM8903_ANALOGUE_RIGHT_MIX_0, 1, 1, 0),
710 SOC_DAPM_SINGLE_W("Right Bypass Switch", WM8903_ANALOGUE_RIGHT_MIX_0, 0, 1, 0),
713 static const struct snd_kcontrol_new left_speaker_mixer[] = {
714 SOC_DAPM_SINGLE("DACL Switch", WM8903_ANALOGUE_SPK_MIX_LEFT_0, 3, 1, 0),
715 SOC_DAPM_SINGLE("DACR Switch", WM8903_ANALOGUE_SPK_MIX_LEFT_0, 2, 1, 0),
716 SOC_DAPM_SINGLE("Left Bypass Switch", WM8903_ANALOGUE_SPK_MIX_LEFT_0, 1, 1, 0),
717 SOC_DAPM_SINGLE("Right Bypass Switch", WM8903_ANALOGUE_SPK_MIX_LEFT_0,
721 static const struct snd_kcontrol_new right_speaker_mixer[] = {
722 SOC_DAPM_SINGLE("DACL Switch", WM8903_ANALOGUE_SPK_MIX_RIGHT_0, 3, 1, 0),
723 SOC_DAPM_SINGLE("DACR Switch", WM8903_ANALOGUE_SPK_MIX_RIGHT_0, 2, 1, 0),
724 SOC_DAPM_SINGLE("Left Bypass Switch", WM8903_ANALOGUE_SPK_MIX_RIGHT_0,
726 SOC_DAPM_SINGLE("Right Bypass Switch", WM8903_ANALOGUE_SPK_MIX_RIGHT_0,
730 static const struct snd_soc_dapm_widget wm8903_dapm_widgets[] = {
731 SND_SOC_DAPM_INPUT("IN1L"),
732 SND_SOC_DAPM_INPUT("IN1R"),
733 SND_SOC_DAPM_INPUT("IN2L"),
734 SND_SOC_DAPM_INPUT("IN2R"),
735 SND_SOC_DAPM_INPUT("IN3L"),
736 SND_SOC_DAPM_INPUT("IN3R"),
738 SND_SOC_DAPM_OUTPUT("HPOUTL"),
739 SND_SOC_DAPM_OUTPUT("HPOUTR"),
740 SND_SOC_DAPM_OUTPUT("LINEOUTL"),
741 SND_SOC_DAPM_OUTPUT("LINEOUTR"),
742 SND_SOC_DAPM_OUTPUT("LOP"),
743 SND_SOC_DAPM_OUTPUT("LON"),
744 SND_SOC_DAPM_OUTPUT("ROP"),
745 SND_SOC_DAPM_OUTPUT("RON"),
747 SND_SOC_DAPM_MICBIAS("Mic Bias", WM8903_MIC_BIAS_CONTROL_0, 0, 0),
749 SND_SOC_DAPM_MUX("Left Input Mux", SND_SOC_NOPM, 0, 0, &linput_mux),
750 SND_SOC_DAPM_MUX("Left Input Inverting Mux", SND_SOC_NOPM, 0, 0,
752 SND_SOC_DAPM_MUX("Left Input Mode Mux", SND_SOC_NOPM, 0, 0, &linput_mode_mux),
754 SND_SOC_DAPM_MUX("Right Input Mux", SND_SOC_NOPM, 0, 0, &rinput_mux),
755 SND_SOC_DAPM_MUX("Right Input Inverting Mux", SND_SOC_NOPM, 0, 0,
757 SND_SOC_DAPM_MUX("Right Input Mode Mux", SND_SOC_NOPM, 0, 0, &rinput_mode_mux),
759 SND_SOC_DAPM_PGA("Left Input PGA", WM8903_POWER_MANAGEMENT_0, 1, 0, NULL, 0),
760 SND_SOC_DAPM_PGA("Right Input PGA", WM8903_POWER_MANAGEMENT_0, 0, 0, NULL, 0),
762 SND_SOC_DAPM_ADC("ADCL", "Left HiFi Capture", WM8903_POWER_MANAGEMENT_6, 1, 0),
763 SND_SOC_DAPM_ADC("ADCR", "Right HiFi Capture", WM8903_POWER_MANAGEMENT_6, 0, 0),
765 SND_SOC_DAPM_MUX("DACL Sidetone", SND_SOC_NOPM, 0, 0, &lsidetone_mux),
766 SND_SOC_DAPM_MUX("DACR Sidetone", SND_SOC_NOPM, 0, 0, &rsidetone_mux),
768 SND_SOC_DAPM_DAC("DACL", "Left Playback", WM8903_POWER_MANAGEMENT_6, 3, 0),
769 SND_SOC_DAPM_DAC("DACR", "Right Playback", WM8903_POWER_MANAGEMENT_6, 2, 0),
771 SND_SOC_DAPM_MIXER("Left Output Mixer", WM8903_POWER_MANAGEMENT_1, 1, 0,
772 left_output_mixer, ARRAY_SIZE(left_output_mixer)),
773 SND_SOC_DAPM_MIXER("Right Output Mixer", WM8903_POWER_MANAGEMENT_1, 0, 0,
774 right_output_mixer, ARRAY_SIZE(right_output_mixer)),
776 SND_SOC_DAPM_MIXER("Left Speaker Mixer", WM8903_POWER_MANAGEMENT_4, 1, 0,
777 left_speaker_mixer, ARRAY_SIZE(left_speaker_mixer)),
778 SND_SOC_DAPM_MIXER("Right Speaker Mixer", WM8903_POWER_MANAGEMENT_4, 0, 0,
779 right_speaker_mixer, ARRAY_SIZE(right_speaker_mixer)),
781 SND_SOC_DAPM_PGA_E("Left Headphone Output PGA", WM8903_POWER_MANAGEMENT_2,
782 1, 0, NULL, 0, wm8903_output_event,
783 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
784 SND_SOC_DAPM_PRE_PMD),
785 SND_SOC_DAPM_PGA_E("Right Headphone Output PGA", WM8903_POWER_MANAGEMENT_2,
786 0, 0, NULL, 0, wm8903_output_event,
787 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
788 SND_SOC_DAPM_PRE_PMD),
790 SND_SOC_DAPM_PGA_E("Left Line Output PGA", WM8903_POWER_MANAGEMENT_3, 1, 0,
791 NULL, 0, wm8903_output_event,
792 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
793 SND_SOC_DAPM_PRE_PMD),
794 SND_SOC_DAPM_PGA_E("Right Line Output PGA", WM8903_POWER_MANAGEMENT_3, 0, 0,
795 NULL, 0, wm8903_output_event,
796 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
797 SND_SOC_DAPM_PRE_PMD),
799 SND_SOC_DAPM_PGA("Left Speaker PGA", WM8903_POWER_MANAGEMENT_5, 1, 0,
801 SND_SOC_DAPM_PGA("Right Speaker PGA", WM8903_POWER_MANAGEMENT_5, 0, 0,
804 SND_SOC_DAPM_SUPPLY("Charge Pump", WM8903_CHARGE_PUMP_0, 0, 0,
805 wm8903_cp_event, SND_SOC_DAPM_POST_PMU),
806 SND_SOC_DAPM_SUPPLY("CLK_DSP", WM8903_CLOCK_RATES_2, 1, 0, NULL, 0),
809 static const struct snd_soc_dapm_route intercon[] = {
811 { "Left Input Mux", "IN1L", "IN1L" },
812 { "Left Input Mux", "IN2L", "IN2L" },
813 { "Left Input Mux", "IN3L", "IN3L" },
815 { "Left Input Inverting Mux", "IN1L", "IN1L" },
816 { "Left Input Inverting Mux", "IN2L", "IN2L" },
817 { "Left Input Inverting Mux", "IN3L", "IN3L" },
819 { "Right Input Mux", "IN1R", "IN1R" },
820 { "Right Input Mux", "IN2R", "IN2R" },
821 { "Right Input Mux", "IN3R", "IN3R" },
823 { "Right Input Inverting Mux", "IN1R", "IN1R" },
824 { "Right Input Inverting Mux", "IN2R", "IN2R" },
825 { "Right Input Inverting Mux", "IN3R", "IN3R" },
827 { "Left Input Mode Mux", "Single-Ended", "Left Input Inverting Mux" },
828 { "Left Input Mode Mux", "Differential Line",
830 { "Left Input Mode Mux", "Differential Line",
831 "Left Input Inverting Mux" },
832 { "Left Input Mode Mux", "Differential Mic",
834 { "Left Input Mode Mux", "Differential Mic",
835 "Left Input Inverting Mux" },
837 { "Right Input Mode Mux", "Single-Ended",
838 "Right Input Inverting Mux" },
839 { "Right Input Mode Mux", "Differential Line",
841 { "Right Input Mode Mux", "Differential Line",
842 "Right Input Inverting Mux" },
843 { "Right Input Mode Mux", "Differential Mic",
845 { "Right Input Mode Mux", "Differential Mic",
846 "Right Input Inverting Mux" },
848 { "Left Input PGA", NULL, "Left Input Mode Mux" },
849 { "Right Input PGA", NULL, "Right Input Mode Mux" },
851 { "ADCL", NULL, "Left Input PGA" },
852 { "ADCL", NULL, "CLK_DSP" },
853 { "ADCR", NULL, "Right Input PGA" },
854 { "ADCR", NULL, "CLK_DSP" },
856 { "DACL Sidetone", "Left", "ADCL" },
857 { "DACL Sidetone", "Right", "ADCR" },
858 { "DACR Sidetone", "Left", "ADCL" },
859 { "DACR Sidetone", "Right", "ADCR" },
861 { "DACL", NULL, "DACL Sidetone" },
862 { "DACL", NULL, "CLK_DSP" },
863 { "DACR", NULL, "DACR Sidetone" },
864 { "DACR", NULL, "CLK_DSP" },
866 { "Left Output Mixer", "Left Bypass Switch", "Left Input PGA" },
867 { "Left Output Mixer", "Right Bypass Switch", "Right Input PGA" },
868 { "Left Output Mixer", "DACL Switch", "DACL" },
869 { "Left Output Mixer", "DACR Switch", "DACR" },
871 { "Right Output Mixer", "Left Bypass Switch", "Left Input PGA" },
872 { "Right Output Mixer", "Right Bypass Switch", "Right Input PGA" },
873 { "Right Output Mixer", "DACL Switch", "DACL" },
874 { "Right Output Mixer", "DACR Switch", "DACR" },
876 { "Left Speaker Mixer", "Left Bypass Switch", "Left Input PGA" },
877 { "Left Speaker Mixer", "Right Bypass Switch", "Right Input PGA" },
878 { "Left Speaker Mixer", "DACL Switch", "DACL" },
879 { "Left Speaker Mixer", "DACR Switch", "DACR" },
881 { "Right Speaker Mixer", "Left Bypass Switch", "Left Input PGA" },
882 { "Right Speaker Mixer", "Right Bypass Switch", "Right Input PGA" },
883 { "Right Speaker Mixer", "DACL Switch", "DACL" },
884 { "Right Speaker Mixer", "DACR Switch", "DACR" },
886 { "Left Line Output PGA", NULL, "Left Output Mixer" },
887 { "Right Line Output PGA", NULL, "Right Output Mixer" },
889 { "Left Headphone Output PGA", NULL, "Left Output Mixer" },
890 { "Right Headphone Output PGA", NULL, "Right Output Mixer" },
892 { "Left Speaker PGA", NULL, "Left Speaker Mixer" },
893 { "Right Speaker PGA", NULL, "Right Speaker Mixer" },
895 { "HPOUTL", NULL, "Left Headphone Output PGA" },
896 { "HPOUTR", NULL, "Right Headphone Output PGA" },
898 { "LINEOUTL", NULL, "Left Line Output PGA" },
899 { "LINEOUTR", NULL, "Right Line Output PGA" },
901 { "LOP", NULL, "Left Speaker PGA" },
902 { "LON", NULL, "Left Speaker PGA" },
904 { "ROP", NULL, "Right Speaker PGA" },
905 { "RON", NULL, "Right Speaker PGA" },
907 { "Left Headphone Output PGA", NULL, "Charge Pump" },
908 { "Right Headphone Output PGA", NULL, "Charge Pump" },
909 { "Left Line Output PGA", NULL, "Charge Pump" },
910 { "Right Line Output PGA", NULL, "Charge Pump" },
913 static int wm8903_add_widgets(struct snd_soc_codec *codec)
915 snd_soc_dapm_new_controls(codec, wm8903_dapm_widgets,
916 ARRAY_SIZE(wm8903_dapm_widgets));
918 snd_soc_dapm_add_routes(codec, intercon, ARRAY_SIZE(intercon));
923 static int wm8903_set_bias_level(struct snd_soc_codec *codec,
924 enum snd_soc_bias_level level)
926 struct i2c_client *i2c = codec->control_data;
930 case SND_SOC_BIAS_ON:
931 case SND_SOC_BIAS_PREPARE:
932 reg = snd_soc_read(codec, WM8903_VMID_CONTROL_0);
933 reg &= ~(WM8903_VMID_RES_MASK);
934 reg |= WM8903_VMID_RES_50K;
935 snd_soc_write(codec, WM8903_VMID_CONTROL_0, reg);
938 case SND_SOC_BIAS_STANDBY:
939 if (codec->bias_level == SND_SOC_BIAS_OFF) {
940 snd_soc_write(codec, WM8903_CLOCK_RATES_2,
943 /* Change DC servo dither level in startup sequence */
944 snd_soc_write(codec, WM8903_WRITE_SEQUENCER_0, 0x11);
945 snd_soc_write(codec, WM8903_WRITE_SEQUENCER_1, 0x1257);
946 snd_soc_write(codec, WM8903_WRITE_SEQUENCER_2, 0x2);
948 wm8903_run_sequence(codec, 0);
949 wm8903_sync_reg_cache(codec, codec->reg_cache);
951 /* Enable low impedence charge pump output */
952 reg = snd_soc_read(codec,
953 WM8903_CONTROL_INTERFACE_TEST_1);
954 snd_soc_write(codec, WM8903_CONTROL_INTERFACE_TEST_1,
955 reg | WM8903_TEST_KEY);
956 reg2 = snd_soc_read(codec, WM8903_CHARGE_PUMP_TEST_1);
957 snd_soc_write(codec, WM8903_CHARGE_PUMP_TEST_1,
958 reg2 | WM8903_CP_SW_KELVIN_MODE_MASK);
959 snd_soc_write(codec, WM8903_CONTROL_INTERFACE_TEST_1,
962 /* By default no bypass paths are enabled so
963 * enable Class W support.
965 dev_dbg(&i2c->dev, "Enabling Class W\n");
966 snd_soc_write(codec, WM8903_CLASS_W_0, reg |
967 WM8903_CP_DYN_FREQ | WM8903_CP_DYN_V);
970 reg = snd_soc_read(codec, WM8903_VMID_CONTROL_0);
971 reg &= ~(WM8903_VMID_RES_MASK);
972 reg |= WM8903_VMID_RES_250K;
973 snd_soc_write(codec, WM8903_VMID_CONTROL_0, reg);
976 case SND_SOC_BIAS_OFF:
977 wm8903_run_sequence(codec, 32);
978 reg = snd_soc_read(codec, WM8903_CLOCK_RATES_2);
979 reg &= ~WM8903_CLK_SYS_ENA;
980 snd_soc_write(codec, WM8903_CLOCK_RATES_2, reg);
984 codec->bias_level = level;
989 static int wm8903_set_dai_sysclk(struct snd_soc_dai *codec_dai,
990 int clk_id, unsigned int freq, int dir)
992 struct snd_soc_codec *codec = codec_dai->codec;
993 struct wm8903_priv *wm8903 = codec->private_data;
995 wm8903->sysclk = freq;
1000 static int wm8903_set_dai_fmt(struct snd_soc_dai *codec_dai,
1003 struct snd_soc_codec *codec = codec_dai->codec;
1004 u16 aif1 = snd_soc_read(codec, WM8903_AUDIO_INTERFACE_1);
1006 aif1 &= ~(WM8903_LRCLK_DIR | WM8903_BCLK_DIR | WM8903_AIF_FMT_MASK |
1007 WM8903_AIF_LRCLK_INV | WM8903_AIF_BCLK_INV);
1009 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1010 case SND_SOC_DAIFMT_CBS_CFS:
1012 case SND_SOC_DAIFMT_CBS_CFM:
1013 aif1 |= WM8903_LRCLK_DIR;
1015 case SND_SOC_DAIFMT_CBM_CFM:
1016 aif1 |= WM8903_LRCLK_DIR | WM8903_BCLK_DIR;
1018 case SND_SOC_DAIFMT_CBM_CFS:
1019 aif1 |= WM8903_BCLK_DIR;
1025 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1026 case SND_SOC_DAIFMT_DSP_A:
1029 case SND_SOC_DAIFMT_DSP_B:
1030 aif1 |= 0x3 | WM8903_AIF_LRCLK_INV;
1032 case SND_SOC_DAIFMT_I2S:
1035 case SND_SOC_DAIFMT_RIGHT_J:
1038 case SND_SOC_DAIFMT_LEFT_J:
1044 /* Clock inversion */
1045 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1046 case SND_SOC_DAIFMT_DSP_A:
1047 case SND_SOC_DAIFMT_DSP_B:
1048 /* frame inversion not valid for DSP modes */
1049 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1050 case SND_SOC_DAIFMT_NB_NF:
1052 case SND_SOC_DAIFMT_IB_NF:
1053 aif1 |= WM8903_AIF_BCLK_INV;
1059 case SND_SOC_DAIFMT_I2S:
1060 case SND_SOC_DAIFMT_RIGHT_J:
1061 case SND_SOC_DAIFMT_LEFT_J:
1062 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1063 case SND_SOC_DAIFMT_NB_NF:
1065 case SND_SOC_DAIFMT_IB_IF:
1066 aif1 |= WM8903_AIF_BCLK_INV | WM8903_AIF_LRCLK_INV;
1068 case SND_SOC_DAIFMT_IB_NF:
1069 aif1 |= WM8903_AIF_BCLK_INV;
1071 case SND_SOC_DAIFMT_NB_IF:
1072 aif1 |= WM8903_AIF_LRCLK_INV;
1082 snd_soc_write(codec, WM8903_AUDIO_INTERFACE_1, aif1);
1087 static int wm8903_digital_mute(struct snd_soc_dai *codec_dai, int mute)
1089 struct snd_soc_codec *codec = codec_dai->codec;
1092 reg = snd_soc_read(codec, WM8903_DAC_DIGITAL_1);
1095 reg |= WM8903_DAC_MUTE;
1097 reg &= ~WM8903_DAC_MUTE;
1099 snd_soc_write(codec, WM8903_DAC_DIGITAL_1, reg);
1104 /* Lookup table for CLK_SYS/fs ratio. 256fs or more is recommended
1105 * for optimal performance so we list the lower rates first and match
1106 * on the last match we find. */
1112 } clk_sys_ratios[] = {
1113 { 64, 0x0, 0x0, 1 },
1114 { 68, 0x0, 0x1, 1 },
1115 { 125, 0x0, 0x2, 1 },
1116 { 128, 0x1, 0x0, 1 },
1117 { 136, 0x1, 0x1, 1 },
1118 { 192, 0x2, 0x0, 1 },
1119 { 204, 0x2, 0x1, 1 },
1121 { 64, 0x0, 0x0, 2 },
1122 { 68, 0x0, 0x1, 2 },
1123 { 125, 0x0, 0x2, 2 },
1124 { 128, 0x1, 0x0, 2 },
1125 { 136, 0x1, 0x1, 2 },
1126 { 192, 0x2, 0x0, 2 },
1127 { 204, 0x2, 0x1, 2 },
1129 { 250, 0x2, 0x2, 1 },
1130 { 256, 0x3, 0x0, 1 },
1131 { 272, 0x3, 0x1, 1 },
1132 { 384, 0x4, 0x0, 1 },
1133 { 408, 0x4, 0x1, 1 },
1134 { 375, 0x4, 0x2, 1 },
1135 { 512, 0x5, 0x0, 1 },
1136 { 544, 0x5, 0x1, 1 },
1137 { 500, 0x5, 0x2, 1 },
1138 { 768, 0x6, 0x0, 1 },
1139 { 816, 0x6, 0x1, 1 },
1140 { 750, 0x6, 0x2, 1 },
1141 { 1024, 0x7, 0x0, 1 },
1142 { 1088, 0x7, 0x1, 1 },
1143 { 1000, 0x7, 0x2, 1 },
1144 { 1408, 0x8, 0x0, 1 },
1145 { 1496, 0x8, 0x1, 1 },
1146 { 1536, 0x9, 0x0, 1 },
1147 { 1632, 0x9, 0x1, 1 },
1148 { 1500, 0x9, 0x2, 1 },
1150 { 250, 0x2, 0x2, 2 },
1151 { 256, 0x3, 0x0, 2 },
1152 { 272, 0x3, 0x1, 2 },
1153 { 384, 0x4, 0x0, 2 },
1154 { 408, 0x4, 0x1, 2 },
1155 { 375, 0x4, 0x2, 2 },
1156 { 512, 0x5, 0x0, 2 },
1157 { 544, 0x5, 0x1, 2 },
1158 { 500, 0x5, 0x2, 2 },
1159 { 768, 0x6, 0x0, 2 },
1160 { 816, 0x6, 0x1, 2 },
1161 { 750, 0x6, 0x2, 2 },
1162 { 1024, 0x7, 0x0, 2 },
1163 { 1088, 0x7, 0x1, 2 },
1164 { 1000, 0x7, 0x2, 2 },
1165 { 1408, 0x8, 0x0, 2 },
1166 { 1496, 0x8, 0x1, 2 },
1167 { 1536, 0x9, 0x0, 2 },
1168 { 1632, 0x9, 0x1, 2 },
1169 { 1500, 0x9, 0x2, 2 },
1172 /* CLK_SYS/BCLK ratios - multiplied by 10 due to .5s */
1196 /* Sample rates for DSP */
1200 } sample_rates[] = {
1215 static int wm8903_startup(struct snd_pcm_substream *substream,
1216 struct snd_soc_dai *dai)
1218 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1219 struct snd_soc_device *socdev = rtd->socdev;
1220 struct snd_soc_codec *codec = socdev->card->codec;
1221 struct wm8903_priv *wm8903 = codec->private_data;
1222 struct i2c_client *i2c = codec->control_data;
1223 struct snd_pcm_runtime *master_runtime;
1225 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
1226 wm8903->playback_active++;
1228 wm8903->capture_active++;
1230 /* The DAI has shared clocks so if we already have a playback or
1231 * capture going then constrain this substream to match it.
1233 if (wm8903->master_substream) {
1234 master_runtime = wm8903->master_substream->runtime;
1236 dev_dbg(&i2c->dev, "Constraining to %d bits\n",
1237 master_runtime->sample_bits);
1239 snd_pcm_hw_constraint_minmax(substream->runtime,
1240 SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
1241 master_runtime->sample_bits,
1242 master_runtime->sample_bits);
1244 wm8903->slave_substream = substream;
1246 wm8903->master_substream = substream;
1251 static void wm8903_shutdown(struct snd_pcm_substream *substream,
1252 struct snd_soc_dai *dai)
1254 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1255 struct snd_soc_device *socdev = rtd->socdev;
1256 struct snd_soc_codec *codec = socdev->card->codec;
1257 struct wm8903_priv *wm8903 = codec->private_data;
1259 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
1260 wm8903->playback_active--;
1262 wm8903->capture_active--;
1264 if (wm8903->master_substream == substream)
1265 wm8903->master_substream = wm8903->slave_substream;
1267 wm8903->slave_substream = NULL;
1270 static int wm8903_hw_params(struct snd_pcm_substream *substream,
1271 struct snd_pcm_hw_params *params,
1272 struct snd_soc_dai *dai)
1274 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1275 struct snd_soc_device *socdev = rtd->socdev;
1276 struct snd_soc_codec *codec = socdev->card->codec;
1277 struct wm8903_priv *wm8903 = codec->private_data;
1278 struct i2c_client *i2c = codec->control_data;
1279 int fs = params_rate(params);
1289 u16 aif1 = snd_soc_read(codec, WM8903_AUDIO_INTERFACE_1);
1290 u16 aif2 = snd_soc_read(codec, WM8903_AUDIO_INTERFACE_2);
1291 u16 aif3 = snd_soc_read(codec, WM8903_AUDIO_INTERFACE_3);
1292 u16 clock0 = snd_soc_read(codec, WM8903_CLOCK_RATES_0);
1293 u16 clock1 = snd_soc_read(codec, WM8903_CLOCK_RATES_1);
1294 u16 dac_digital1 = snd_soc_read(codec, WM8903_DAC_DIGITAL_1);
1296 if (substream == wm8903->slave_substream) {
1297 dev_dbg(&i2c->dev, "Ignoring hw_params for slave substream\n");
1301 /* Enable sloping stopband filter for low sample rates */
1303 dac_digital1 |= WM8903_DAC_SB_FILT;
1305 dac_digital1 &= ~WM8903_DAC_SB_FILT;
1307 /* Configure sample rate logic for DSP - choose nearest rate */
1309 best_val = abs(sample_rates[dsp_config].rate - fs);
1310 for (i = 1; i < ARRAY_SIZE(sample_rates); i++) {
1311 cur_val = abs(sample_rates[i].rate - fs);
1312 if (cur_val <= best_val) {
1318 /* Constraints should stop us hitting this but let's make sure */
1319 if (wm8903->capture_active)
1320 switch (sample_rates[dsp_config].rate) {
1323 dev_err(&i2c->dev, "%dHz unsupported by ADC\n",
1331 dev_dbg(&i2c->dev, "DSP fs = %dHz\n", sample_rates[dsp_config].rate);
1332 clock1 &= ~WM8903_SAMPLE_RATE_MASK;
1333 clock1 |= sample_rates[dsp_config].value;
1335 aif1 &= ~WM8903_AIF_WL_MASK;
1337 switch (params_format(params)) {
1338 case SNDRV_PCM_FORMAT_S16_LE:
1341 case SNDRV_PCM_FORMAT_S20_3LE:
1345 case SNDRV_PCM_FORMAT_S24_LE:
1349 case SNDRV_PCM_FORMAT_S32_LE:
1357 dev_dbg(&i2c->dev, "MCLK = %dHz, target sample rate = %dHz\n",
1358 wm8903->sysclk, fs);
1360 /* We may not have an MCLK which allows us to generate exactly
1361 * the clock we want, particularly with USB derived inputs, so
1365 best_val = abs((wm8903->sysclk /
1366 (clk_sys_ratios[0].mclk_div *
1367 clk_sys_ratios[0].div)) - fs);
1368 for (i = 1; i < ARRAY_SIZE(clk_sys_ratios); i++) {
1369 cur_val = abs((wm8903->sysclk /
1370 (clk_sys_ratios[i].mclk_div *
1371 clk_sys_ratios[i].div)) - fs);
1373 if (cur_val <= best_val) {
1379 if (clk_sys_ratios[clk_config].mclk_div == 2) {
1380 clock0 |= WM8903_MCLKDIV2;
1381 clk_sys = wm8903->sysclk / 2;
1383 clock0 &= ~WM8903_MCLKDIV2;
1384 clk_sys = wm8903->sysclk;
1387 clock1 &= ~(WM8903_CLK_SYS_RATE_MASK |
1388 WM8903_CLK_SYS_MODE_MASK);
1389 clock1 |= clk_sys_ratios[clk_config].rate << WM8903_CLK_SYS_RATE_SHIFT;
1390 clock1 |= clk_sys_ratios[clk_config].mode << WM8903_CLK_SYS_MODE_SHIFT;
1392 dev_dbg(&i2c->dev, "CLK_SYS_RATE=%x, CLK_SYS_MODE=%x div=%d\n",
1393 clk_sys_ratios[clk_config].rate,
1394 clk_sys_ratios[clk_config].mode,
1395 clk_sys_ratios[clk_config].div);
1397 dev_dbg(&i2c->dev, "Actual CLK_SYS = %dHz\n", clk_sys);
1399 /* We may not get quite the right frequency if using
1400 * approximate clocks so look for the closest match that is
1401 * higher than the target (we need to ensure that there enough
1402 * BCLKs to clock out the samples).
1405 best_val = ((clk_sys * 10) / bclk_divs[0].ratio) - bclk;
1407 while (i < ARRAY_SIZE(bclk_divs)) {
1408 cur_val = ((clk_sys * 10) / bclk_divs[i].ratio) - bclk;
1409 if (cur_val < 0) /* BCLK table is sorted */
1416 aif2 &= ~WM8903_BCLK_DIV_MASK;
1417 aif3 &= ~WM8903_LRCLK_RATE_MASK;
1419 dev_dbg(&i2c->dev, "BCLK ratio %d for %dHz - actual BCLK = %dHz\n",
1420 bclk_divs[bclk_div].ratio / 10, bclk,
1421 (clk_sys * 10) / bclk_divs[bclk_div].ratio);
1423 aif2 |= bclk_divs[bclk_div].div;
1426 snd_soc_write(codec, WM8903_CLOCK_RATES_0, clock0);
1427 snd_soc_write(codec, WM8903_CLOCK_RATES_1, clock1);
1428 snd_soc_write(codec, WM8903_AUDIO_INTERFACE_1, aif1);
1429 snd_soc_write(codec, WM8903_AUDIO_INTERFACE_2, aif2);
1430 snd_soc_write(codec, WM8903_AUDIO_INTERFACE_3, aif3);
1431 snd_soc_write(codec, WM8903_DAC_DIGITAL_1, dac_digital1);
1436 #define WM8903_PLAYBACK_RATES (SNDRV_PCM_RATE_8000 |\
1437 SNDRV_PCM_RATE_11025 | \
1438 SNDRV_PCM_RATE_16000 | \
1439 SNDRV_PCM_RATE_22050 | \
1440 SNDRV_PCM_RATE_32000 | \
1441 SNDRV_PCM_RATE_44100 | \
1442 SNDRV_PCM_RATE_48000 | \
1443 SNDRV_PCM_RATE_88200 | \
1444 SNDRV_PCM_RATE_96000)
1446 #define WM8903_CAPTURE_RATES (SNDRV_PCM_RATE_8000 |\
1447 SNDRV_PCM_RATE_11025 | \
1448 SNDRV_PCM_RATE_16000 | \
1449 SNDRV_PCM_RATE_22050 | \
1450 SNDRV_PCM_RATE_32000 | \
1451 SNDRV_PCM_RATE_44100 | \
1452 SNDRV_PCM_RATE_48000)
1454 #define WM8903_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
1455 SNDRV_PCM_FMTBIT_S20_3LE |\
1456 SNDRV_PCM_FMTBIT_S24_LE)
1458 static struct snd_soc_dai_ops wm8903_dai_ops = {
1459 .startup = wm8903_startup,
1460 .shutdown = wm8903_shutdown,
1461 .hw_params = wm8903_hw_params,
1462 .digital_mute = wm8903_digital_mute,
1463 .set_fmt = wm8903_set_dai_fmt,
1464 .set_sysclk = wm8903_set_dai_sysclk,
1467 struct snd_soc_dai wm8903_dai = {
1470 .stream_name = "Playback",
1473 .rates = WM8903_PLAYBACK_RATES,
1474 .formats = WM8903_FORMATS,
1477 .stream_name = "Capture",
1480 .rates = WM8903_CAPTURE_RATES,
1481 .formats = WM8903_FORMATS,
1483 .ops = &wm8903_dai_ops,
1484 .symmetric_rates = 1,
1486 EXPORT_SYMBOL_GPL(wm8903_dai);
1488 static int wm8903_suspend(struct platform_device *pdev, pm_message_t state)
1490 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1491 struct snd_soc_codec *codec = socdev->card->codec;
1493 wm8903_set_bias_level(codec, SND_SOC_BIAS_OFF);
1498 static int wm8903_resume(struct platform_device *pdev)
1500 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1501 struct snd_soc_codec *codec = socdev->card->codec;
1502 struct i2c_client *i2c = codec->control_data;
1504 u16 *reg_cache = codec->reg_cache;
1505 u16 *tmp_cache = kmemdup(reg_cache, sizeof(wm8903_reg_defaults),
1508 /* Bring the codec back up to standby first to minimise pop/clicks */
1509 wm8903_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1510 wm8903_set_bias_level(codec, codec->suspend_bias_level);
1512 /* Sync back everything else */
1514 for (i = 2; i < ARRAY_SIZE(wm8903_reg_defaults); i++)
1515 if (tmp_cache[i] != reg_cache[i])
1516 snd_soc_write(codec, i, tmp_cache[i]);
1519 dev_err(&i2c->dev, "Failed to allocate temporary cache\n");
1525 static struct snd_soc_codec *wm8903_codec;
1527 static __devinit int wm8903_i2c_probe(struct i2c_client *i2c,
1528 const struct i2c_device_id *id)
1530 struct wm8903_priv *wm8903;
1531 struct snd_soc_codec *codec;
1535 wm8903 = kzalloc(sizeof(struct wm8903_priv), GFP_KERNEL);
1539 codec = &wm8903->codec;
1541 mutex_init(&codec->mutex);
1542 INIT_LIST_HEAD(&codec->dapm_widgets);
1543 INIT_LIST_HEAD(&codec->dapm_paths);
1545 codec->dev = &i2c->dev;
1546 codec->name = "WM8903";
1547 codec->owner = THIS_MODULE;
1548 codec->bias_level = SND_SOC_BIAS_OFF;
1549 codec->set_bias_level = wm8903_set_bias_level;
1550 codec->dai = &wm8903_dai;
1552 codec->reg_cache_size = ARRAY_SIZE(wm8903->reg_cache);
1553 codec->reg_cache = &wm8903->reg_cache[0];
1554 codec->private_data = wm8903;
1555 codec->volatile_register = wm8903_volatile_register;
1557 i2c_set_clientdata(i2c, codec);
1558 codec->control_data = i2c;
1560 ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_I2C);
1562 dev_err(&i2c->dev, "Failed to set cache I/O: %d\n", ret);
1566 val = snd_soc_read(codec, WM8903_SW_RESET_AND_ID);
1567 if (val != wm8903_reg_defaults[WM8903_SW_RESET_AND_ID]) {
1569 "Device with ID register %x is not a WM8903\n", val);
1573 val = snd_soc_read(codec, WM8903_REVISION_NUMBER);
1574 dev_info(&i2c->dev, "WM8903 revision %d\n",
1575 val & WM8903_CHIP_REV_MASK);
1577 wm8903_reset(codec);
1579 /* Set up GPIOs and microphone detection */
1581 for (i = 0; i < ARRAY_SIZE(pdata->gpio_cfg); i++) {
1582 if (!pdata->gpio_cfg[i])
1585 snd_soc_write(codec, WM8903_GPIO_CONTROL_1 + i,
1586 pdata->gpio_cfg[i] & 0xffff);
1589 snd_soc_write(codec, WM8903_MIC_BIAS_CONTROL_0,
1592 /* Microphone detection needs the WSEQ clock */
1593 if (pdata->micdet_cfg)
1594 snd_soc_update_bits(codec, WM8903_WRITE_SEQUENCER_0,
1595 WM8903_WSEQ_ENA, WM8903_WSEQ_ENA);
1597 wm8903->mic_delay = pdata->micdet_delay;
1600 /* power on device */
1601 wm8903_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1603 /* Latch volume update bits */
1604 val = snd_soc_read(codec, WM8903_ADC_DIGITAL_VOLUME_LEFT);
1605 val |= WM8903_ADCVU;
1606 snd_soc_write(codec, WM8903_ADC_DIGITAL_VOLUME_LEFT, val);
1607 snd_soc_write(codec, WM8903_ADC_DIGITAL_VOLUME_RIGHT, val);
1609 val = snd_soc_read(codec, WM8903_DAC_DIGITAL_VOLUME_LEFT);
1610 val |= WM8903_DACVU;
1611 snd_soc_write(codec, WM8903_DAC_DIGITAL_VOLUME_LEFT, val);
1612 snd_soc_write(codec, WM8903_DAC_DIGITAL_VOLUME_RIGHT, val);
1614 val = snd_soc_read(codec, WM8903_ANALOGUE_OUT1_LEFT);
1615 val |= WM8903_HPOUTVU;
1616 snd_soc_write(codec, WM8903_ANALOGUE_OUT1_LEFT, val);
1617 snd_soc_write(codec, WM8903_ANALOGUE_OUT1_RIGHT, val);
1619 val = snd_soc_read(codec, WM8903_ANALOGUE_OUT2_LEFT);
1620 val |= WM8903_LINEOUTVU;
1621 snd_soc_write(codec, WM8903_ANALOGUE_OUT2_LEFT, val);
1622 snd_soc_write(codec, WM8903_ANALOGUE_OUT2_RIGHT, val);
1624 val = snd_soc_read(codec, WM8903_ANALOGUE_OUT3_LEFT);
1625 val |= WM8903_SPKVU;
1626 snd_soc_write(codec, WM8903_ANALOGUE_OUT3_LEFT, val);
1627 snd_soc_write(codec, WM8903_ANALOGUE_OUT3_RIGHT, val);
1629 /* Enable DAC soft mute by default */
1630 val = snd_soc_read(codec, WM8903_DAC_DIGITAL_1);
1631 val |= WM8903_DAC_MUTEMODE;
1632 snd_soc_write(codec, WM8903_DAC_DIGITAL_1, val);
1634 wm8903_dai.dev = &i2c->dev;
1635 wm8903_codec = codec;
1637 ret = snd_soc_register_codec(codec);
1639 dev_err(&i2c->dev, "Failed to register codec: %d\n", ret);
1643 ret = snd_soc_register_dai(&wm8903_dai);
1645 dev_err(&i2c->dev, "Failed to register DAI: %d\n", ret);
1652 snd_soc_unregister_codec(codec);
1654 wm8903_codec = NULL;
1659 static __devexit int wm8903_i2c_remove(struct i2c_client *client)
1661 struct snd_soc_codec *codec = i2c_get_clientdata(client);
1663 snd_soc_unregister_dai(&wm8903_dai);
1664 snd_soc_unregister_codec(codec);
1666 wm8903_set_bias_level(codec, SND_SOC_BIAS_OFF);
1668 kfree(codec->private_data);
1670 wm8903_codec = NULL;
1671 wm8903_dai.dev = NULL;
1676 /* i2c codec control layer */
1677 static const struct i2c_device_id wm8903_i2c_id[] = {
1681 MODULE_DEVICE_TABLE(i2c, wm8903_i2c_id);
1683 static struct i2c_driver wm8903_i2c_driver = {
1686 .owner = THIS_MODULE,
1688 .probe = wm8903_i2c_probe,
1689 .remove = __devexit_p(wm8903_i2c_remove),
1690 .id_table = wm8903_i2c_id,
1693 static int wm8903_probe(struct platform_device *pdev)
1695 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1698 if (!wm8903_codec) {
1699 dev_err(&pdev->dev, "I2C device not yet probed\n");
1703 socdev->card->codec = wm8903_codec;
1706 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
1708 dev_err(&pdev->dev, "failed to create pcms\n");
1712 snd_soc_add_controls(socdev->card->codec, wm8903_snd_controls,
1713 ARRAY_SIZE(wm8903_snd_controls));
1714 wm8903_add_widgets(socdev->card->codec);
1722 /* power down chip */
1723 static int wm8903_remove(struct platform_device *pdev)
1725 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1726 struct snd_soc_codec *codec = socdev->card->codec;
1728 if (codec->control_data)
1729 wm8903_set_bias_level(codec, SND_SOC_BIAS_OFF);
1731 snd_soc_free_pcms(socdev);
1732 snd_soc_dapm_free(socdev);
1737 struct snd_soc_codec_device soc_codec_dev_wm8903 = {
1738 .probe = wm8903_probe,
1739 .remove = wm8903_remove,
1740 .suspend = wm8903_suspend,
1741 .resume = wm8903_resume,
1743 EXPORT_SYMBOL_GPL(soc_codec_dev_wm8903);
1745 static int __init wm8903_modinit(void)
1747 return i2c_add_driver(&wm8903_i2c_driver);
1749 module_init(wm8903_modinit);
1751 static void __exit wm8903_exit(void)
1753 i2c_del_driver(&wm8903_i2c_driver);
1755 module_exit(wm8903_exit);
1757 MODULE_DESCRIPTION("ASoC WM8903 driver");
1758 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.cm>");
1759 MODULE_LICENSE("GPL");