2 * Au12x0/Au1550 PSC ALSA ASoC audio support.
4 * (c) 2007-2009 MSC Vertriebsges.m.b.H.,
5 * Manuel Lauss <manuel.lauss@gmail.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * Au1xxx-PSC AC97 glue.
13 * NOTE: all of these drivers can only work with a SINGLE instance
14 * of a PSC. Multiple independent audio devices are impossible
18 #include <linux/init.h>
19 #include <linux/module.h>
20 #include <linux/slab.h>
21 #include <linux/device.h>
22 #include <linux/delay.h>
23 #include <linux/mutex.h>
24 #include <linux/suspend.h>
25 #include <sound/core.h>
26 #include <sound/pcm.h>
27 #include <sound/initval.h>
28 #include <sound/soc.h>
29 #include <asm/mach-au1x00/au1000.h>
30 #include <asm/mach-au1x00/au1xxx_psc.h>
34 /* how often to retry failed codec register reads/writes */
35 #define AC97_RW_RETRIES 5
38 (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE)
41 SNDRV_PCM_RATE_8000_48000
44 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3BE)
46 #define AC97PCR_START(stype) \
47 ((stype) == PCM_TX ? PSC_AC97PCR_TS : PSC_AC97PCR_RS)
48 #define AC97PCR_STOP(stype) \
49 ((stype) == PCM_TX ? PSC_AC97PCR_TP : PSC_AC97PCR_RP)
50 #define AC97PCR_CLRFIFO(stype) \
51 ((stype) == PCM_TX ? PSC_AC97PCR_TC : PSC_AC97PCR_RC)
53 #define AC97STAT_BUSY(stype) \
54 ((stype) == PCM_TX ? PSC_AC97STAT_TB : PSC_AC97STAT_RB)
56 /* instance data. There can be only one, MacLeod!!!! */
57 static struct au1xpsc_audio_data *au1xpsc_ac97_workdata;
59 /* AC97 controller reads codec register */
60 static unsigned short au1xpsc_ac97_read(struct snd_ac97 *ac97,
64 struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata;
65 unsigned short retry, tmo;
68 au_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata));
71 retry = AC97_RW_RETRIES;
73 mutex_lock(&pscdata->lock);
75 au_writel(PSC_AC97CDC_RD | PSC_AC97CDC_INDX(reg),
82 if (au_readl(AC97_EVNT(pscdata)) & PSC_AC97EVNT_CD)
86 data = au_readl(AC97_CDC(pscdata));
88 au_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata));
91 mutex_unlock(&pscdata->lock);
93 if (reg != ((data >> 16) & 0x7f))
94 tmo = 1; /* wrong register, try again */
96 } while (--retry && !tmo);
98 return retry ? data & 0xffff : 0xffff;
101 /* AC97 controller writes to codec register */
102 static void au1xpsc_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
106 struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata;
107 unsigned int tmo, retry;
109 au_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata));
112 retry = AC97_RW_RETRIES;
114 mutex_lock(&pscdata->lock);
116 au_writel(PSC_AC97CDC_INDX(reg) | (val & 0xffff),
123 if (au_readl(AC97_EVNT(pscdata)) & PSC_AC97EVNT_CD)
127 au_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata));
130 mutex_unlock(&pscdata->lock);
131 } while (--retry && !tmo);
134 /* AC97 controller asserts a warm reset */
135 static void au1xpsc_ac97_warm_reset(struct snd_ac97 *ac97)
138 struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata;
140 au_writel(PSC_AC97RST_SNC, AC97_RST(pscdata));
143 au_writel(0, AC97_RST(pscdata));
147 static void au1xpsc_ac97_cold_reset(struct snd_ac97 *ac97)
150 struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata;
153 /* disable PSC during cold reset */
154 au_writel(0, AC97_CFG(au1xpsc_ac97_workdata));
156 au_writel(PSC_CTRL_DISABLE, PSC_CTRL(pscdata));
159 /* issue cold reset */
160 au_writel(PSC_AC97RST_RST, AC97_RST(pscdata));
163 au_writel(0, AC97_RST(pscdata));
167 au_writel(PSC_CTRL_ENABLE, PSC_CTRL(pscdata));
170 /* wait for PSC to indicate it's ready */
172 while (!((au_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_SR)) && (--i))
176 printk(KERN_ERR "au1xpsc-ac97: PSC not ready!\n");
180 /* enable the ac97 function */
181 au_writel(pscdata->cfg | PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata));
184 /* wait for AC97 core to become ready */
186 while (!((au_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_DR)) && (--i))
189 printk(KERN_ERR "au1xpsc-ac97: AC97 ctrl not ready\n");
192 /* AC97 controller operations */
193 struct snd_ac97_bus_ops soc_ac97_ops = {
194 .read = au1xpsc_ac97_read,
195 .write = au1xpsc_ac97_write,
196 .reset = au1xpsc_ac97_cold_reset,
197 .warm_reset = au1xpsc_ac97_warm_reset,
199 EXPORT_SYMBOL_GPL(soc_ac97_ops);
201 static int au1xpsc_ac97_hw_params(struct snd_pcm_substream *substream,
202 struct snd_pcm_hw_params *params,
203 struct snd_soc_dai *dai)
206 struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata;
207 unsigned long r, ro, stat;
208 int chans, t, stype = SUBSTREAM_TYPE(substream);
210 chans = params_channels(params);
212 r = ro = au_readl(AC97_CFG(pscdata));
213 stat = au_readl(AC97_STAT(pscdata));
215 /* already active? */
216 if (stat & (PSC_AC97STAT_TB | PSC_AC97STAT_RB)) {
217 /* reject parameters not currently set up */
218 if ((PSC_AC97CFG_GET_LEN(r) != params->msbits) ||
219 (pscdata->rate != params_rate(params)))
223 /* set sample bitdepth: REG[24:21]=(BITS-2)/2 */
224 r &= ~PSC_AC97CFG_LEN_MASK;
225 r |= PSC_AC97CFG_SET_LEN(params->msbits);
227 /* channels: enable slots for front L/R channel */
228 if (stype == PCM_TX) {
229 r &= ~PSC_AC97CFG_TXSLOT_MASK;
230 r |= PSC_AC97CFG_TXSLOT_ENA(3);
231 r |= PSC_AC97CFG_TXSLOT_ENA(4);
233 r &= ~PSC_AC97CFG_RXSLOT_MASK;
234 r |= PSC_AC97CFG_RXSLOT_ENA(3);
235 r |= PSC_AC97CFG_RXSLOT_ENA(4);
238 /* do we need to poke the hardware? */
242 /* ac97 engine is about to be disabled */
243 mutex_lock(&pscdata->lock);
245 /* disable AC97 device controller first... */
246 au_writel(r & ~PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata));
249 /* ...wait for it... */
251 while ((au_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_DR) && --t)
255 printk(KERN_ERR "PSC-AC97: can't disable!\n");
257 /* ...write config... */
258 au_writel(r, AC97_CFG(pscdata));
261 /* ...enable the AC97 controller again... */
262 au_writel(r | PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata));
265 /* ...and wait for ready bit */
267 while ((!(au_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_DR)) && --t)
271 printk(KERN_ERR "PSC-AC97: can't enable!\n");
273 mutex_unlock(&pscdata->lock);
276 pscdata->rate = params_rate(params);
283 static int au1xpsc_ac97_trigger(struct snd_pcm_substream *substream,
284 int cmd, struct snd_soc_dai *dai)
287 struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata;
288 int ret, stype = SUBSTREAM_TYPE(substream);
293 case SNDRV_PCM_TRIGGER_START:
294 case SNDRV_PCM_TRIGGER_RESUME:
295 au_writel(AC97PCR_CLRFIFO(stype), AC97_PCR(pscdata));
297 au_writel(AC97PCR_START(stype), AC97_PCR(pscdata));
300 case SNDRV_PCM_TRIGGER_STOP:
301 case SNDRV_PCM_TRIGGER_SUSPEND:
302 au_writel(AC97PCR_STOP(stype), AC97_PCR(pscdata));
305 while (au_readl(AC97_STAT(pscdata)) & AC97STAT_BUSY(stype))
306 asm volatile ("nop");
308 au_writel(AC97PCR_CLRFIFO(stype), AC97_PCR(pscdata));
318 static int au1xpsc_ac97_probe(struct platform_device *pdev,
319 struct snd_soc_dai *dai)
321 return au1xpsc_ac97_workdata ? 0 : -ENODEV;
324 static void au1xpsc_ac97_remove(struct platform_device *pdev,
325 struct snd_soc_dai *dai)
329 static struct snd_soc_dai_ops au1xpsc_ac97_dai_ops = {
330 .trigger = au1xpsc_ac97_trigger,
331 .hw_params = au1xpsc_ac97_hw_params,
334 struct snd_soc_dai au1xpsc_ac97_dai = {
335 .name = "au1xpsc_ac97",
337 .probe = au1xpsc_ac97_probe,
338 .remove = au1xpsc_ac97_remove,
341 .formats = AC97_FMTS,
347 .formats = AC97_FMTS,
351 .ops = &au1xpsc_ac97_dai_ops,
353 EXPORT_SYMBOL_GPL(au1xpsc_ac97_dai);
355 static int __devinit au1xpsc_ac97_drvprobe(struct platform_device *pdev)
360 struct au1xpsc_audio_data *wd;
362 if (au1xpsc_ac97_workdata)
365 wd = kzalloc(sizeof(struct au1xpsc_audio_data), GFP_KERNEL);
369 mutex_init(&wd->lock);
371 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
378 wd->ioarea = request_mem_region(r->start, r->end - r->start + 1,
383 wd->mmio = ioremap(r->start, 0xffff);
387 /* configuration: max dma trigger threshold, enable ac97 */
388 wd->cfg = PSC_AC97CFG_RT_FIFO8 | PSC_AC97CFG_TT_FIFO8 |
389 PSC_AC97CFG_DE_ENABLE;
391 /* preserve PSC clock source set up by platform */
392 sel = au_readl(PSC_SEL(wd)) & PSC_SEL_CLK_MASK;
393 au_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd));
395 au_writel(0, PSC_SEL(wd));
397 au_writel(PSC_SEL_PS_AC97MODE | sel, PSC_SEL(wd));
400 ret = snd_soc_register_dai(&au1xpsc_ac97_dai);
404 wd->dmapd = au1xpsc_pcm_add(pdev);
406 platform_set_drvdata(pdev, wd);
407 au1xpsc_ac97_workdata = wd; /* MDEV */
411 snd_soc_unregister_dai(&au1xpsc_ac97_dai);
413 release_resource(wd->ioarea);
420 static int __devexit au1xpsc_ac97_drvremove(struct platform_device *pdev)
422 struct au1xpsc_audio_data *wd = platform_get_drvdata(pdev);
425 au1xpsc_pcm_destroy(wd->dmapd);
427 snd_soc_unregister_dai(&au1xpsc_ac97_dai);
429 /* disable PSC completely */
430 au_writel(0, AC97_CFG(wd));
432 au_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd));
436 release_resource(wd->ioarea);
440 au1xpsc_ac97_workdata = NULL; /* MDEV */
446 static int au1xpsc_ac97_drvsuspend(struct device *dev)
448 struct au1xpsc_audio_data *wd = dev_get_drvdata(dev);
450 /* save interesting registers and disable PSC */
451 wd->pm[0] = au_readl(PSC_SEL(wd));
453 au_writel(0, AC97_CFG(wd));
455 au_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd));
461 static int au1xpsc_ac97_drvresume(struct device *dev)
463 struct au1xpsc_audio_data *wd = dev_get_drvdata(dev);
465 /* restore PSC clock config */
466 au_writel(wd->pm[0] | PSC_SEL_PS_AC97MODE, PSC_SEL(wd));
469 /* after this point the ac97 core will cold-reset the codec.
470 * During cold-reset the PSC is reinitialized and the last
471 * configuration set up in hw_params() is restored.
476 static struct dev_pm_ops au1xpscac97_pmops = {
477 .suspend = au1xpsc_ac97_drvsuspend,
478 .resume = au1xpsc_ac97_drvresume,
481 #define AU1XPSCAC97_PMOPS &au1xpscac97_pmops
485 #define AU1XPSCAC97_PMOPS NULL
489 static struct platform_driver au1xpsc_ac97_driver = {
491 .name = "au1xpsc_ac97",
492 .owner = THIS_MODULE,
493 .pm = AU1XPSCAC97_PMOPS,
495 .probe = au1xpsc_ac97_drvprobe,
496 .remove = __devexit_p(au1xpsc_ac97_drvremove),
499 static int __init au1xpsc_ac97_load(void)
501 au1xpsc_ac97_workdata = NULL;
502 return platform_driver_register(&au1xpsc_ac97_driver);
505 static void __exit au1xpsc_ac97_unload(void)
507 platform_driver_unregister(&au1xpsc_ac97_driver);
510 module_init(au1xpsc_ac97_load);
511 module_exit(au1xpsc_ac97_unload);
513 MODULE_LICENSE("GPL");
514 MODULE_DESCRIPTION("Au12x0/Au1550 PSC AC97 ALSA ASoC audio driver");
515 MODULE_AUTHOR("Manuel Lauss");