[PATCH] Replace 0xff.. with correct DMA_xBIT_MASK
[safe/jmp/linux-2.6] / sound / pci / pcxhr / pcxhr.c
1 /*
2  * Driver for Digigram pcxhr compatible soundcards
3  *
4  * main file with alsa callbacks
5  *
6  * Copyright (c) 2004 by Digigram <alsa@digigram.com>
7  *
8  *   This program is free software; you can redistribute it and/or modify
9  *   it under the terms of the GNU General Public License as published by
10  *   the Free Software Foundation; either version 2 of the License, or
11  *   (at your option) any later version.
12  *
13  *   This program is distributed in the hope that it will be useful,
14  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
15  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  *   GNU General Public License for more details.
17  *
18  *   You should have received a copy of the GNU General Public License
19  *   along with this program; if not, write to the Free Software
20  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
21  */
22
23
24 #include <sound/driver.h>
25 #include <linux/init.h>
26 #include <linux/interrupt.h>
27 #include <linux/slab.h>
28 #include <linux/pci.h>
29 #include <linux/dma-mapping.h>
30 #include <linux/delay.h>
31 #include <linux/moduleparam.h>
32 #include <linux/mutex.h>
33 #include <linux/dma-mapping.h>
34
35 #include <sound/core.h>
36 #include <sound/initval.h>
37 #include <sound/info.h>
38 #include <sound/control.h>
39 #include <sound/pcm.h>
40 #include <sound/pcm_params.h>
41 #include "pcxhr.h"
42 #include "pcxhr_mixer.h"
43 #include "pcxhr_hwdep.h"
44 #include "pcxhr_core.h"
45
46 #define DRIVER_NAME "pcxhr"
47
48 MODULE_AUTHOR("Markus Bollinger <bollinger@digigram.com>");
49 MODULE_DESCRIPTION("Digigram " DRIVER_NAME " " PCXHR_DRIVER_VERSION_STRING);
50 MODULE_LICENSE("GPL");
51 MODULE_SUPPORTED_DEVICE("{{Digigram," DRIVER_NAME "}}");
52
53 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;              /* Index 0-MAX */
54 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;               /* ID for this card */
55 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;      /* Enable this card */
56 static int mono[SNDRV_CARDS];                                   /* capture in mono only */
57
58 module_param_array(index, int, NULL, 0444);
59 MODULE_PARM_DESC(index, "Index value for Digigram " DRIVER_NAME " soundcard");
60 module_param_array(id, charp, NULL, 0444);
61 MODULE_PARM_DESC(id, "ID string for Digigram " DRIVER_NAME " soundcard");
62 module_param_array(enable, bool, NULL, 0444);
63 MODULE_PARM_DESC(enable, "Enable Digigram " DRIVER_NAME " soundcard");
64 module_param_array(mono, bool, NULL, 0444);
65 MODULE_PARM_DESC(mono, "Mono capture mode (default is stereo)");
66
67 enum {
68         PCI_ID_VX882HR,
69         PCI_ID_PCX882HR,
70         PCI_ID_VX881HR,
71         PCI_ID_PCX881HR,
72         PCI_ID_PCX1222HR,
73         PCI_ID_PCX1221HR,
74         PCI_ID_LAST
75 };
76
77 static struct pci_device_id pcxhr_ids[] = {
78         { 0x10b5, 0x9656, 0x1369, 0xb001, 0, 0, PCI_ID_VX882HR, },   /* VX882HR */
79         { 0x10b5, 0x9656, 0x1369, 0xb101, 0, 0, PCI_ID_PCX882HR, },  /* PCX882HR */
80         { 0x10b5, 0x9656, 0x1369, 0xb201, 0, 0, PCI_ID_VX881HR, },   /* VX881HR */
81         { 0x10b5, 0x9656, 0x1369, 0xb301, 0, 0, PCI_ID_PCX881HR, },  /* PCX881HR */
82         { 0x10b5, 0x9656, 0x1369, 0xb501, 0, 0, PCI_ID_PCX1222HR, }, /* PCX1222HR */
83         { 0x10b5, 0x9656, 0x1369, 0xb701, 0, 0, PCI_ID_PCX1221HR, }, /* PCX1221HR */
84         { 0, }
85 };
86
87 MODULE_DEVICE_TABLE(pci, pcxhr_ids);
88
89 struct board_parameters {
90         char* board_name;
91         short playback_chips;
92         short capture_chips;
93         short firmware_num;
94 };
95 static struct board_parameters pcxhr_board_params[] = {
96 [PCI_ID_VX882HR] =      { "VX882HR",   4, 4, 41, },
97 [PCI_ID_PCX882HR] =     { "PCX882HR",  4, 4, 41, },
98 [PCI_ID_VX881HR] =      { "VX881HR",   4, 4, 41, },
99 [PCI_ID_PCX881HR] =     { "PCX881HR",  4, 4, 41, },
100 [PCI_ID_PCX1222HR] =    { "PCX1222HR", 6, 1, 42, },
101 [PCI_ID_PCX1221HR] =    { "PCX1221HR", 6, 1, 42, },
102 };
103
104
105 static int pcxhr_pll_freq_register(unsigned int freq, unsigned int* pllreg,
106                                    unsigned int* realfreq)
107 {
108         unsigned int reg;
109
110         if (freq < 6900 || freq > 110250)
111                 return -EINVAL;
112         reg = (28224000 * 10) / freq;
113         reg = (reg + 5) / 10;
114         if (reg < 0x200)
115                 *pllreg = reg + 0x800;
116         else if (reg < 0x400)
117                 *pllreg = reg & 0x1ff;
118         else if (reg < 0x800) {
119                 *pllreg = ((reg >> 1) & 0x1ff) + 0x200;
120                 reg &= ~1;
121         } else {
122                 *pllreg = ((reg >> 2) & 0x1ff) + 0x400;
123                 reg &= ~3;
124         }
125         if (realfreq)
126                 *realfreq = ((28224000 * 10) / reg + 5) / 10;
127         return 0;
128 }
129
130
131 #define PCXHR_FREQ_REG_MASK             0x1f
132 #define PCXHR_FREQ_QUARTZ_48000         0x00
133 #define PCXHR_FREQ_QUARTZ_24000         0x01
134 #define PCXHR_FREQ_QUARTZ_12000         0x09
135 #define PCXHR_FREQ_QUARTZ_32000         0x08
136 #define PCXHR_FREQ_QUARTZ_16000         0x04
137 #define PCXHR_FREQ_QUARTZ_8000          0x0c
138 #define PCXHR_FREQ_QUARTZ_44100         0x02
139 #define PCXHR_FREQ_QUARTZ_22050         0x0a
140 #define PCXHR_FREQ_QUARTZ_11025         0x06
141 #define PCXHR_FREQ_PLL                  0x05
142 #define PCXHR_FREQ_QUARTZ_192000        0x10
143 #define PCXHR_FREQ_QUARTZ_96000         0x18
144 #define PCXHR_FREQ_QUARTZ_176400        0x14
145 #define PCXHR_FREQ_QUARTZ_88200         0x1c
146 #define PCXHR_FREQ_QUARTZ_128000        0x12
147 #define PCXHR_FREQ_QUARTZ_64000         0x1a
148
149 #define PCXHR_FREQ_WORD_CLOCK           0x0f
150 #define PCXHR_FREQ_SYNC_AES             0x0e
151 #define PCXHR_FREQ_AES_1                0x07
152 #define PCXHR_FREQ_AES_2                0x0b
153 #define PCXHR_FREQ_AES_3                0x03
154 #define PCXHR_FREQ_AES_4                0x0d
155
156 #define PCXHR_MODIFY_CLOCK_S_BIT        0x04
157
158 #define PCXHR_IRQ_TIMER_FREQ            92000
159 #define PCXHR_IRQ_TIMER_PERIOD          48
160
161 static int pcxhr_get_clock_reg(struct pcxhr_mgr *mgr, unsigned int rate,
162                                unsigned int *reg, unsigned int *freq)
163 {
164         unsigned int val, realfreq, pllreg;
165         struct pcxhr_rmh rmh;
166         int err;
167
168         realfreq = rate;
169         switch (mgr->use_clock_type) {
170         case PCXHR_CLOCK_TYPE_INTERNAL :        /* clock by quartz or pll */
171                 switch (rate) {
172                 case 48000 :    val = PCXHR_FREQ_QUARTZ_48000;  break;
173                 case 24000 :    val = PCXHR_FREQ_QUARTZ_24000;  break;
174                 case 12000 :    val = PCXHR_FREQ_QUARTZ_12000;  break;
175                 case 32000 :    val = PCXHR_FREQ_QUARTZ_32000;  break;
176                 case 16000 :    val = PCXHR_FREQ_QUARTZ_16000;  break;
177                 case 8000 :     val = PCXHR_FREQ_QUARTZ_8000;   break;
178                 case 44100 :    val = PCXHR_FREQ_QUARTZ_44100;  break;
179                 case 22050 :    val = PCXHR_FREQ_QUARTZ_22050;  break;
180                 case 11025 :    val = PCXHR_FREQ_QUARTZ_11025;  break;
181                 case 192000 :   val = PCXHR_FREQ_QUARTZ_192000; break;
182                 case 96000 :    val = PCXHR_FREQ_QUARTZ_96000;  break;
183                 case 176400 :   val = PCXHR_FREQ_QUARTZ_176400; break;
184                 case 88200 :    val = PCXHR_FREQ_QUARTZ_88200;  break;
185                 case 128000 :   val = PCXHR_FREQ_QUARTZ_128000; break;
186                 case 64000 :    val = PCXHR_FREQ_QUARTZ_64000;  break;
187                 default :
188                         val = PCXHR_FREQ_PLL;
189                         /* get the value for the pll register */
190                         err = pcxhr_pll_freq_register(rate, &pllreg, &realfreq);
191                         if (err)
192                                 return err;
193                         pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE);
194                         rmh.cmd[0] |= IO_NUM_REG_GENCLK;
195                         rmh.cmd[1]  = pllreg & MASK_DSP_WORD;
196                         rmh.cmd[2]  = pllreg >> 24;
197                         rmh.cmd_len = 3;
198                         err = pcxhr_send_msg(mgr, &rmh);
199                         if (err < 0) {
200                                 snd_printk(KERN_ERR
201                                            "error CMD_ACCESS_IO_WRITE for PLL register : %x!\n",
202                                            err );
203                                 return err;
204                         }
205                 }
206                 break;
207         case PCXHR_CLOCK_TYPE_WORD_CLOCK :      val = PCXHR_FREQ_WORD_CLOCK;    break;
208         case PCXHR_CLOCK_TYPE_AES_SYNC :        val = PCXHR_FREQ_SYNC_AES;      break;
209         case PCXHR_CLOCK_TYPE_AES_1 :           val = PCXHR_FREQ_AES_1;         break;
210         case PCXHR_CLOCK_TYPE_AES_2 :           val = PCXHR_FREQ_AES_2;         break;
211         case PCXHR_CLOCK_TYPE_AES_3 :           val = PCXHR_FREQ_AES_3;         break;
212         case PCXHR_CLOCK_TYPE_AES_4 :           val = PCXHR_FREQ_AES_4;         break;
213         default : return -EINVAL;
214         }
215         *reg = val;
216         *freq = realfreq;
217         return 0;
218 }
219
220
221 int pcxhr_set_clock(struct pcxhr_mgr *mgr, unsigned int rate)
222 {
223         unsigned int val, realfreq, speed;
224         struct pcxhr_rmh rmh;
225         int err, changed;
226
227         if (rate == 0)
228                 return 0; /* nothing to do */
229
230         err = pcxhr_get_clock_reg(mgr, rate, &val, &realfreq);
231         if (err)
232                 return err;
233
234         /* codec speed modes */
235         if (rate < 55000)
236                 speed = 0;      /* single speed */
237         else if (rate < 100000)
238                 speed = 1;      /* dual speed */
239         else
240                 speed = 2;      /* quad speed */
241         if (mgr->codec_speed != speed) {
242                 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE);      /* mute outputs */
243                 rmh.cmd[0] |= IO_NUM_REG_MUTE_OUT;
244                 err = pcxhr_send_msg(mgr, &rmh);
245                 if (err)
246                         return err;
247
248                 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE);      /* set speed ratio */
249                 rmh.cmd[0] |= IO_NUM_SPEED_RATIO;
250                 rmh.cmd[1] = speed;
251                 rmh.cmd_len = 2;
252                 err = pcxhr_send_msg(mgr, &rmh);
253                 if (err)
254                         return err;
255         }
256         /* set the new frequency */
257         snd_printdd("clock register : set %x\n", val);
258         err = pcxhr_write_io_num_reg_cont(mgr, PCXHR_FREQ_REG_MASK, val, &changed);
259         if (err)
260                 return err;
261         mgr->sample_rate_real = realfreq;
262         mgr->cur_clock_type = mgr->use_clock_type;
263
264         /* unmute after codec speed modes */
265         if (mgr->codec_speed != speed) {
266                 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_READ);       /* unmute outputs */
267                 rmh.cmd[0] |= IO_NUM_REG_MUTE_OUT;
268                 err = pcxhr_send_msg(mgr, &rmh);
269                 if (err)
270                         return err;
271                 mgr->codec_speed = speed;                       /* save new codec speed */
272         }
273
274         if (changed) {
275                 pcxhr_init_rmh(&rmh, CMD_MODIFY_CLOCK);
276                 rmh.cmd[0] |= PCXHR_MODIFY_CLOCK_S_BIT;         /* resync fifos  */
277                 if (rate < PCXHR_IRQ_TIMER_FREQ)
278                         rmh.cmd[1] = PCXHR_IRQ_TIMER_PERIOD;
279                 else
280                         rmh.cmd[1] = PCXHR_IRQ_TIMER_PERIOD * 2;
281                 rmh.cmd[2] = rate;
282                 rmh.cmd_len = 3;
283                 err = pcxhr_send_msg(mgr, &rmh);
284                 if (err)
285                         return err;
286         }
287         snd_printdd("pcxhr_set_clock to %dHz (realfreq=%d)\n", rate, realfreq);
288         return 0;
289 }
290
291
292 int pcxhr_get_external_clock(struct pcxhr_mgr *mgr, enum pcxhr_clock_type clock_type,
293                              int *sample_rate)
294 {
295         struct pcxhr_rmh rmh;
296         unsigned char reg;
297         int err, rate;
298
299         switch (clock_type) {
300         case PCXHR_CLOCK_TYPE_WORD_CLOCK :      reg = REG_STATUS_WORD_CLOCK;    break;
301         case PCXHR_CLOCK_TYPE_AES_SYNC :        reg = REG_STATUS_AES_SYNC;      break;
302         case PCXHR_CLOCK_TYPE_AES_1 :           reg = REG_STATUS_AES_1;         break;
303         case PCXHR_CLOCK_TYPE_AES_2 :           reg = REG_STATUS_AES_2;         break;
304         case PCXHR_CLOCK_TYPE_AES_3 :           reg = REG_STATUS_AES_3;         break;
305         case PCXHR_CLOCK_TYPE_AES_4 :           reg = REG_STATUS_AES_4;         break;
306         default : return -EINVAL;
307         }
308         pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_READ);
309         rmh.cmd_len = 2;
310         rmh.cmd[0] |= IO_NUM_REG_STATUS;
311         if (mgr->last_reg_stat != reg) {
312                 rmh.cmd[1]  = reg;
313                 err = pcxhr_send_msg(mgr, &rmh);
314                 if (err)
315                         return err;
316                 udelay(100);            /* wait minimum 2 sample_frames at 32kHz ! */
317                 mgr->last_reg_stat = reg;
318         }
319         rmh.cmd[1]  = REG_STATUS_CURRENT;
320         err = pcxhr_send_msg(mgr, &rmh);
321         if (err)
322                 return err;
323         switch (rmh.stat[1] & 0x0f) {
324         case REG_STATUS_SYNC_32000 :    rate = 32000; break;
325         case REG_STATUS_SYNC_44100 :    rate = 44100; break;
326         case REG_STATUS_SYNC_48000 :    rate = 48000; break;
327         case REG_STATUS_SYNC_64000 :    rate = 64000; break;
328         case REG_STATUS_SYNC_88200 :    rate = 88200; break;
329         case REG_STATUS_SYNC_96000 :    rate = 96000; break;
330         case REG_STATUS_SYNC_128000 :   rate = 128000; break;
331         case REG_STATUS_SYNC_176400 :   rate = 176400; break;
332         case REG_STATUS_SYNC_192000 :   rate = 192000; break;
333         default: rate = 0;
334         }
335         snd_printdd("External clock is at %d Hz\n", rate);
336         *sample_rate = rate;
337         return 0;
338 }
339
340
341 /*
342  *  start or stop playback/capture substream
343  */
344 static int pcxhr_set_stream_state(struct pcxhr_stream *stream)
345 {
346         int err;
347         struct snd_pcxhr *chip;
348         struct pcxhr_rmh rmh;
349         int stream_mask, start;
350
351         if (stream->status == PCXHR_STREAM_STATUS_SCHEDULE_RUN)
352                 start = 1;
353         else {
354                 if (stream->status != PCXHR_STREAM_STATUS_SCHEDULE_STOP) {
355                         snd_printk(KERN_ERR "ERROR pcxhr_set_stream_state CANNOT be stopped\n");
356                         return -EINVAL;
357                 }
358                 start = 0;
359         }
360         if (!stream->substream)
361                 return -EINVAL;
362
363         stream->timer_abs_periods = 0;
364         stream->timer_period_frag = 0;            /* reset theoretical stream pos */
365         stream->timer_buf_periods = 0;
366         stream->timer_is_synced = 0;
367
368         stream_mask = stream->pipe->is_capture ? 1 : 1<<stream->substream->number;
369
370         pcxhr_init_rmh(&rmh, start ? CMD_START_STREAM : CMD_STOP_STREAM);
371         pcxhr_set_pipe_cmd_params(&rmh, stream->pipe->is_capture,
372                                   stream->pipe->first_audio, 0, stream_mask);
373
374         chip = snd_pcm_substream_chip(stream->substream);
375
376         err = pcxhr_send_msg(chip->mgr, &rmh);
377         if (err)
378                 snd_printk(KERN_ERR "ERROR pcxhr_set_stream_state err=%x;\n", err);
379         stream->status = start ? PCXHR_STREAM_STATUS_STARTED : PCXHR_STREAM_STATUS_STOPPED;
380         return err;
381 }
382
383 #define HEADER_FMT_BASE_LIN             0xfed00000
384 #define HEADER_FMT_BASE_FLOAT           0xfad00000
385 #define HEADER_FMT_INTEL                0x00008000
386 #define HEADER_FMT_24BITS               0x00004000
387 #define HEADER_FMT_16BITS               0x00002000
388 #define HEADER_FMT_UPTO11               0x00000200
389 #define HEADER_FMT_UPTO32               0x00000100
390 #define HEADER_FMT_MONO                 0x00000080
391
392 static int pcxhr_set_format(struct pcxhr_stream *stream)
393 {
394         int err, is_capture, sample_rate, stream_num;
395         struct snd_pcxhr *chip;
396         struct pcxhr_rmh rmh;
397         unsigned int header;
398
399         switch (stream->format) {
400         case SNDRV_PCM_FORMAT_U8:
401                 header = HEADER_FMT_BASE_LIN;
402                 break;
403         case SNDRV_PCM_FORMAT_S16_LE:
404                 header = HEADER_FMT_BASE_LIN | HEADER_FMT_16BITS | HEADER_FMT_INTEL;
405                 break;
406         case SNDRV_PCM_FORMAT_S16_BE:
407                 header = HEADER_FMT_BASE_LIN | HEADER_FMT_16BITS;
408                 break;
409         case SNDRV_PCM_FORMAT_S24_3LE:
410                 header = HEADER_FMT_BASE_LIN | HEADER_FMT_24BITS | HEADER_FMT_INTEL;
411                 break;
412         case SNDRV_PCM_FORMAT_S24_3BE:
413                 header = HEADER_FMT_BASE_LIN | HEADER_FMT_24BITS;
414                 break;
415         case SNDRV_PCM_FORMAT_FLOAT_LE:
416                 header = HEADER_FMT_BASE_FLOAT | HEADER_FMT_INTEL;
417                 break;
418         default:
419                 snd_printk(KERN_ERR "error pcxhr_set_format() : unknown format\n");
420                 return -EINVAL;
421         }
422         chip = snd_pcm_substream_chip(stream->substream);
423
424         sample_rate = chip->mgr->sample_rate;
425         if (sample_rate <= 32000 && sample_rate !=0) {
426                 if (sample_rate <= 11025)
427                         header |= HEADER_FMT_UPTO11;
428                 else
429                         header |= HEADER_FMT_UPTO32;
430         }
431         if (stream->channels == 1)
432                 header |= HEADER_FMT_MONO;
433
434         is_capture = stream->pipe->is_capture;
435         stream_num = is_capture ? 0 : stream->substream->number;
436
437         pcxhr_init_rmh(&rmh, is_capture ? CMD_FORMAT_STREAM_IN : CMD_FORMAT_STREAM_OUT);
438         pcxhr_set_pipe_cmd_params(&rmh, is_capture, stream->pipe->first_audio, stream_num, 0);
439         if (is_capture)
440                 rmh.cmd[0] |= 1<<12;
441         rmh.cmd[1] = 0;
442         rmh.cmd[2] = header >> 8;
443         rmh.cmd[3] = (header & 0xff) << 16;
444         rmh.cmd_len = 4;
445         err = pcxhr_send_msg(chip->mgr, &rmh);
446         if (err)
447                 snd_printk(KERN_ERR "ERROR pcxhr_set_format err=%x;\n", err);
448         return err;
449 }
450
451 static int pcxhr_update_r_buffer(struct pcxhr_stream *stream)
452 {
453         int err, is_capture, stream_num;
454         struct pcxhr_rmh rmh;
455         struct snd_pcm_substream *subs = stream->substream;
456         struct snd_pcxhr *chip = snd_pcm_substream_chip(subs);
457
458         is_capture = (subs->stream == SNDRV_PCM_STREAM_CAPTURE);
459         stream_num = is_capture ? 0 : subs->number;
460
461         snd_printdd("pcxhr_update_r_buffer(pcm%c%d) : addr(%p) bytes(%zx) subs(%d)\n",
462                     is_capture ? 'c' : 'p',
463                     chip->chip_idx, (void*)subs->runtime->dma_addr,
464                     subs->runtime->dma_bytes, subs->number);
465
466         pcxhr_init_rmh(&rmh, CMD_UPDATE_R_BUFFERS);
467         pcxhr_set_pipe_cmd_params(&rmh, is_capture, stream->pipe->first_audio, stream_num, 0);
468
469         snd_assert(subs->runtime->dma_bytes < 0x200000);        /* max buffer size is 2 MByte */
470         rmh.cmd[1] = subs->runtime->dma_bytes * 8;              /* size in bits */
471         rmh.cmd[2] = subs->runtime->dma_addr >> 24;             /* most significant byte */
472         rmh.cmd[2] |= 1<<19;                                    /* this is a circular buffer */
473         rmh.cmd[3] = subs->runtime->dma_addr & MASK_DSP_WORD;   /* least 3 significant bytes */
474         rmh.cmd_len = 4;
475         err = pcxhr_send_msg(chip->mgr, &rmh);
476         if (err)
477                 snd_printk(KERN_ERR "ERROR CMD_UPDATE_R_BUFFERS err=%x;\n", err);
478         return err;
479 }
480
481
482 #if 0
483 static int pcxhr_pipe_sample_count(struct pcxhr_stream *stream, snd_pcm_uframes_t *sample_count)
484 {
485         struct pcxhr_rmh rmh;
486         int err;
487         pcxhr_t *chip = snd_pcm_substream_chip(stream->substream);
488         pcxhr_init_rmh(&rmh, CMD_PIPE_SAMPLE_COUNT);
489         pcxhr_set_pipe_cmd_params(&rmh, stream->pipe->is_capture, 0, 0,
490                                   1<<stream->pipe->first_audio);
491         err = pcxhr_send_msg(chip->mgr, &rmh);
492         if (err == 0) {
493                 *sample_count = ((snd_pcm_uframes_t)rmh.stat[0]) << 24;
494                 *sample_count += (snd_pcm_uframes_t)rmh.stat[1];
495         }
496         snd_printdd("PIPE_SAMPLE_COUNT = %lx\n", *sample_count);
497         return err;
498 }
499 #endif
500
501 static inline int pcxhr_stream_scheduled_get_pipe(struct pcxhr_stream *stream,
502                                                   struct pcxhr_pipe **pipe)
503 {
504         if (stream->status == PCXHR_STREAM_STATUS_SCHEDULE_RUN) {
505                 *pipe = stream->pipe;
506                 return 1;
507         }
508         return 0;
509 }
510
511 static void pcxhr_trigger_tasklet(unsigned long arg)
512 {
513         unsigned long flags;
514         int i, j, err;
515         struct pcxhr_pipe *pipe;
516         struct snd_pcxhr *chip;
517         struct pcxhr_mgr *mgr = (struct pcxhr_mgr*)(arg);
518         int capture_mask = 0;
519         int playback_mask = 0;
520
521 #ifdef CONFIG_SND_DEBUG_DETECT
522         struct timeval my_tv1, my_tv2;
523         do_gettimeofday(&my_tv1);
524 #endif
525         mutex_lock(&mgr->setup_mutex);
526
527         /* check the pipes concerned and build pipe_array */
528         for (i = 0; i < mgr->num_cards; i++) {
529                 chip = mgr->chip[i];
530                 for (j = 0; j < chip->nb_streams_capt; j++) {
531                         if (pcxhr_stream_scheduled_get_pipe(&chip->capture_stream[j], &pipe))
532                                 capture_mask |= (1 << pipe->first_audio);
533                 }
534                 for (j = 0; j < chip->nb_streams_play; j++) {
535                         if (pcxhr_stream_scheduled_get_pipe(&chip->playback_stream[j], &pipe)) {
536                                 playback_mask |= (1 << pipe->first_audio);
537                                 break;  /* add only once, as all playback streams of
538                                          * one chip use the same pipe
539                                          */
540                         }
541                 }
542         }
543         if (capture_mask == 0 && playback_mask == 0) {
544                 mutex_unlock(&mgr->setup_mutex);
545                 snd_printk(KERN_ERR "pcxhr_trigger_tasklet : no pipes\n");
546                 return;
547         }
548
549         snd_printdd("pcxhr_trigger_tasklet : playback_mask=%x capture_mask=%x\n",
550                     playback_mask, capture_mask);
551
552         /* synchronous stop of all the pipes concerned */
553         err = pcxhr_set_pipe_state(mgr,  playback_mask, capture_mask, 0);
554         if (err) {
555                 mutex_unlock(&mgr->setup_mutex);
556                 snd_printk(KERN_ERR "pcxhr_trigger_tasklet : error stop pipes (P%x C%x)\n",
557                            playback_mask, capture_mask);
558                 return;
559         }
560
561         /* unfortunately the dsp lost format and buffer info with the stop pipe */
562         for (i = 0; i < mgr->num_cards; i++) {
563                 struct pcxhr_stream *stream;
564                 chip = mgr->chip[i];
565                 for (j = 0; j < chip->nb_streams_capt; j++) {
566                         stream = &chip->capture_stream[j];
567                         if (pcxhr_stream_scheduled_get_pipe(stream, &pipe)) {
568                                 err = pcxhr_set_format(stream);
569                                 err = pcxhr_update_r_buffer(stream);
570                         }
571                 }
572                 for (j = 0; j < chip->nb_streams_play; j++) {
573                         stream = &chip->playback_stream[j];
574                         if (pcxhr_stream_scheduled_get_pipe(stream, &pipe)) {
575                                 err = pcxhr_set_format(stream);
576                                 err = pcxhr_update_r_buffer(stream);
577                         }
578                 }
579         }
580         /* start all the streams */
581         for (i = 0; i < mgr->num_cards; i++) {
582                 struct pcxhr_stream *stream;
583                 chip = mgr->chip[i];
584                 for (j = 0; j < chip->nb_streams_capt; j++) {
585                         stream = &chip->capture_stream[j];
586                         if (pcxhr_stream_scheduled_get_pipe(stream, &pipe))
587                                 err = pcxhr_set_stream_state(stream);
588                 }
589                 for (j = 0; j < chip->nb_streams_play; j++) {
590                         stream = &chip->playback_stream[j];
591                         if (pcxhr_stream_scheduled_get_pipe(stream, &pipe))
592                                 err = pcxhr_set_stream_state(stream);
593                 }
594         }
595
596         /* synchronous start of all the pipes concerned */
597         err = pcxhr_set_pipe_state(mgr, playback_mask, capture_mask, 1);
598         if (err) {
599                 mutex_unlock(&mgr->setup_mutex);
600                 snd_printk(KERN_ERR "pcxhr_trigger_tasklet : error start pipes (P%x C%x)\n",
601                            playback_mask, capture_mask);
602                 return;
603         }
604
605         /* put the streams into the running state now (increment pointer by interrupt) */
606         spin_lock_irqsave(&mgr->lock, flags);
607         for ( i =0; i < mgr->num_cards; i++) {
608                 struct pcxhr_stream *stream;
609                 chip = mgr->chip[i];
610                 for(j = 0; j < chip->nb_streams_capt; j++) {
611                         stream = &chip->capture_stream[j];
612                         if(stream->status == PCXHR_STREAM_STATUS_STARTED)
613                                 stream->status = PCXHR_STREAM_STATUS_RUNNING;
614                 }
615                 for (j = 0; j < chip->nb_streams_play; j++) {
616                         stream = &chip->playback_stream[j];
617                         if (stream->status == PCXHR_STREAM_STATUS_STARTED) {
618                                 /* playback will already have advanced ! */
619                                 stream->timer_period_frag += PCXHR_GRANULARITY;
620                                 stream->status = PCXHR_STREAM_STATUS_RUNNING;
621                         }
622                 }
623         }
624         spin_unlock_irqrestore(&mgr->lock, flags);
625
626         mutex_unlock(&mgr->setup_mutex);
627
628 #ifdef CONFIG_SND_DEBUG_DETECT
629         do_gettimeofday(&my_tv2);
630         snd_printdd("***TRIGGER TASKLET*** TIME = %ld (err = %x)\n",
631                     my_tv2.tv_usec - my_tv1.tv_usec, err);
632 #endif
633 }
634
635
636 /*
637  *  trigger callback
638  */
639 static int pcxhr_trigger(struct snd_pcm_substream *subs, int cmd)
640 {
641         struct pcxhr_stream *stream;
642         struct list_head *pos;
643         struct snd_pcm_substream *s;
644         int i;
645
646         switch (cmd) {
647         case SNDRV_PCM_TRIGGER_START:
648                 snd_printdd("SNDRV_PCM_TRIGGER_START\n");
649                 i = 0;
650                 snd_pcm_group_for_each(pos, subs) {
651                         s = snd_pcm_group_substream_entry(pos);
652                         stream = s->runtime->private_data;
653                         stream->status = PCXHR_STREAM_STATUS_SCHEDULE_RUN;
654                         snd_pcm_trigger_done(s, subs);
655                         i++;
656                 }
657                 if (i==1) {
658                         snd_printdd("Only one Substream %c %d\n",
659                                     stream->pipe->is_capture ? 'C' : 'P',
660                                     stream->pipe->first_audio);
661                         if (pcxhr_set_format(stream))
662                                 return -EINVAL;
663                         if (pcxhr_update_r_buffer(stream))
664                                 return -EINVAL;
665
666                         if (pcxhr_set_stream_state(stream))
667                                 return -EINVAL;
668                         stream->status = PCXHR_STREAM_STATUS_RUNNING;
669                 } else {
670                         struct snd_pcxhr *chip = snd_pcm_substream_chip(subs);
671                         tasklet_hi_schedule(&chip->mgr->trigger_taskq);
672                 }
673                 break;
674         case SNDRV_PCM_TRIGGER_STOP:
675                 snd_printdd("SNDRV_PCM_TRIGGER_STOP\n");
676                 snd_pcm_group_for_each(pos, subs) {
677                         s = snd_pcm_group_substream_entry(pos);
678                         stream = s->runtime->private_data;
679                         stream->status = PCXHR_STREAM_STATUS_SCHEDULE_STOP;
680                         if (pcxhr_set_stream_state(stream))
681                                 return -EINVAL;
682                         snd_pcm_trigger_done(s, subs);
683                 }
684                 break;
685         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
686         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
687                 /* TODO */
688         default:
689                 return -EINVAL;
690         }
691         return 0;
692 }
693
694
695 static int pcxhr_hardware_timer(struct pcxhr_mgr *mgr, int start)
696 {
697         struct pcxhr_rmh rmh;
698         int err;
699
700         pcxhr_init_rmh(&rmh, CMD_SET_TIMER_INTERRUPT);
701         if (start) {
702                 mgr->dsp_time_last = PCXHR_DSP_TIME_INVALID;    /* last dsp time invalid */
703                 rmh.cmd[0] |= PCXHR_GRANULARITY;
704         }
705         err = pcxhr_send_msg(mgr, &rmh);
706         if (err < 0)
707                 snd_printk(KERN_ERR "error pcxhr_hardware_timer err(%x)\n", err);
708         return err;
709 }
710
711 /*
712  *  prepare callback for all pcms
713  */
714 static int pcxhr_prepare(struct snd_pcm_substream *subs)
715 {
716         struct snd_pcxhr *chip = snd_pcm_substream_chip(subs);
717         struct pcxhr_mgr *mgr = chip->mgr;
718         /*
719         struct pcxhr_stream *stream = (pcxhr_stream_t*)subs->runtime->private_data;
720         */
721         int err = 0;
722
723         snd_printdd("pcxhr_prepare : period_size(%lx) periods(%x) buffer_size(%lx)\n",
724                     subs->runtime->period_size, subs->runtime->periods,
725                     subs->runtime->buffer_size);
726
727         /*
728         if(subs->runtime->period_size <= PCXHR_GRANULARITY) {
729                 snd_printk(KERN_ERR "pcxhr_prepare : error period_size too small (%x)\n",
730                            (unsigned int)subs->runtime->period_size);
731                 return -EINVAL;
732         }
733         */
734
735         mutex_lock(&mgr->setup_mutex);
736
737         do {
738                 /* if the stream was stopped before, format and buffer were reset */
739                 /*
740                 if(stream->status == PCXHR_STREAM_STATUS_STOPPED) {
741                         err = pcxhr_set_format(stream);
742                         if(err) break;
743                         err = pcxhr_update_r_buffer(stream);
744                         if(err) break;
745                 }
746                 */
747
748                 /* only the first stream can choose the sample rate */
749                 /* the further opened streams will be limited to its frequency (see open) */
750                 /* set the clock only once (first stream) */
751                 if (mgr->sample_rate != subs->runtime->rate) {
752                         err = pcxhr_set_clock(mgr, subs->runtime->rate);
753                         if (err)
754                                 break;
755                         if (mgr->sample_rate == 0)
756                                 /* start the DSP-timer */
757                                 err = pcxhr_hardware_timer(mgr, 1);
758                         mgr->sample_rate = subs->runtime->rate;
759                 }
760         } while(0);     /* do only once (so we can use break instead of goto) */
761
762         mutex_unlock(&mgr->setup_mutex);
763
764         return err;
765 }
766
767
768 /*
769  *  HW_PARAMS callback for all pcms
770  */
771 static int pcxhr_hw_params(struct snd_pcm_substream *subs,
772                            struct snd_pcm_hw_params *hw)
773 {
774         struct snd_pcxhr *chip = snd_pcm_substream_chip(subs);
775         struct pcxhr_mgr *mgr = chip->mgr;
776         struct pcxhr_stream *stream = subs->runtime->private_data;
777         snd_pcm_format_t format;
778         int err;
779         int channels;
780
781         /* set up channels */
782         channels = params_channels(hw);
783
784         /*  set up format for the stream */
785         format = params_format(hw);
786
787         mutex_lock(&mgr->setup_mutex);
788
789         stream->channels = channels;
790         stream->format = format;
791
792         /* set the format to the board */
793         /*
794         err = pcxhr_set_format(stream);
795         if(err) {
796                 mutex_unlock(&mgr->setup_mutex);
797                 return err;
798         }
799         */
800         /* allocate buffer */
801         err = snd_pcm_lib_malloc_pages(subs, params_buffer_bytes(hw));
802
803         /*
804         if (err > 0) {
805                 err = pcxhr_update_r_buffer(stream);
806         }
807         */
808         mutex_unlock(&mgr->setup_mutex);
809
810         return err;
811 }
812
813 static int pcxhr_hw_free(struct snd_pcm_substream *subs)
814 {
815         snd_pcm_lib_free_pages(subs);
816         return 0;
817 }
818
819
820 /*
821  *  CONFIGURATION SPACE for all pcms, mono pcm must update channels_max
822  */
823 static struct snd_pcm_hardware pcxhr_caps =
824 {
825         .info             = ( SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
826                               SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_SYNC_START |
827                               0 /*SNDRV_PCM_INFO_PAUSE*/),
828         .formats          = ( SNDRV_PCM_FMTBIT_U8 |
829                               SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE |
830                               SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE |
831                               SNDRV_PCM_FMTBIT_FLOAT_LE ),
832         .rates            = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_192000,
833         .rate_min         = 8000,
834         .rate_max         = 192000,
835         .channels_min     = 1,
836         .channels_max     = 2,
837         .buffer_bytes_max = (32*1024),
838         /* 1 byte == 1 frame U8 mono (PCXHR_GRANULARITY is frames!) */
839         .period_bytes_min = (2*PCXHR_GRANULARITY),
840         .period_bytes_max = (16*1024),
841         .periods_min      = 2,
842         .periods_max      = (32*1024/PCXHR_GRANULARITY),
843 };
844
845
846 static int pcxhr_open(struct snd_pcm_substream *subs)
847 {
848         struct snd_pcxhr       *chip = snd_pcm_substream_chip(subs);
849         struct pcxhr_mgr       *mgr = chip->mgr;
850         struct snd_pcm_runtime *runtime = subs->runtime;
851         struct pcxhr_stream    *stream;
852         int                 is_capture;
853
854         mutex_lock(&mgr->setup_mutex);
855
856         /* copy the struct snd_pcm_hardware struct */
857         runtime->hw = pcxhr_caps;
858
859         if( subs->stream == SNDRV_PCM_STREAM_PLAYBACK ) {
860                 snd_printdd("pcxhr_open playback chip%d subs%d\n",
861                             chip->chip_idx, subs->number);
862                 is_capture = 0;
863                 stream = &chip->playback_stream[subs->number];
864         } else {
865                 snd_printdd("pcxhr_open capture chip%d subs%d\n",
866                             chip->chip_idx, subs->number);
867                 is_capture = 1;
868                 if (mgr->mono_capture)
869                         runtime->hw.channels_max = 1;
870                 else
871                         runtime->hw.channels_min = 2;
872                 stream = &chip->capture_stream[subs->number];
873         }
874         if (stream->status != PCXHR_STREAM_STATUS_FREE){
875                 /* streams in use */
876                 snd_printk(KERN_ERR "pcxhr_open chip%d subs%d in use\n",
877                            chip->chip_idx, subs->number);
878                 mutex_unlock(&mgr->setup_mutex);
879                 return -EBUSY;
880         }
881
882         /* if a sample rate is already used or fixed by external clock,
883          * the stream cannot change
884          */
885         if (mgr->sample_rate)
886                 runtime->hw.rate_min = runtime->hw.rate_max = mgr->sample_rate;
887         else {
888                 if (mgr->use_clock_type != PCXHR_CLOCK_TYPE_INTERNAL) {
889                         int external_rate;
890                         if (pcxhr_get_external_clock(mgr, mgr->use_clock_type,
891                                                      &external_rate) ||
892                             external_rate == 0) {
893                                 /* cannot detect the external clock rate */
894                                 mutex_unlock(&mgr->setup_mutex);
895                                 return -EBUSY;
896                         }
897                         runtime->hw.rate_min = runtime->hw.rate_max = external_rate;
898                 }
899         }
900
901         stream->status      = PCXHR_STREAM_STATUS_OPEN;
902         stream->substream   = subs;
903         stream->channels    = 0; /* not configured yet */
904
905         runtime->private_data = stream;
906
907         snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 4);
908         snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 4);
909
910         mgr->ref_count_rate++;
911
912         mutex_unlock(&mgr->setup_mutex);
913         return 0;
914 }
915
916
917 static int pcxhr_close(struct snd_pcm_substream *subs)
918 {
919         struct snd_pcxhr *chip = snd_pcm_substream_chip(subs);
920         struct pcxhr_mgr *mgr = chip->mgr;
921         struct pcxhr_stream *stream = subs->runtime->private_data;
922
923         mutex_lock(&mgr->setup_mutex);
924
925         snd_printdd("pcxhr_close chip%d subs%d\n", chip->chip_idx, subs->number);
926
927         /* sample rate released */
928         if (--mgr->ref_count_rate == 0) {
929                 mgr->sample_rate = 0;           /* the sample rate is no more locked */
930                 pcxhr_hardware_timer(mgr, 0);   /* stop the DSP-timer */
931         }
932
933         stream->status    = PCXHR_STREAM_STATUS_FREE;
934         stream->substream = NULL;
935
936         mutex_unlock(&mgr->setup_mutex);
937
938         return 0;
939 }
940
941
942 static snd_pcm_uframes_t pcxhr_stream_pointer(struct snd_pcm_substream *subs)
943 {
944         unsigned long flags;
945         u_int32_t timer_period_frag;
946         int timer_buf_periods;
947         struct snd_pcxhr *chip = snd_pcm_substream_chip(subs);
948         struct snd_pcm_runtime *runtime = subs->runtime;
949         struct pcxhr_stream *stream  = runtime->private_data;
950
951         spin_lock_irqsave(&chip->mgr->lock, flags);
952
953         /* get the period fragment and the nb of periods in the buffer */
954         timer_period_frag = stream->timer_period_frag;
955         timer_buf_periods = stream->timer_buf_periods;
956
957         spin_unlock_irqrestore(&chip->mgr->lock, flags);
958
959         return (snd_pcm_uframes_t)((timer_buf_periods * runtime->period_size) +
960                                    timer_period_frag);
961 }
962
963
964 static struct snd_pcm_ops pcxhr_ops = {
965         .open      = pcxhr_open,
966         .close     = pcxhr_close,
967         .ioctl     = snd_pcm_lib_ioctl,
968         .prepare   = pcxhr_prepare,
969         .hw_params = pcxhr_hw_params,
970         .hw_free   = pcxhr_hw_free,
971         .trigger   = pcxhr_trigger,
972         .pointer   = pcxhr_stream_pointer,
973 };
974
975 /*
976  */
977 int pcxhr_create_pcm(struct snd_pcxhr *chip)
978 {
979         int err;
980         struct snd_pcm *pcm;
981         char name[32];
982
983         sprintf(name, "pcxhr %d", chip->chip_idx);
984         if ((err = snd_pcm_new(chip->card, name, 0,
985                                chip->nb_streams_play,
986                                chip->nb_streams_capt, &pcm)) < 0) {
987                 snd_printk(KERN_ERR "cannot create pcm %s\n", name);
988                 return err;
989         }
990         pcm->private_data = chip;
991
992         if (chip->nb_streams_play)
993                 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &pcxhr_ops);
994         if (chip->nb_streams_capt)
995                 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &pcxhr_ops);
996
997         pcm->info_flags = 0;
998         strcpy(pcm->name, name);
999
1000         snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1001                                               snd_dma_pci_data(chip->mgr->pci),
1002                                               32*1024, 32*1024);
1003         chip->pcm = pcm;
1004         return 0;
1005 }
1006
1007 static int pcxhr_chip_free(struct snd_pcxhr *chip)
1008 {
1009         kfree(chip);
1010         return 0;
1011 }
1012
1013 static int pcxhr_chip_dev_free(struct snd_device *device)
1014 {
1015         struct snd_pcxhr *chip = device->device_data;
1016         return pcxhr_chip_free(chip);
1017 }
1018
1019
1020 /*
1021  */
1022 static int __devinit pcxhr_create(struct pcxhr_mgr *mgr, struct snd_card *card, int idx)
1023 {
1024         int err;
1025         struct snd_pcxhr *chip;
1026         static struct snd_device_ops ops = {
1027                 .dev_free = pcxhr_chip_dev_free,
1028         };
1029
1030         mgr->chip[idx] = chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1031         if (! chip) {
1032                 snd_printk(KERN_ERR "cannot allocate chip\n");
1033                 return -ENOMEM;
1034         }
1035
1036         chip->card = card;
1037         chip->chip_idx = idx;
1038         chip->mgr = mgr;
1039
1040         if (idx < mgr->playback_chips)
1041                 /* stereo or mono streams */
1042                 chip->nb_streams_play = PCXHR_PLAYBACK_STREAMS;
1043
1044         if (idx < mgr->capture_chips) {
1045                 if (mgr->mono_capture)
1046                         chip->nb_streams_capt = 2;      /* 2 mono streams (left+right) */
1047                 else
1048                         chip->nb_streams_capt = 1;      /* or 1 stereo stream */
1049         }
1050
1051         if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1052                 pcxhr_chip_free(chip);
1053                 return err;
1054         }
1055
1056         snd_card_set_dev(card, &mgr->pci->dev);
1057
1058         return 0;
1059 }
1060
1061 /* proc interface */
1062 static void pcxhr_proc_info(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
1063 {
1064         struct snd_pcxhr *chip = entry->private_data;
1065         struct pcxhr_mgr *mgr = chip->mgr;
1066
1067         snd_iprintf(buffer, "\n%s\n", mgr->longname);
1068
1069         /* stats available when embedded DSP is running */
1070         if (mgr->dsp_loaded & (1 << PCXHR_FIRMWARE_DSP_MAIN_INDEX)) {
1071                 struct pcxhr_rmh rmh;
1072                 short ver_maj = (mgr->dsp_version >> 16) & 0xff;
1073                 short ver_min = (mgr->dsp_version >> 8) & 0xff;
1074                 short ver_build = mgr->dsp_version & 0xff;
1075                 snd_iprintf(buffer, "module version %s\n", PCXHR_DRIVER_VERSION_STRING);
1076                 snd_iprintf(buffer, "dsp version %d.%d.%d\n", ver_maj, ver_min, ver_build);
1077                 if (mgr->board_has_analog)
1078                         snd_iprintf(buffer, "analog io available\n");
1079                 else
1080                         snd_iprintf(buffer, "digital only board\n");
1081
1082                 /* calc cpu load of the dsp */
1083                 pcxhr_init_rmh(&rmh, CMD_GET_DSP_RESOURCES);
1084                 if( ! pcxhr_send_msg(mgr, &rmh) ) {
1085                         int cur = rmh.stat[0];
1086                         int ref = rmh.stat[1];
1087                         if (ref > 0) {
1088                                 if (mgr->sample_rate_real != 0 &&
1089                                     mgr->sample_rate_real != 48000) {
1090                                         ref = (ref * 48000) / mgr->sample_rate_real;
1091                                         if (mgr->sample_rate_real >= PCXHR_IRQ_TIMER_FREQ)
1092                                                 ref *= 2;
1093                                 }
1094                                 cur = 100 - (100 * cur) / ref;
1095                                 snd_iprintf(buffer, "cpu load    %d%%\n", cur);
1096                                 snd_iprintf(buffer, "buffer pool %d/%d kWords\n",
1097                                             rmh.stat[2], rmh.stat[3]);
1098                         }
1099                 }
1100                 snd_iprintf(buffer, "dma granularity : %d\n", PCXHR_GRANULARITY);
1101                 snd_iprintf(buffer, "dsp time errors : %d\n", mgr->dsp_time_err);
1102                 snd_iprintf(buffer, "dsp async pipe xrun errors : %d\n",
1103                             mgr->async_err_pipe_xrun);
1104                 snd_iprintf(buffer, "dsp async stream xrun errors : %d\n",
1105                             mgr->async_err_stream_xrun);
1106                 snd_iprintf(buffer, "dsp async last other error : %x\n",
1107                             mgr->async_err_other_last);
1108                 /* debug zone dsp */
1109                 rmh.cmd[0] = 0x4200 + PCXHR_SIZE_MAX_STATUS;
1110                 rmh.cmd_len = 1;
1111                 rmh.stat_len = PCXHR_SIZE_MAX_STATUS;
1112                 rmh.dsp_stat = 0;
1113                 rmh.cmd_idx = CMD_LAST_INDEX;
1114                 if( ! pcxhr_send_msg(mgr, &rmh) ) {
1115                         int i;
1116                         for (i = 0; i < rmh.stat_len; i++)
1117                                 snd_iprintf(buffer, "debug[%02d] = %06x\n", i,  rmh.stat[i]);
1118                 }
1119         } else
1120                 snd_iprintf(buffer, "no firmware loaded\n");
1121         snd_iprintf(buffer, "\n");
1122 }
1123 static void pcxhr_proc_sync(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
1124 {
1125         struct snd_pcxhr *chip = entry->private_data;
1126         struct pcxhr_mgr *mgr = chip->mgr;
1127         static char *texts[7] = {
1128                 "Internal", "Word", "AES Sync", "AES 1", "AES 2", "AES 3", "AES 4"
1129         };
1130
1131         snd_iprintf(buffer, "\n%s\n", mgr->longname);
1132         snd_iprintf(buffer, "Current Sample Clock\t: %s\n", texts[mgr->cur_clock_type]);
1133         snd_iprintf(buffer, "Current Sample Rate\t= %d\n", mgr->sample_rate_real);
1134
1135         /* commands available when embedded DSP is running */
1136         if (mgr->dsp_loaded & (1 << PCXHR_FIRMWARE_DSP_MAIN_INDEX)) {
1137                 int i, err, sample_rate;
1138                 for (i = PCXHR_CLOCK_TYPE_WORD_CLOCK; i< (3 + mgr->capture_chips); i++) {
1139                         err = pcxhr_get_external_clock(mgr, i, &sample_rate);
1140                         if (err)
1141                                 break;
1142                         snd_iprintf(buffer, "%s Clock\t\t= %d\n", texts[i], sample_rate);
1143                 }
1144         } else
1145                 snd_iprintf(buffer, "no firmware loaded\n");
1146         snd_iprintf(buffer, "\n");
1147 }
1148
1149 static void __devinit pcxhr_proc_init(struct snd_pcxhr *chip)
1150 {
1151         struct snd_info_entry *entry;
1152
1153         if (! snd_card_proc_new(chip->card, "info", &entry))
1154                 snd_info_set_text_ops(entry, chip, 1024, pcxhr_proc_info);
1155         if (! snd_card_proc_new(chip->card, "sync", &entry))
1156                 snd_info_set_text_ops(entry, chip, 1024, pcxhr_proc_sync);
1157 }
1158 /* end of proc interface */
1159
1160 /*
1161  * release all the cards assigned to a manager instance
1162  */
1163 static int pcxhr_free(struct pcxhr_mgr *mgr)
1164 {
1165         unsigned int i;
1166
1167         for (i = 0; i < mgr->num_cards; i++) {
1168                 if (mgr->chip[i])
1169                         snd_card_free(mgr->chip[i]->card);
1170         }
1171
1172         /* reset board if some firmware was loaded */
1173         if(mgr->dsp_loaded) {
1174                 pcxhr_reset_board(mgr);
1175                 snd_printdd("reset pcxhr !\n");
1176         }
1177
1178         /* release irq  */
1179         if (mgr->irq >= 0)
1180                 free_irq(mgr->irq, mgr);
1181
1182         pci_release_regions(mgr->pci);
1183
1184         /* free hostport purgebuffer */
1185         if (mgr->hostport.area) {
1186                 snd_dma_free_pages(&mgr->hostport);
1187                 mgr->hostport.area = NULL;
1188         }
1189
1190         kfree(mgr->prmh);
1191
1192         pci_disable_device(mgr->pci);
1193         kfree(mgr);
1194         return 0;
1195 }
1196
1197 /*
1198  *    probe function - creates the card manager
1199  */
1200 static int __devinit pcxhr_probe(struct pci_dev *pci, const struct pci_device_id *pci_id)
1201 {
1202         static int dev;
1203         struct pcxhr_mgr *mgr;
1204         unsigned int i;
1205         int err;
1206         size_t size;
1207         char *card_name;
1208
1209         if (dev >= SNDRV_CARDS)
1210                 return -ENODEV;
1211         if (! enable[dev]) {
1212                 dev++;
1213                 return -ENOENT;
1214         }
1215
1216         /* enable PCI device */
1217         if ((err = pci_enable_device(pci)) < 0)
1218                 return err;
1219         pci_set_master(pci);
1220
1221         /* check if we can restrict PCI DMA transfers to 32 bits */
1222         if (pci_set_dma_mask(pci, DMA_32BIT_MASK) < 0) {
1223                 snd_printk(KERN_ERR "architecture does not support 32bit PCI busmaster DMA\n");
1224                 pci_disable_device(pci);
1225                 return -ENXIO;
1226         }
1227
1228         /* alloc card manager */
1229         mgr = kzalloc(sizeof(*mgr), GFP_KERNEL);
1230         if (! mgr) {
1231                 pci_disable_device(pci);
1232                 return -ENOMEM;
1233         }
1234
1235         snd_assert(pci_id->driver_data < PCI_ID_LAST, return -ENODEV);
1236         card_name = pcxhr_board_params[pci_id->driver_data].board_name;
1237         mgr->playback_chips = pcxhr_board_params[pci_id->driver_data].playback_chips;
1238         mgr->capture_chips  = pcxhr_board_params[pci_id->driver_data].capture_chips;
1239         mgr->firmware_num  = pcxhr_board_params[pci_id->driver_data].firmware_num;
1240         mgr->mono_capture = mono[dev];
1241
1242         /* resource assignment */
1243         if ((err = pci_request_regions(pci, card_name)) < 0) {
1244                 kfree(mgr);
1245                 pci_disable_device(pci);
1246                 return err;
1247         }
1248         for (i = 0; i < 3; i++)
1249                 mgr->port[i] = pci_resource_start(pci, i);
1250
1251         mgr->pci = pci;
1252         mgr->irq = -1;
1253
1254         if (request_irq(pci->irq, pcxhr_interrupt, SA_INTERRUPT|SA_SHIRQ,
1255                         card_name, mgr)) {
1256                 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1257                 pcxhr_free(mgr);
1258                 return -EBUSY;
1259         }
1260         mgr->irq = pci->irq;
1261
1262         sprintf(mgr->shortname, "Digigram %s", card_name);
1263         sprintf(mgr->longname, "%s at 0x%lx & 0x%lx, 0x%lx irq %i", mgr->shortname,
1264                 mgr->port[0], mgr->port[1], mgr->port[2], mgr->irq);
1265
1266         /* ISR spinlock  */
1267         spin_lock_init(&mgr->lock);
1268         spin_lock_init(&mgr->msg_lock);
1269
1270         /* init setup mutex*/
1271         mutex_init(&mgr->setup_mutex);
1272
1273         /* init taslket */
1274         tasklet_init(&mgr->msg_taskq, pcxhr_msg_tasklet, (unsigned long) mgr);
1275         tasklet_init(&mgr->trigger_taskq, pcxhr_trigger_tasklet, (unsigned long) mgr);
1276         mgr->prmh = kmalloc(sizeof(*mgr->prmh) + 
1277                             sizeof(u32) * (PCXHR_SIZE_MAX_LONG_STATUS - PCXHR_SIZE_MAX_STATUS),
1278                             GFP_KERNEL);
1279         if (! mgr->prmh) {
1280                 pcxhr_free(mgr);
1281                 return -ENOMEM;
1282         }
1283
1284         for (i=0; i < PCXHR_MAX_CARDS; i++) {
1285                 struct snd_card *card;
1286                 char tmpid[16];
1287                 int idx;
1288
1289                 if (i >= max(mgr->playback_chips, mgr->capture_chips))
1290                         break;
1291                 mgr->num_cards++;
1292
1293                 if (index[dev] < 0)
1294                         idx = index[dev];
1295                 else
1296                         idx = index[dev] + i;
1297
1298                 snprintf(tmpid, sizeof(tmpid), "%s-%d", id[dev] ? id[dev] : card_name, i);
1299                 card = snd_card_new(idx, tmpid, THIS_MODULE, 0);
1300
1301                 if (! card) {
1302                         snd_printk(KERN_ERR "cannot allocate the card %d\n", i);
1303                         pcxhr_free(mgr);
1304                         return -ENOMEM;
1305                 }
1306
1307                 strcpy(card->driver, DRIVER_NAME);
1308                 sprintf(card->shortname, "%s [PCM #%d]", mgr->shortname, i);
1309                 sprintf(card->longname, "%s [PCM #%d]", mgr->longname, i);
1310
1311                 if ((err = pcxhr_create(mgr, card, i)) < 0) {
1312                         pcxhr_free(mgr);
1313                         return err;
1314                 }
1315
1316                 if (i == 0)
1317                         /* init proc interface only for chip0 */
1318                         pcxhr_proc_init(mgr->chip[i]);
1319
1320                 if ((err = snd_card_register(card)) < 0) {
1321                         pcxhr_free(mgr);
1322                         return err;
1323                 }
1324         }
1325
1326         /* create hostport purgebuffer */
1327         size = PAGE_ALIGN(sizeof(struct pcxhr_hostport));
1328         if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1329                                 size, &mgr->hostport) < 0) {
1330                 pcxhr_free(mgr);
1331                 return -ENOMEM;
1332         }
1333         /* init purgebuffer */
1334         memset(mgr->hostport.area, 0, size);
1335
1336         /* create a DSP loader */
1337         err = pcxhr_setup_firmware(mgr);
1338         if (err < 0) {
1339                 pcxhr_free(mgr);
1340                 return err;
1341         }
1342
1343         pci_set_drvdata(pci, mgr);
1344         dev++;
1345         return 0;
1346 }
1347
1348 static void __devexit pcxhr_remove(struct pci_dev *pci)
1349 {
1350         pcxhr_free(pci_get_drvdata(pci));
1351         pci_set_drvdata(pci, NULL);
1352 }
1353
1354 static struct pci_driver driver = {
1355         .name = "Digigram pcxhr",
1356         .id_table = pcxhr_ids,
1357         .probe = pcxhr_probe,
1358         .remove = __devexit_p(pcxhr_remove),
1359 };
1360
1361 static int __init pcxhr_module_init(void)
1362 {
1363         return pci_register_driver(&driver);
1364 }
1365
1366 static void __exit pcxhr_module_exit(void)
1367 {
1368         pci_unregister_driver(&driver);
1369 }
1370
1371 module_init(pcxhr_module_init)
1372 module_exit(pcxhr_module_exit)