2 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
4 * Routines for control of EMU10K1 chips
6 * Copyright (c) by James Courtier-Dutton <James@superbug.co.uk>
7 * Added support for Audigy 2 Value.
8 * Added EMU 1010 support.
9 * General bug fixes and enhancements.
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
34 #include <linux/sched.h>
35 #include <linux/kthread.h>
36 #include <linux/delay.h>
37 #include <linux/init.h>
38 #include <linux/interrupt.h>
39 #include <linux/pci.h>
40 #include <linux/slab.h>
41 #include <linux/vmalloc.h>
42 #include <linux/mutex.h>
45 #include <sound/core.h>
46 #include <sound/emu10k1.h>
47 #include <linux/firmware.h>
53 #define HANA_FILENAME "emu/hana.fw"
54 #define DOCK_FILENAME "emu/audio_dock.fw"
55 #define EMU1010B_FILENAME "emu/emu1010b.fw"
56 #define MICRO_DOCK_FILENAME "emu/micro_dock.fw"
57 #define EMU0404_FILENAME "emu/emu0404.fw"
58 #define EMU1010_NOTEBOOK_FILENAME "emu/emu1010_notebook.fw"
60 MODULE_FIRMWARE(HANA_FILENAME);
61 MODULE_FIRMWARE(DOCK_FILENAME);
62 MODULE_FIRMWARE(EMU1010B_FILENAME);
63 MODULE_FIRMWARE(MICRO_DOCK_FILENAME);
64 MODULE_FIRMWARE(EMU0404_FILENAME);
65 MODULE_FIRMWARE(EMU1010_NOTEBOOK_FILENAME);
68 /*************************************************************************
70 *************************************************************************/
72 void snd_emu10k1_voice_init(struct snd_emu10k1 * emu, int ch)
74 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
75 snd_emu10k1_ptr_write(emu, IP, ch, 0);
76 snd_emu10k1_ptr_write(emu, VTFT, ch, 0xffff);
77 snd_emu10k1_ptr_write(emu, CVCF, ch, 0xffff);
78 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
79 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
80 snd_emu10k1_ptr_write(emu, CCR, ch, 0);
82 snd_emu10k1_ptr_write(emu, PSST, ch, 0);
83 snd_emu10k1_ptr_write(emu, DSL, ch, 0x10);
84 snd_emu10k1_ptr_write(emu, CCCA, ch, 0);
85 snd_emu10k1_ptr_write(emu, Z1, ch, 0);
86 snd_emu10k1_ptr_write(emu, Z2, ch, 0);
87 snd_emu10k1_ptr_write(emu, FXRT, ch, 0x32100000);
89 snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0);
90 snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0);
91 snd_emu10k1_ptr_write(emu, IFATN, ch, 0xffff);
92 snd_emu10k1_ptr_write(emu, PEFE, ch, 0);
93 snd_emu10k1_ptr_write(emu, FMMOD, ch, 0);
94 snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24); /* 1 Hz */
95 snd_emu10k1_ptr_write(emu, FM2FRQ2, ch, 24); /* 1 Hz */
96 snd_emu10k1_ptr_write(emu, TEMPENV, ch, 0);
98 /*** these are last so OFF prevents writing ***/
99 snd_emu10k1_ptr_write(emu, LFOVAL2, ch, 0);
100 snd_emu10k1_ptr_write(emu, LFOVAL1, ch, 0);
101 snd_emu10k1_ptr_write(emu, ATKHLDV, ch, 0);
102 snd_emu10k1_ptr_write(emu, ENVVOL, ch, 0);
103 snd_emu10k1_ptr_write(emu, ENVVAL, ch, 0);
105 /* Audigy extra stuffs */
107 snd_emu10k1_ptr_write(emu, 0x4c, ch, 0); /* ?? */
108 snd_emu10k1_ptr_write(emu, 0x4d, ch, 0); /* ?? */
109 snd_emu10k1_ptr_write(emu, 0x4e, ch, 0); /* ?? */
110 snd_emu10k1_ptr_write(emu, 0x4f, ch, 0); /* ?? */
111 snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100);
112 snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x3f3f3f3f);
113 snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0);
117 static unsigned int spi_dac_init[] = {
141 static unsigned int i2c_adc_init[][2] = {
142 { 0x17, 0x00 }, /* Reset */
143 { 0x07, 0x00 }, /* Timeout */
144 { 0x0b, 0x22 }, /* Interface control */
145 { 0x0c, 0x22 }, /* Master mode control */
146 { 0x0d, 0x08 }, /* Powerdown control */
147 { 0x0e, 0xcf }, /* Attenuation Left 0x01 = -103dB, 0xff = 24dB */
148 { 0x0f, 0xcf }, /* Attenuation Right 0.5dB steps */
149 { 0x10, 0x7b }, /* ALC Control 1 */
150 { 0x11, 0x00 }, /* ALC Control 2 */
151 { 0x12, 0x32 }, /* ALC Control 3 */
152 { 0x13, 0x00 }, /* Noise gate control */
153 { 0x14, 0xa6 }, /* Limiter control */
154 { 0x15, ADC_MUX_2 }, /* ADC Mixer control. Mic for Audigy 2 ZS Notebook */
157 static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir, int resume)
159 unsigned int silent_page;
163 /* disable audio and lock cache */
164 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE,
167 /* reset recording buffers */
168 snd_emu10k1_ptr_write(emu, MICBS, 0, ADCBS_BUFSIZE_NONE);
169 snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
170 snd_emu10k1_ptr_write(emu, FXBS, 0, ADCBS_BUFSIZE_NONE);
171 snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
172 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
173 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
175 /* disable channel interrupt */
176 outl(0, emu->port + INTE);
177 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
178 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
179 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
180 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
183 /* set SPDIF bypass mode */
184 snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT);
185 /* enable rear left + rear right AC97 slots */
186 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT |
190 /* init envelope engine */
191 for (ch = 0; ch < NUM_G; ch++)
192 snd_emu10k1_voice_init(emu, ch);
194 snd_emu10k1_ptr_write(emu, SPCS0, 0, emu->spdif_bits[0]);
195 snd_emu10k1_ptr_write(emu, SPCS1, 0, emu->spdif_bits[1]);
196 snd_emu10k1_ptr_write(emu, SPCS2, 0, emu->spdif_bits[2]);
198 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
199 /* Hacks for Alice3 to work independent of haP16V driver */
200 //Setup SRCMulti_I2S SamplingRate
201 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
204 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
206 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
207 snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14);
208 /* Setup SRCMulti Input Audio Enable */
209 /* Use 0xFFFFFFFF to enable P16V sounds. */
210 snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF);
212 /* Enabled Phased (8-channel) P16V playback */
213 outl(0x0201, emu->port + HCFG2);
214 /* Set playback routing. */
215 snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4);
217 if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */
218 /* Hacks for Alice3 to work independent of haP16V driver */
219 snd_printk(KERN_INFO "Audigy2 value: Special config.\n");
220 //Setup SRCMulti_I2S SamplingRate
221 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
224 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
226 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
227 outl(0x600000, emu->port + 0x20);
228 outl(0x14, emu->port + 0x24);
230 /* Setup SRCMulti Input Audio Enable */
231 outl(0x7b0000, emu->port + 0x20);
232 outl(0xFF000000, emu->port + 0x24);
234 /* Setup SPDIF Out Audio Enable */
235 /* The Audigy 2 Value has a separate SPDIF out,
236 * so no need for a mixer switch
238 outl(0x7a0000, emu->port + 0x20);
239 outl(0xFF000000, emu->port + 0x24);
240 tmp = inl(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */
241 outl(tmp, emu->port + A_IOCFG);
243 if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */
246 size = ARRAY_SIZE(spi_dac_init);
247 for (n = 0; n < size; n++)
248 snd_emu10k1_spi_write(emu, spi_dac_init[n]);
250 snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10);
253 * GPIO1: Speakers-enabled.
256 * GPIO4: IEC958 Output on.
261 outl(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */
264 if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */
267 snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f);
268 tmp = inl(emu->port + A_IOCFG);
269 outl(tmp | 0x4, emu->port + A_IOCFG); /* Set bit 2 for mic input */
270 tmp = inl(emu->port + A_IOCFG);
271 size = ARRAY_SIZE(i2c_adc_init);
272 for (n = 0; n < size; n++)
273 snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]);
274 for (n=0; n < 4; n++) {
275 emu->i2c_capture_volume[n][0]= 0xcf;
276 emu->i2c_capture_volume[n][1]= 0xcf;
282 snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr);
283 snd_emu10k1_ptr_write(emu, TCB, 0, 0); /* taken from original driver */
284 snd_emu10k1_ptr_write(emu, TCBS, 0, 4); /* taken from original driver */
286 silent_page = (emu->silent_page.addr << 1) | MAP_PTI_MASK;
287 for (ch = 0; ch < NUM_G; ch++) {
288 snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page);
289 snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page);
292 if (emu->card_capabilities->emu_model) {
293 outl(HCFG_AUTOMUTE_ASYNC |
295 HCFG_AUDIOENABLE, emu->port + HCFG);
298 * Mute Disable Audio = 0
299 * Lock Tank Memory = 1
300 * Lock Sound Memory = 0
303 } else if (emu->audigy) {
304 if (emu->revision == 4) /* audigy2 */
305 outl(HCFG_AUDIOENABLE |
306 HCFG_AC3ENABLE_CDSPDIF |
307 HCFG_AC3ENABLE_GPSPDIF |
308 HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
310 outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
311 /* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
312 * e.g. card_capabilities->joystick */
313 } else if (emu->model == 0x20 ||
314 emu->model == 0xc400 ||
315 (emu->model == 0x21 && emu->revision < 6))
316 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG);
318 // With on-chip joystick
319 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
321 if (enable_ir) { /* enable IR for SB Live */
322 if (emu->card_capabilities->emu_model) {
323 ; /* Disable all access to A_IOCFG for the emu1010 */
324 } else if (emu->card_capabilities->i2c_adc) {
325 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
326 } else if (emu->audigy) {
327 unsigned int reg = inl(emu->port + A_IOCFG);
328 outl(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
330 outl(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
332 outl(reg, emu->port + A_IOCFG);
334 unsigned int reg = inl(emu->port + HCFG);
335 outl(reg | HCFG_GPOUT2, emu->port + HCFG);
337 outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG);
339 outl(reg, emu->port + HCFG);
343 if (emu->card_capabilities->emu_model) {
344 ; /* Disable all access to A_IOCFG for the emu1010 */
345 } else if (emu->card_capabilities->i2c_adc) {
346 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
347 } else if (emu->audigy) { /* enable analog output */
348 unsigned int reg = inl(emu->port + A_IOCFG);
349 outl(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG);
355 static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu)
358 * Enable the audio bit
360 outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG);
362 /* Enable analog/digital outs on audigy */
363 if (emu->card_capabilities->emu_model) {
364 ; /* Disable all access to A_IOCFG for the emu1010 */
365 } else if (emu->card_capabilities->i2c_adc) {
366 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
367 } else if (emu->audigy) {
368 outl(inl(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG);
370 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
371 /* Unmute Analog now. Set GPO6 to 1 for Apollo.
372 * This has to be done after init ALice3 I2SOut beyond 48KHz.
373 * So, sequence is important. */
374 outl(inl(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG);
375 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */
376 /* Unmute Analog now. */
377 outl(inl(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG);
379 /* Disable routing from AC97 line out to Front speakers */
380 outl(inl(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG);
387 /* FIXME: the following routine disables LiveDrive-II !! */
390 tmp = inl(emu->port + HCFG);
391 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
392 outl(tmp|0x800, emu->port + HCFG);
394 if (tmp != (inl(emu->port + HCFG) & ~0x800)) {
396 outl(tmp, emu->port + HCFG);
402 snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE);
405 int snd_emu10k1_done(struct snd_emu10k1 * emu)
409 outl(0, emu->port + INTE);
414 for (ch = 0; ch < NUM_G; ch++)
415 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
416 for (ch = 0; ch < NUM_G; ch++) {
417 snd_emu10k1_ptr_write(emu, VTFT, ch, 0);
418 snd_emu10k1_ptr_write(emu, CVCF, ch, 0);
419 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
420 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
423 /* reset recording buffers */
424 snd_emu10k1_ptr_write(emu, MICBS, 0, 0);
425 snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
426 snd_emu10k1_ptr_write(emu, FXBS, 0, 0);
427 snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
428 snd_emu10k1_ptr_write(emu, FXWC, 0, 0);
429 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
430 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
431 snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K);
432 snd_emu10k1_ptr_write(emu, TCB, 0, 0);
434 snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP);
436 snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP);
438 /* disable channel interrupt */
439 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
440 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
441 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
442 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
444 /* disable audio and lock cache */
445 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
446 snd_emu10k1_ptr_write(emu, PTB, 0, 0);
451 /*************************************************************************
452 * ECARD functional implementation
453 *************************************************************************/
455 /* In A1 Silicon, these bits are in the HC register */
456 #define HOOKN_BIT (1L << 12)
457 #define HANDN_BIT (1L << 11)
458 #define PULSEN_BIT (1L << 10)
460 #define EC_GDI1 (1 << 13)
461 #define EC_GDI0 (1 << 14)
463 #define EC_NUM_CONTROL_BITS 20
465 #define EC_AC3_DATA_SELN 0x0001L
466 #define EC_EE_DATA_SEL 0x0002L
467 #define EC_EE_CNTRL_SELN 0x0004L
468 #define EC_EECLK 0x0008L
469 #define EC_EECS 0x0010L
470 #define EC_EESDO 0x0020L
471 #define EC_TRIM_CSN 0x0040L
472 #define EC_TRIM_SCLK 0x0080L
473 #define EC_TRIM_SDATA 0x0100L
474 #define EC_TRIM_MUTEN 0x0200L
475 #define EC_ADCCAL 0x0400L
476 #define EC_ADCRSTN 0x0800L
477 #define EC_DACCAL 0x1000L
478 #define EC_DACMUTEN 0x2000L
479 #define EC_LEDN 0x4000L
481 #define EC_SPDIF0_SEL_SHIFT 15
482 #define EC_SPDIF1_SEL_SHIFT 17
483 #define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT)
484 #define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT)
485 #define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
486 #define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
487 #define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should
488 * be incremented any time the EEPROM's
489 * format is changed. */
491 #define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */
493 /* Addresses for special values stored in to EEPROM */
494 #define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */
495 #define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */
496 #define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */
498 #define EC_LAST_PROMFILE_ADDR 0x2f
500 #define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The
501 * can be up to 30 characters in length
502 * and is stored as a NULL-terminated
503 * ASCII string. Any unused bytes must be
504 * filled with zeros */
505 #define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */
508 /* Most of this stuff is pretty self-evident. According to the hardware
509 * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
510 * offset problem. Weird.
512 #define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
516 #define EC_DEFAULT_ADC_GAIN 0xC4C4
517 #define EC_DEFAULT_SPDIF0_SEL 0x0
518 #define EC_DEFAULT_SPDIF1_SEL 0x4
520 /**************************************************************************
521 * @func Clock bits into the Ecard's control latch. The Ecard uses a
522 * control latch will is loaded bit-serially by toggling the Modem control
523 * lines from function 2 on the E8010. This function hides these details
524 * and presents the illusion that we are actually writing to a distinct
528 static void snd_emu10k1_ecard_write(struct snd_emu10k1 * emu, unsigned int value)
530 unsigned short count;
532 unsigned long hc_port;
533 unsigned int hc_value;
535 hc_port = emu->port + HCFG;
536 hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT);
537 outl(hc_value, hc_port);
539 for (count = 0; count < EC_NUM_CONTROL_BITS; count++) {
541 /* Set up the value */
542 data = ((value & 0x1) ? PULSEN_BIT : 0);
545 outl(hc_value | data, hc_port);
547 /* Clock the shift register */
548 outl(hc_value | data | HANDN_BIT, hc_port);
549 outl(hc_value | data, hc_port);
553 outl(hc_value | HOOKN_BIT, hc_port);
554 outl(hc_value, hc_port);
557 /**************************************************************************
558 * @func Set the gain of the ECARD's CS3310 Trim/gain controller. The
559 * trim value consists of a 16bit value which is composed of two
560 * 8 bit gain/trim values, one for the left channel and one for the
561 * right channel. The following table maps from the Gain/Attenuation
562 * value in decibels into the corresponding bit pattern for a single
566 static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 * emu,
571 /* Enable writing to the TRIM registers */
572 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
574 /* Do it again to insure that we meet hold time requirements */
575 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
577 for (bit = (1 << 15); bit; bit >>= 1) {
580 value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA);
583 value |= EC_TRIM_SDATA;
586 snd_emu10k1_ecard_write(emu, value);
587 snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK);
588 snd_emu10k1_ecard_write(emu, value);
591 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
594 static int snd_emu10k1_ecard_init(struct snd_emu10k1 * emu)
596 unsigned int hc_value;
598 /* Set up the initial settings */
599 emu->ecard_ctrl = EC_RAW_RUN_MODE |
600 EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) |
601 EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL);
603 /* Step 0: Set the codec type in the hardware control register
604 * and enable audio output */
605 hc_value = inl(emu->port + HCFG);
606 outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG);
607 inl(emu->port + HCFG);
609 /* Step 1: Turn off the led and deassert TRIM_CS */
610 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
612 /* Step 2: Calibrate the ADC and DAC */
613 snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN);
615 /* Step 3: Wait for awhile; XXX We can't get away with this
616 * under a real operating system; we'll need to block and wait that
618 snd_emu10k1_wait(emu, 48000);
620 /* Step 4: Switch off the DAC and ADC calibration. Note
621 * That ADC_CAL is actually an inverted signal, so we assert
622 * it here to stop calibration. */
623 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
625 /* Step 4: Switch into run mode */
626 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
628 /* Step 5: Set the analog input gain */
629 snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN);
634 static int snd_emu10k1_cardbus_init(struct snd_emu10k1 * emu)
636 unsigned long special_port;
639 /* Special initialisation routine
640 * before the rest of the IO-Ports become active.
642 special_port = emu->port + 0x38;
643 value = inl(special_port);
644 outl(0x00d00000, special_port);
645 value = inl(special_port);
646 outl(0x00d00001, special_port);
647 value = inl(special_port);
648 outl(0x00d0005f, special_port);
649 value = inl(special_port);
650 outl(0x00d0007f, special_port);
651 value = inl(special_port);
652 outl(0x0090007f, special_port);
653 value = inl(special_port);
655 snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */
659 static int snd_emu1010_load_firmware(struct snd_emu10k1 * emu, const char * filename)
665 unsigned int write_post;
667 const struct firmware *fw_entry;
669 if ((err = request_firmware(&fw_entry, filename, &emu->pci->dev)) != 0) {
670 snd_printk(KERN_ERR "firmware: %s not found. Err=%d\n",filename, err);
673 snd_printk(KERN_INFO "firmware size=0x%zx\n", fw_entry->size);
675 /* The FPGA is a Xilinx Spartan IIE XC2S50E */
676 /* GPIO7 -> FPGA PGMN
679 * FPGA CONFIG OFF -> FPGA PGMN
681 spin_lock_irqsave(&emu->emu_lock, flags);
682 outl(0x00, emu->port + A_IOCFG); /* Set PGMN low for 1uS. */
683 write_post = inl(emu->port + A_IOCFG);
685 outl(0x80, emu->port + A_IOCFG); /* Leave bit 7 set during netlist setup. */
686 write_post = inl(emu->port + A_IOCFG);
687 udelay(100); /* Allow FPGA memory to clean */
688 for(n = 0; n < fw_entry->size; n++) {
689 value=fw_entry->data[n];
690 for(i = 0; i < 8; i++) {
695 outl(reg, emu->port + A_IOCFG);
696 write_post = inl(emu->port + A_IOCFG);
697 outl(reg | 0x40, emu->port + A_IOCFG);
698 write_post = inl(emu->port + A_IOCFG);
701 /* After programming, set GPIO bit 4 high again. */
702 outl(0x10, emu->port + A_IOCFG);
703 write_post = inl(emu->port + A_IOCFG);
704 spin_unlock_irqrestore(&emu->emu_lock, flags);
706 release_firmware(fw_entry);
710 int emu1010_firmware_thread(void *data) {
711 struct snd_emu10k1 * emu = data;
717 /* Delay to allow Audio Dock to settle */
718 msleep_interruptible(1000);
719 if (kthread_should_stop())
721 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &tmp ); /* IRQ Status */
722 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ® ); /* OPTIONS: Which cards are attached to the EMU */
723 if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) {
724 /* Audio Dock attached */
725 /* Return to Audio Dock programming mode */
726 snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware\n");
727 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_AUDIODOCK );
728 if (emu->card_capabilities->emu_model == 1) {
729 if ((err = snd_emu1010_load_firmware(emu, DOCK_FILENAME)) != 0) {
732 } else if (emu->card_capabilities->emu_model == 2) {
733 if ((err = snd_emu1010_load_firmware(emu, MICRO_DOCK_FILENAME)) != 0) {
736 } else if (emu->card_capabilities->emu_model == 3) {
737 if ((err = snd_emu1010_load_firmware(emu, MICRO_DOCK_FILENAME)) != 0) {
742 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0 );
743 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, ® );
744 snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_IRQ_STATUS=0x%x\n",reg);
745 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
746 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ® );
747 snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_ID=0x%x\n",reg);
748 if ((reg & 0x1f) != 0x15) {
749 /* FPGA failed to be programmed */
750 snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware file failed, reg=0x%x\n", reg);
753 snd_printk(KERN_INFO "emu1010: Audio Dock Firmware loaded\n");
754 snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp );
755 snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2 );
756 snd_printk("Audio Dock ver:%d.%d\n",tmp ,tmp2);
757 /* Sync clocking between 1010 and Dock */
758 /* Allow DLL to settle */
760 /* Unmute all. Default is muted after a firmware load */
761 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE );
764 snd_printk(KERN_INFO "emu1010: firmware thread stopping\n");
769 * EMU-1010 - details found out from this driver, official MS Win drivers,
772 * Audigy2 (aka Alice2):
773 * ---------------------
774 * * communication over PCI
775 * * conversion of 32-bit data coming over EMU32 links from HANA FPGA
776 * to 2 x 16-bit, using internal DSP instructions
777 * * slave mode, clock supplied by HANA
778 * * linked to HANA using:
779 * 32 x 32-bit serial EMU32 output channels
780 * 16 x EMU32 input channels
781 * (?) x I2S I/O channels (?)
785 * * provides all (?) physical inputs and outputs of the card
786 * (ADC, DAC, SPDIF I/O, ADAT I/O, etc.)
787 * * provides clock signal for the card and Alice2
788 * * two crystals - for 44.1kHz and 48kHz multiples
789 * * provides internal routing of signal sources to signal destinations
790 * * inputs/outputs to Alice2 - see above
792 * Current status of the driver:
793 * ----------------------------
794 * * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz)
795 * * PCM device nb. 2:
796 * 16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops
797 * 16 x 32-bit capture - snd_emu10k1_capture_efx_ops
799 static int snd_emu10k1_emu1010_init(struct snd_emu10k1 * emu)
805 const char *filename = NULL;
807 snd_printk(KERN_INFO "emu1010: Special config.\n");
808 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
809 * Lock Sound Memory Cache, Lock Tank Memory Cache,
812 outl(0x0005a00c, emu->port + HCFG);
813 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
814 * Lock Tank Memory Cache,
817 outl(0x0005a004, emu->port + HCFG);
818 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
821 outl(0x0005a000, emu->port + HCFG);
822 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
825 outl(0x0005a000, emu->port + HCFG);
827 /* Disable 48Volt power to Audio Dock */
828 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0 );
830 /* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */
831 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ® );
832 snd_printdd("reg1=0x%x\n",reg);
833 if ((reg & 0x3f) == 0x15) {
834 /* FPGA netlist already present so clear it */
835 /* Return to programming mode */
837 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0x02 );
839 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ® );
840 snd_printdd("reg2=0x%x\n",reg);
841 if ((reg & 0x3f) == 0x15) {
842 /* FPGA failed to return to programming mode */
843 snd_printk(KERN_INFO "emu1010: FPGA failed to return to programming mode\n");
846 snd_printk(KERN_INFO "emu1010: EMU_HANA_ID=0x%x\n",reg);
847 switch (emu->card_capabilities->emu_model) {
849 filename = HANA_FILENAME;
852 filename = EMU1010B_FILENAME;
855 filename = EMU1010_NOTEBOOK_FILENAME;
858 filename = EMU0404_FILENAME;
865 snd_printk(KERN_INFO "emu1010: filename %s testing\n", filename);
866 err = snd_emu1010_load_firmware(emu, filename);
869 KERN_INFO "emu1010: Loading Firmware file %s failed\n",
874 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
875 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ® );
876 if ((reg & 0x3f) != 0x15) {
877 /* FPGA failed to be programmed */
878 snd_printk(KERN_INFO "emu1010: Loading Hana Firmware file failed, reg=0x%x\n", reg);
882 snd_printk(KERN_INFO "emu1010: Hana Firmware loaded\n");
883 snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp );
884 snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2 );
885 snd_printk("Hana ver:%d.%d\n",tmp ,tmp2);
886 /* Enable 48Volt power to Audio Dock */
887 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON );
889 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ® );
890 snd_printk(KERN_INFO "emu1010: Card options=0x%x\n",reg);
891 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ® );
892 snd_printk(KERN_INFO "emu1010: Card options=0x%x\n",reg);
893 snd_emu1010_fpga_read(emu, EMU_HANA_OPTICAL_TYPE, &tmp );
894 /* Optical -> ADAT I/O */
898 emu->emu1010.optical_in = 1; /* IN_ADAT */
899 emu->emu1010.optical_out = 1; /* IN_ADAT */
901 tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : 0) |
902 (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : 0);
903 snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp );
904 snd_emu1010_fpga_read(emu, EMU_HANA_ADC_PADS, &tmp );
905 /* Set no attenuation on Audio Dock pads. */
906 snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, 0x00 );
907 emu->emu1010.adc_pads = 0x00;
908 snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp );
909 /* Unmute Audio dock DACs, Headphone source DAC-4. */
910 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30 );
911 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12 );
912 snd_emu1010_fpga_read(emu, EMU_HANA_DAC_PADS, &tmp );
914 snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, 0x0f );
915 emu->emu1010.dac_pads = 0x0f;
916 snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp );
917 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30 );
918 snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp );
919 /* SPDIF Format. Set Consumer mode, 24bit, copy enable */
920 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10 );
922 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19 );
924 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c );
925 /* snd_emu1010_fpga_write(emu, 0x09, 0x0f ); // IRQ Enable: All on */
926 /* IRQ Enable: All off */
927 snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x00 );
929 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ® );
930 snd_printk(KERN_INFO "emu1010: Card options3=0x%x\n",reg);
931 /* Default WCLK set to 48kHz. */
932 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x00 );
933 /* Word Clock source, Internal 48kHz x1 */
934 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K );
935 //snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X );
936 /* Audio Dock LEDs. */
937 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12 );
941 snd_emu1010_fpga_link_dst_src_write(emu,
942 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
943 snd_emu1010_fpga_link_dst_src_write(emu,
944 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
945 snd_emu1010_fpga_link_dst_src_write(emu,
946 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT2);
947 snd_emu1010_fpga_link_dst_src_write(emu,
948 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT2);
952 snd_emu1010_fpga_link_dst_src_write(emu,
953 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
954 snd_emu1010_fpga_link_dst_src_write(emu,
955 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
956 snd_emu1010_fpga_link_dst_src_write(emu,
957 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
958 snd_emu1010_fpga_link_dst_src_write(emu,
959 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_RIGHT2);
960 snd_emu1010_fpga_link_dst_src_write(emu,
961 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT3);
962 snd_emu1010_fpga_link_dst_src_write(emu,
963 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT3);
964 snd_emu1010_fpga_link_dst_src_write(emu,
965 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HAMOA_ADC_LEFT4);
966 snd_emu1010_fpga_link_dst_src_write(emu,
967 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HAMOA_ADC_RIGHT4);
971 snd_emu1010_fpga_link_dst_src_write(emu,
972 EMU_DST_ALICE2_EMU32_0, EMU_SRC_DOCK_MIC_A1);
973 snd_emu1010_fpga_link_dst_src_write(emu,
974 EMU_DST_ALICE2_EMU32_1, EMU_SRC_DOCK_MIC_B1);
975 snd_emu1010_fpga_link_dst_src_write(emu,
976 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
977 snd_emu1010_fpga_link_dst_src_write(emu,
978 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_LEFT2);
979 snd_emu1010_fpga_link_dst_src_write(emu,
980 EMU_DST_ALICE2_EMU32_4, EMU_SRC_DOCK_ADC1_LEFT1);
981 snd_emu1010_fpga_link_dst_src_write(emu,
982 EMU_DST_ALICE2_EMU32_5, EMU_SRC_DOCK_ADC1_RIGHT1);
983 snd_emu1010_fpga_link_dst_src_write(emu,
984 EMU_DST_ALICE2_EMU32_6, EMU_SRC_DOCK_ADC2_LEFT1);
985 snd_emu1010_fpga_link_dst_src_write(emu,
986 EMU_DST_ALICE2_EMU32_7, EMU_SRC_DOCK_ADC2_RIGHT1);
987 /* Pavel Hofman - setting defaults for 8 more capture channels
988 * Defaults only, users will set their own values anyways, let's
992 snd_emu1010_fpga_link_dst_src_write(emu,
993 EMU_DST_ALICE2_EMU32_8, EMU_SRC_DOCK_MIC_A1);
994 snd_emu1010_fpga_link_dst_src_write(emu,
995 EMU_DST_ALICE2_EMU32_9, EMU_SRC_DOCK_MIC_B1);
996 snd_emu1010_fpga_link_dst_src_write(emu,
997 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HAMOA_ADC_LEFT2);
998 snd_emu1010_fpga_link_dst_src_write(emu,
999 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HAMOA_ADC_LEFT2);
1000 snd_emu1010_fpga_link_dst_src_write(emu,
1001 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_ADC1_LEFT1);
1002 snd_emu1010_fpga_link_dst_src_write(emu,
1003 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_ADC1_RIGHT1);
1004 snd_emu1010_fpga_link_dst_src_write(emu,
1005 EMU_DST_ALICE2_EMU32_E, EMU_SRC_DOCK_ADC2_LEFT1);
1006 snd_emu1010_fpga_link_dst_src_write(emu,
1007 EMU_DST_ALICE2_EMU32_F, EMU_SRC_DOCK_ADC2_RIGHT1);
1011 snd_emu1010_fpga_link_dst_src_write(emu,
1012 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HANA_ADAT);
1013 snd_emu1010_fpga_link_dst_src_write(emu,
1014 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HANA_ADAT + 1);
1015 snd_emu1010_fpga_link_dst_src_write(emu,
1016 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HANA_ADAT + 2);
1017 snd_emu1010_fpga_link_dst_src_write(emu,
1018 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HANA_ADAT + 3);
1019 snd_emu1010_fpga_link_dst_src_write(emu,
1020 EMU_DST_ALICE2_EMU32_8, EMU_SRC_HANA_ADAT + 4);
1021 snd_emu1010_fpga_link_dst_src_write(emu,
1022 EMU_DST_ALICE2_EMU32_9, EMU_SRC_HANA_ADAT + 5);
1023 snd_emu1010_fpga_link_dst_src_write(emu,
1024 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HANA_ADAT + 6);
1025 snd_emu1010_fpga_link_dst_src_write(emu,
1026 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HANA_ADAT + 7);
1027 snd_emu1010_fpga_link_dst_src_write(emu,
1028 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_MIC_A1);
1029 snd_emu1010_fpga_link_dst_src_write(emu,
1030 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_MIC_B1);
1031 snd_emu1010_fpga_link_dst_src_write(emu,
1032 EMU_DST_ALICE2_EMU32_E, EMU_SRC_HAMOA_ADC_LEFT2);
1033 snd_emu1010_fpga_link_dst_src_write(emu,
1034 EMU_DST_ALICE2_EMU32_F, EMU_SRC_HAMOA_ADC_LEFT2);
1036 for (i = 0;i < 0x20; i++ ) {
1037 /* AudioDock Elink <- Silence */
1038 snd_emu1010_fpga_link_dst_src_write(emu, 0x0100+i, EMU_SRC_SILENCE);
1040 for (i = 0;i < 4; i++) {
1041 /* Hana SPDIF Out <- Silence */
1042 snd_emu1010_fpga_link_dst_src_write(emu, 0x0200+i, EMU_SRC_SILENCE);
1044 for (i = 0;i < 7; i++) {
1045 /* Hamoa DAC <- Silence */
1046 snd_emu1010_fpga_link_dst_src_write(emu, 0x0300+i, EMU_SRC_SILENCE);
1048 for (i = 0;i < 7; i++) {
1049 /* Hana ADAT Out <- Silence */
1050 snd_emu1010_fpga_link_dst_src_write(emu, EMU_DST_HANA_ADAT + i, EMU_SRC_SILENCE);
1052 snd_emu1010_fpga_link_dst_src_write(emu,
1053 EMU_DST_ALICE_I2S0_LEFT, EMU_SRC_DOCK_ADC1_LEFT1);
1054 snd_emu1010_fpga_link_dst_src_write(emu,
1055 EMU_DST_ALICE_I2S0_RIGHT, EMU_SRC_DOCK_ADC1_RIGHT1);
1056 snd_emu1010_fpga_link_dst_src_write(emu,
1057 EMU_DST_ALICE_I2S1_LEFT, EMU_SRC_DOCK_ADC2_LEFT1);
1058 snd_emu1010_fpga_link_dst_src_write(emu,
1059 EMU_DST_ALICE_I2S1_RIGHT, EMU_SRC_DOCK_ADC2_RIGHT1);
1060 snd_emu1010_fpga_link_dst_src_write(emu,
1061 EMU_DST_ALICE_I2S2_LEFT, EMU_SRC_DOCK_ADC3_LEFT1);
1062 snd_emu1010_fpga_link_dst_src_write(emu,
1063 EMU_DST_ALICE_I2S2_RIGHT, EMU_SRC_DOCK_ADC3_RIGHT1);
1064 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x01 ); // Unmute all
1066 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp );
1068 /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1069 * Lock Sound Memory Cache, Lock Tank Memory Cache,
1072 outl(0x0000a000, emu->port + HCFG);
1073 /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1074 * Lock Sound Memory Cache, Lock Tank Memory Cache,
1075 * Un-Mute all codecs.
1077 outl(0x0000a001, emu->port + HCFG);
1079 /* Initial boot complete. Now patches */
1081 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp );
1082 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19 ); /* MIDI Route */
1083 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c ); /* Unknown */
1084 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19 ); /* MIDI Route */
1085 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c ); /* Unknown */
1086 snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp );
1087 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10 ); /* SPDIF Format spdif (or 0x11 for aes/ebu) */
1089 /* Start Micro/Audio Dock firmware loader thread */
1090 emu->emu1010.firmware_thread = kthread_create(&emu1010_firmware_thread,
1092 "emu1010_firmware");
1093 wake_up_process(emu->emu1010.firmware_thread);
1096 snd_emu1010_fpga_link_dst_src_write(emu,
1097 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32B + 2); /* ALICE2 bus 0xa2 */
1098 snd_emu1010_fpga_link_dst_src_write(emu,
1099 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32B + 3); /* ALICE2 bus 0xa3 */
1100 snd_emu1010_fpga_link_dst_src_write(emu,
1101 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 2); /* ALICE2 bus 0xb2 */
1102 snd_emu1010_fpga_link_dst_src_write(emu,
1103 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); /* ALICE2 bus 0xb3 */
1105 /* Default outputs */
1106 snd_emu1010_fpga_link_dst_src_write(emu,
1107 EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */
1108 emu->emu1010.output_source[0] = 21;
1109 snd_emu1010_fpga_link_dst_src_write(emu,
1110 EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1111 emu->emu1010.output_source[1] = 22;
1112 snd_emu1010_fpga_link_dst_src_write(emu,
1113 EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1114 emu->emu1010.output_source[2] = 23;
1115 snd_emu1010_fpga_link_dst_src_write(emu,
1116 EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1117 emu->emu1010.output_source[3] = 24;
1118 snd_emu1010_fpga_link_dst_src_write(emu,
1119 EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1120 emu->emu1010.output_source[4] = 25;
1121 snd_emu1010_fpga_link_dst_src_write(emu,
1122 EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1123 emu->emu1010.output_source[5] = 26;
1124 snd_emu1010_fpga_link_dst_src_write(emu,
1125 EMU_DST_DOCK_DAC4_LEFT1, EMU_SRC_ALICE_EMU32A + 6);
1126 emu->emu1010.output_source[6] = 27;
1127 snd_emu1010_fpga_link_dst_src_write(emu,
1128 EMU_DST_DOCK_DAC4_RIGHT1, EMU_SRC_ALICE_EMU32A + 7);
1129 emu->emu1010.output_source[7] = 28;
1130 snd_emu1010_fpga_link_dst_src_write(emu,
1131 EMU_DST_DOCK_PHONES_LEFT1, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */
1132 emu->emu1010.output_source[8] = 21;
1133 snd_emu1010_fpga_link_dst_src_write(emu,
1134 EMU_DST_DOCK_PHONES_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1135 emu->emu1010.output_source[9] = 22;
1136 snd_emu1010_fpga_link_dst_src_write(emu,
1137 EMU_DST_DOCK_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */
1138 emu->emu1010.output_source[10] = 21;
1139 snd_emu1010_fpga_link_dst_src_write(emu,
1140 EMU_DST_DOCK_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1141 emu->emu1010.output_source[11] = 22;
1142 snd_emu1010_fpga_link_dst_src_write(emu,
1143 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */
1144 emu->emu1010.output_source[12] = 21;
1145 snd_emu1010_fpga_link_dst_src_write(emu,
1146 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1147 emu->emu1010.output_source[13] = 22;
1148 snd_emu1010_fpga_link_dst_src_write(emu,
1149 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */
1150 emu->emu1010.output_source[14] = 21;
1151 snd_emu1010_fpga_link_dst_src_write(emu,
1152 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1153 emu->emu1010.output_source[15] = 22;
1154 snd_emu1010_fpga_link_dst_src_write(emu,
1155 EMU_DST_HANA_ADAT, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */
1156 emu->emu1010.output_source[16] = 21;
1157 snd_emu1010_fpga_link_dst_src_write(emu,
1158 EMU_DST_HANA_ADAT + 1, EMU_SRC_ALICE_EMU32A + 1);
1159 emu->emu1010.output_source[17] = 22;
1160 snd_emu1010_fpga_link_dst_src_write(emu,
1161 EMU_DST_HANA_ADAT + 2, EMU_SRC_ALICE_EMU32A + 2);
1162 emu->emu1010.output_source[18] = 23;
1163 snd_emu1010_fpga_link_dst_src_write(emu,
1164 EMU_DST_HANA_ADAT + 3, EMU_SRC_ALICE_EMU32A + 3);
1165 emu->emu1010.output_source[19] = 24;
1166 snd_emu1010_fpga_link_dst_src_write(emu,
1167 EMU_DST_HANA_ADAT + 4, EMU_SRC_ALICE_EMU32A + 4);
1168 emu->emu1010.output_source[20] = 25;
1169 snd_emu1010_fpga_link_dst_src_write(emu,
1170 EMU_DST_HANA_ADAT + 5, EMU_SRC_ALICE_EMU32A + 5);
1171 emu->emu1010.output_source[21] = 26;
1172 snd_emu1010_fpga_link_dst_src_write(emu,
1173 EMU_DST_HANA_ADAT + 6, EMU_SRC_ALICE_EMU32A + 6);
1174 emu->emu1010.output_source[22] = 27;
1175 snd_emu1010_fpga_link_dst_src_write(emu,
1176 EMU_DST_HANA_ADAT + 7, EMU_SRC_ALICE_EMU32A + 7);
1177 emu->emu1010.output_source[23] = 28;
1179 /* TEMP: Select SPDIF in/out */
1180 //snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, 0x0); /* Output spdif */
1182 /* TEMP: Select 48kHz SPDIF out */
1183 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x0); /* Mute all */
1184 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x0); /* Default fallback clock 48kHz */
1185 /* Word Clock source, Internal 48kHz x1 */
1186 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K );
1187 //snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X );
1188 emu->emu1010.internal_clock = 1; /* 48000 */
1189 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);/* Set LEDs on Audio Dock */
1190 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x1); /* Unmute all */
1191 //snd_emu1010_fpga_write(emu, 0x7, 0x0); /* Mute all */
1192 //snd_emu1010_fpga_write(emu, 0x7, 0x1); /* Unmute all */
1193 //snd_emu1010_fpga_write(emu, 0xe, 0x12); /* Set LEDs on Audio Dock */
1198 * Create the EMU10K1 instance
1202 static int alloc_pm_buffer(struct snd_emu10k1 *emu);
1203 static void free_pm_buffer(struct snd_emu10k1 *emu);
1206 static int snd_emu10k1_free(struct snd_emu10k1 *emu)
1208 if (emu->port) { /* avoid access to already used hardware */
1209 snd_emu10k1_fx8010_tram_setup(emu, 0);
1210 snd_emu10k1_done(emu);
1211 /* remove reserved page */
1212 if (emu->reserved_page) {
1213 snd_emu10k1_synth_free(emu, (struct snd_util_memblk *)emu->reserved_page);
1214 emu->reserved_page = NULL;
1216 snd_emu10k1_free_efx(emu);
1218 if (emu->card_capabilities->emu_model == 1) {
1219 /* Disable 48Volt power to Audio Dock */
1220 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0 );
1222 if (emu->card_capabilities->emu_model)
1223 kthread_stop(emu->emu1010.firmware_thread);
1225 snd_util_memhdr_free(emu->memhdr);
1226 if (emu->silent_page.area)
1227 snd_dma_free_pages(&emu->silent_page);
1228 if (emu->ptb_pages.area)
1229 snd_dma_free_pages(&emu->ptb_pages);
1230 vfree(emu->page_ptr_table);
1231 vfree(emu->page_addr_table);
1233 free_pm_buffer(emu);
1236 free_irq(emu->irq, emu);
1238 pci_release_regions(emu->pci);
1239 if (emu->card_capabilities->ca0151_chip) /* P16V */
1241 pci_disable_device(emu->pci);
1246 static int snd_emu10k1_dev_free(struct snd_device *device)
1248 struct snd_emu10k1 *emu = device->device_data;
1249 return snd_emu10k1_free(emu);
1252 static struct snd_emu_chip_details emu_chip_details[] = {
1253 /* Audigy 2 Value AC3 out does not work yet. Need to find out how to turn off interpolators.*/
1254 /* Tested by James@superbug.co.uk 3rd July 2005 */
1257 * ADC: Philips 1361T
1261 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
1262 .driver = "Audigy2", .name = "Audigy 2 Value [SB0400]",
1268 /* Audigy4 (Not PRO) SB0610 */
1269 /* Tested by James@superbug.co.uk 4th April 2006 */
1275 * 3: 0 - Digital Out, 1 - Line in
1283 * A: Green jack sense (Front)
1285 * C: Black jack sense (Rear/Side Right)
1286 * D: Yellow jack sense (Center/LFE/Side Left)
1290 * Digital Out/Line in switch using A_IOCFG bit 3 (0x08)
1294 /* Mic input not tested.
1295 * Analog CD input not tested
1296 * Digital Out not tested.
1298 * Audio output 5.1 working. Side outputs not working.
1300 /* DSP: CA10300-IAT LF
1301 * DAC: Cirrus Logic CS4382-KQZ
1302 * ADC: Philips 1361T
1303 * AC97: Sigmatel STAC9750
1306 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102,
1307 .driver = "Audigy2", .name = "Audigy 4 [SB0610]",
1312 .adc_1361t = 1, /* 24 bit capture instead of 16bit */
1314 /* Audigy 2 ZS Notebook Cardbus card.*/
1315 /* Tested by James@superbug.co.uk 6th November 2006 */
1316 /* Audio output 7.1/Headphones working.
1317 * Digital output working. (AC3 not checked, only PCM)
1318 * Audio Mic/Line inputs working.
1319 * Digital input not tested.
1322 * DAC: Wolfson WM8768/WM8568
1323 * ADC: Wolfson WM8775
1327 /* Tested by James@superbug.co.uk 4th April 2006 */
1331 * 1: 0 = Mute all the 7.1 channel out. 1 = unmute.
1332 * 2: Analog input 0 = line in, 1 = mic in
1334 * 4: Digital output 0 = off, 1 = on.
1339 * All bits 1 (0x3fxx) means nothing plugged in.
1340 * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing.
1341 * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing.
1342 * C-D: 2 = Front/Rear/etc, 3 = nothing.
1346 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102,
1347 .driver = "Audigy2", .name = "Audigy 2 ZS Notebook [SB0530]",
1351 .ca_cardbus_chip = 1,
1355 /* Tested by James@superbug.co.uk 20-3-2007. */
1356 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40021102,
1357 .driver = "Audigy2", .name = "E-mu 0404 [4002]",
1362 .emu_model = 4} , /* EMU 0404 */
1363 /* Tested by James@superbug.co.uk 4th Nov 2007. */
1364 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102,
1365 .driver = "Audigy2", .name = "E-mu 1010 Notebook [MAEM8950]",
1369 .ca_cardbus_chip = 1,
1372 /* Tested by James@superbug.co.uk 4th Nov 2007. */
1373 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102,
1374 .driver = "Audigy2", .name = "E-mu 1010b PCI [MAEM????]",
1380 /* Tested by James@superbug.co.uk 8th July 2005. */
1381 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102,
1382 .driver = "Audigy2", .name = "E-mu 1010 [4001]",
1387 .emu_model = 1} , /* Emu 1010 */
1388 /* Audigy4 (Not PRO) SB0610 */
1389 {.vendor = 0x1102, .device = 0x0008,
1390 .driver = "Audigy2", .name = "Audigy 2 Value [Unknown]",
1395 /* Tested by James@superbug.co.uk 3rd July 2005 */
1396 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102,
1397 .driver = "Audigy2", .name = "Audigy 4 PRO [SB0380]",
1405 /* Tested by shane-alsa@cm.nu 5th Nov 2005 */
1406 /* The 0x20061102 does have SB0350 written on it
1407 * Just like 0x20021102
1409 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102,
1410 .driver = "Audigy2", .name = "Audigy 2 [SB0350b]",
1418 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102,
1419 .driver = "Audigy2", .name = "Audigy 2 ZS [SB0350]",
1427 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102,
1428 .driver = "Audigy2", .name = "Audigy 2 ZS [2001]",
1437 /* Tested by James@superbug.co.uk 3rd July 2005 */
1440 * ADC: Philips 1361T
1444 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102,
1445 .driver = "Audigy2", .name = "Audigy 2 [SB0240]",
1452 .adc_1361t = 1, /* 24 bit capture instead of 16bit */
1454 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
1455 .driver = "Audigy2", .name = "Audigy 2 EX [1005]",
1462 /* Dell OEM/Creative Labs Audigy 2 ZS */
1463 /* See ALSA bug#1365 */
1464 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102,
1465 .driver = "Audigy2", .name = "Audigy 2 ZS [SB0353]",
1473 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
1474 .driver = "Audigy2", .name = "Audigy 2 Platinum [SB0240P]",
1481 .adc_1361t = 1, /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */
1483 {.vendor = 0x1102, .device = 0x0004, .revision = 0x04,
1484 .driver = "Audigy2", .name = "Audigy 2 [Unknown]",
1491 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102,
1492 .driver = "Audigy", .name = "Audigy 1 [SB0090]",
1497 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102,
1498 .driver = "Audigy", .name = "Audigy 1 ES [SB0160]",
1504 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102,
1505 .driver = "Audigy", .name = "Audigy 1 [SB0090]",
1510 {.vendor = 0x1102, .device = 0x0004,
1511 .driver = "Audigy", .name = "Audigy 1 [Unknown]",
1516 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806B1102,
1517 .driver = "EMU10K1", .name = "SBLive! [SB0105]",
1522 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806A1102,
1523 .driver = "EMU10K1", .name = "SBLive! Value [SB0103]",
1528 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102,
1529 .driver = "EMU10K1", .name = "SBLive! Value [SB0101]",
1534 /* Tested by ALSA bug#1680 26th December 2005 */
1535 /* note: It really has SB0220 written on the card. */
1536 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102,
1537 .driver = "EMU10K1", .name = "SB Live 5.1 Dell OEM [SB0220]",
1542 /* Tested by Thomas Zehetbauer 27th Aug 2005 */
1543 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102,
1544 .driver = "EMU10K1", .name = "SB Live 5.1 [SB0220]",
1549 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102,
1550 .driver = "EMU10K1", .name = "SB Live 5.1 [SB0220]",
1555 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102,
1556 .driver = "EMU10K1", .name = "SB Live 5.1",
1561 /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */
1562 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102,
1563 .driver = "EMU10K1", .name = "SBLive 5.1 [SB0060]",
1566 .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum
1567 * share the same IDs!
1570 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102,
1571 .driver = "EMU10K1", .name = "SBLive! Value [CT4850]",
1576 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102,
1577 .driver = "EMU10K1", .name = "SBLive! Platinum [CT4760P]",
1581 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102,
1582 .driver = "EMU10K1", .name = "SBLive! Value [CT4871]",
1587 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102,
1588 .driver = "EMU10K1", .name = "SBLive! Value [CT4831]",
1593 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102,
1594 .driver = "EMU10K1", .name = "SBLive! Value [CT4870]",
1599 /* Tested by James@superbug.co.uk 3rd July 2005 */
1600 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102,
1601 .driver = "EMU10K1", .name = "SBLive! Value [CT4832]",
1606 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102,
1607 .driver = "EMU10K1", .name = "SBLive! Value [CT4830]",
1612 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102,
1613 .driver = "EMU10K1", .name = "SB PCI512 [CT4790]",
1618 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102,
1619 .driver = "EMU10K1", .name = "SBLive! Value [CT4780]",
1624 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102,
1625 .driver = "EMU10K1", .name = "E-mu APS [4001]",
1629 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102,
1630 .driver = "EMU10K1", .name = "SBLive! [CT4620]",
1635 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102,
1636 .driver = "EMU10K1", .name = "SBLive! Value [CT4670]",
1641 {.vendor = 0x1102, .device = 0x0002,
1642 .driver = "EMU10K1", .name = "SB Live [Unknown]",
1647 { } /* terminator */
1650 int __devinit snd_emu10k1_create(struct snd_card *card,
1651 struct pci_dev * pci,
1652 unsigned short extin_mask,
1653 unsigned short extout_mask,
1654 long max_cache_bytes,
1657 struct snd_emu10k1 ** remu)
1659 struct snd_emu10k1 *emu;
1662 unsigned int silent_page;
1663 const struct snd_emu_chip_details *c;
1664 static struct snd_device_ops ops = {
1665 .dev_free = snd_emu10k1_dev_free,
1670 /* enable PCI device */
1671 if ((err = pci_enable_device(pci)) < 0)
1674 emu = kzalloc(sizeof(*emu), GFP_KERNEL);
1676 pci_disable_device(pci);
1680 spin_lock_init(&emu->reg_lock);
1681 spin_lock_init(&emu->emu_lock);
1682 spin_lock_init(&emu->voice_lock);
1683 spin_lock_init(&emu->synth_lock);
1684 spin_lock_init(&emu->memblk_lock);
1685 mutex_init(&emu->fx8010.lock);
1686 INIT_LIST_HEAD(&emu->mapped_link_head);
1687 INIT_LIST_HEAD(&emu->mapped_order_link_head);
1691 emu->get_synth_voice = NULL;
1692 /* read revision & serial */
1693 emu->revision = pci->revision;
1694 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial);
1695 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model);
1696 snd_printdd("vendor=0x%x, device=0x%x, subsystem_vendor_id=0x%x, subsystem_id=0x%x\n",pci->vendor, pci->device, emu->serial, emu->model);
1698 for (c = emu_chip_details; c->vendor; c++) {
1699 if (c->vendor == pci->vendor && c->device == pci->device) {
1701 if (c->subsystem && (c->subsystem == subsystem) ) {
1705 if (c->subsystem && (c->subsystem != emu->serial) )
1707 if (c->revision && c->revision != emu->revision)
1713 if (c->vendor == 0) {
1714 snd_printk(KERN_ERR "emu10k1: Card not recognised\n");
1716 pci_disable_device(pci);
1719 emu->card_capabilities = c;
1720 if (c->subsystem && !subsystem)
1721 snd_printdd("Sound card name=%s\n", c->name);
1723 snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x. Forced to subsytem=0x%x\n",
1724 c->name, pci->vendor, pci->device, emu->serial, c->subsystem);
1726 snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x.\n",
1727 c->name, pci->vendor, pci->device, emu->serial);
1729 if (!*card->id && c->id) {
1731 strlcpy(card->id, c->id, sizeof(card->id));
1733 for (i = 0; i < snd_ecards_limit; i++) {
1734 if (snd_cards[i] && !strcmp(snd_cards[i]->id, card->id))
1737 if (i >= snd_ecards_limit)
1740 if (n >= SNDRV_CARDS)
1742 snprintf(card->id, sizeof(card->id), "%s_%d", c->id, n);
1746 is_audigy = emu->audigy = c->emu10k2_chip;
1748 /* set the DMA transfer mask */
1749 emu->dma_mask = is_audigy ? AUDIGY_DMA_MASK : EMU10K1_DMA_MASK;
1750 if (pci_set_dma_mask(pci, emu->dma_mask) < 0 ||
1751 pci_set_consistent_dma_mask(pci, emu->dma_mask) < 0) {
1752 snd_printk(KERN_ERR "architecture does not support PCI busmaster DMA with mask 0x%lx\n", emu->dma_mask);
1754 pci_disable_device(pci);
1758 emu->gpr_base = A_FXGPREGBASE;
1760 emu->gpr_base = FXGPREGBASE;
1762 if ((err = pci_request_regions(pci, "EMU10K1")) < 0) {
1764 pci_disable_device(pci);
1767 emu->port = pci_resource_start(pci, 0);
1769 if (request_irq(pci->irq, snd_emu10k1_interrupt, IRQF_SHARED,
1774 emu->irq = pci->irq;
1776 emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT;
1777 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1778 32 * 1024, &emu->ptb_pages) < 0) {
1783 emu->page_ptr_table = vmalloc(emu->max_cache_pages * sizeof(void *));
1784 emu->page_addr_table = vmalloc(emu->max_cache_pages *
1785 sizeof(unsigned long));
1786 if (emu->page_ptr_table == NULL || emu->page_addr_table == NULL) {
1791 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1792 EMUPAGESIZE, &emu->silent_page) < 0) {
1796 emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE);
1797 if (emu->memhdr == NULL) {
1801 emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) -
1802 sizeof(struct snd_util_memblk);
1804 pci_set_master(pci);
1806 emu->fx8010.fxbus_mask = 0x303f;
1807 if (extin_mask == 0)
1808 extin_mask = 0x3fcf;
1809 if (extout_mask == 0)
1810 extout_mask = 0x7fff;
1811 emu->fx8010.extin_mask = extin_mask;
1812 emu->fx8010.extout_mask = extout_mask;
1813 emu->enable_ir = enable_ir;
1815 if (emu->card_capabilities->ca_cardbus_chip) {
1816 if ((err = snd_emu10k1_cardbus_init(emu)) < 0)
1819 if (emu->card_capabilities->ecard) {
1820 if ((err = snd_emu10k1_ecard_init(emu)) < 0)
1822 } else if (emu->card_capabilities->emu_model) {
1823 if ((err = snd_emu10k1_emu1010_init(emu)) < 0) {
1824 snd_emu10k1_free(emu);
1828 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
1829 does not support this, it shouldn't do any harm */
1830 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
1833 /* initialize TRAM setup */
1834 emu->fx8010.itram_size = (16 * 1024)/2;
1835 emu->fx8010.etram_pages.area = NULL;
1836 emu->fx8010.etram_pages.bytes = 0;
1839 * Init to 0x02109204 :
1840 * Clock accuracy = 0 (1000ppm)
1841 * Sample Rate = 2 (48kHz)
1842 * Audio Channel = 1 (Left of 2)
1843 * Source Number = 0 (Unspecified)
1844 * Generation Status = 1 (Original for Cat Code 12)
1845 * Cat Code = 12 (Digital Signal Mixer)
1847 * Emphasis = 0 (None)
1848 * CP = 1 (Copyright unasserted)
1849 * AN = 0 (Audio data)
1852 emu->spdif_bits[0] = emu->spdif_bits[1] =
1853 emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
1854 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
1855 SPCS_GENERATIONSTATUS | 0x00001200 |
1856 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
1858 emu->reserved_page = (struct snd_emu10k1_memblk *)
1859 snd_emu10k1_synth_alloc(emu, 4096);
1860 if (emu->reserved_page)
1861 emu->reserved_page->map_locked = 1;
1863 /* Clear silent pages and set up pointers */
1864 memset(emu->silent_page.area, 0, PAGE_SIZE);
1865 silent_page = emu->silent_page.addr << 1;
1866 for (idx = 0; idx < MAXPAGES; idx++)
1867 ((u32 *)emu->ptb_pages.area)[idx] = cpu_to_le32(silent_page | idx);
1869 /* set up voice indices */
1870 for (idx = 0; idx < NUM_G; idx++) {
1871 emu->voices[idx].emu = emu;
1872 emu->voices[idx].number = idx;
1875 if ((err = snd_emu10k1_init(emu, enable_ir, 0)) < 0)
1878 if ((err = alloc_pm_buffer(emu)) < 0)
1882 /* Initialize the effect engine */
1883 if ((err = snd_emu10k1_init_efx(emu)) < 0)
1885 snd_emu10k1_audio_enable(emu);
1887 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, emu, &ops)) < 0)
1890 #ifdef CONFIG_PROC_FS
1891 snd_emu10k1_proc_init(emu);
1894 snd_card_set_dev(card, &pci->dev);
1899 snd_emu10k1_free(emu);
1904 static unsigned char saved_regs[] = {
1905 CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP,
1906 FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL,
1907 ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2,
1908 TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA,
1909 MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2,
1910 SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX,
1913 static unsigned char saved_regs_audigy[] = {
1914 A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_SAMPLE_RATE,
1915 A_FXRT2, A_SENDAMOUNTS, A_FXRT1,
1919 static int __devinit alloc_pm_buffer(struct snd_emu10k1 *emu)
1923 size = ARRAY_SIZE(saved_regs);
1925 size += ARRAY_SIZE(saved_regs_audigy);
1926 emu->saved_ptr = vmalloc(4 * NUM_G * size);
1927 if (! emu->saved_ptr)
1929 if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0)
1931 if (emu->card_capabilities->ca0151_chip &&
1932 snd_p16v_alloc_pm_buffer(emu) < 0)
1937 static void free_pm_buffer(struct snd_emu10k1 *emu)
1939 vfree(emu->saved_ptr);
1940 snd_emu10k1_efx_free_pm_buffer(emu);
1941 if (emu->card_capabilities->ca0151_chip)
1942 snd_p16v_free_pm_buffer(emu);
1945 void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu)
1951 val = emu->saved_ptr;
1952 for (reg = saved_regs; *reg != 0xff; reg++)
1953 for (i = 0; i < NUM_G; i++, val++)
1954 *val = snd_emu10k1_ptr_read(emu, *reg, i);
1956 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
1957 for (i = 0; i < NUM_G; i++, val++)
1958 *val = snd_emu10k1_ptr_read(emu, *reg, i);
1961 emu->saved_a_iocfg = inl(emu->port + A_IOCFG);
1962 emu->saved_hcfg = inl(emu->port + HCFG);
1965 void snd_emu10k1_resume_init(struct snd_emu10k1 *emu)
1967 if (emu->card_capabilities->ca_cardbus_chip)
1968 snd_emu10k1_cardbus_init(emu);
1969 if (emu->card_capabilities->ecard)
1970 snd_emu10k1_ecard_init(emu);
1971 else if (emu->card_capabilities->emu_model)
1972 snd_emu10k1_emu1010_init(emu);
1974 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
1975 snd_emu10k1_init(emu, emu->enable_ir, 1);
1978 void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu)
1984 snd_emu10k1_audio_enable(emu);
1986 /* resore for spdif */
1988 outl(emu->saved_a_iocfg, emu->port + A_IOCFG);
1989 outl(emu->saved_hcfg, emu->port + HCFG);
1991 val = emu->saved_ptr;
1992 for (reg = saved_regs; *reg != 0xff; reg++)
1993 for (i = 0; i < NUM_G; i++, val++)
1994 snd_emu10k1_ptr_write(emu, *reg, i, *val);
1996 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
1997 for (i = 0; i < NUM_G; i++, val++)
1998 snd_emu10k1_ptr_write(emu, *reg, i, *val);