2 * linux/sound/arm/aaci.c - ARM PrimeCell AACI PL041 driver
4 * Copyright (C) 2003 Deep Blue Solutions Ltd, All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * Documentation: ARM DDI 0173B
12 #include <linux/module.h>
13 #include <linux/delay.h>
14 #include <linux/init.h>
15 #include <linux/ioport.h>
16 #include <linux/device.h>
17 #include <linux/spinlock.h>
18 #include <linux/interrupt.h>
19 #include <linux/err.h>
20 #include <linux/amba/bus.h>
23 #include <sound/core.h>
24 #include <sound/initval.h>
25 #include <sound/ac97_codec.h>
26 #include <sound/pcm.h>
27 #include <sound/pcm_params.h>
31 #define DRIVER_NAME "aaci-pl041"
34 * PM support is not complete. Turn it off.
38 static void aaci_ac97_select_codec(struct aaci *aaci, struct snd_ac97 *ac97)
40 u32 v, maincr = aaci->maincr | MAINCR_SCRA(ac97->num);
43 * Ensure that the slot 1/2 RX registers are empty.
45 v = readl(aaci->base + AACI_SLFR);
47 readl(aaci->base + AACI_SL2RX);
49 readl(aaci->base + AACI_SL1RX);
51 writel(maincr, aaci->base + AACI_MAINCR);
56 * The recommended use of programming the external codec through slot 1
57 * and slot 2 data is to use the channels during setup routines and the
58 * slot register at any other time. The data written into slot 1, slot 2
59 * and slot 12 registers is transmitted only when their corresponding
60 * SI1TxEn, SI2TxEn and SI12TxEn bits are set in the AACI_MAINCR
63 static void aaci_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
66 struct aaci *aaci = ac97->private_data;
73 mutex_lock(&aaci->ac97_sem);
75 aaci_ac97_select_codec(aaci, ac97);
78 * P54: You must ensure that AACI_SL2TX is always written
79 * to, if required, before data is written to AACI_SL1TX.
81 writel(val << 4, aaci->base + AACI_SL2TX);
82 writel(reg << 12, aaci->base + AACI_SL1TX);
85 * Wait for the transmission of both slots to complete.
88 v = readl(aaci->base + AACI_SLFR);
89 } while ((v & (SLFR_1TXB|SLFR_2TXB)) && --timeout);
92 dev_err(&aaci->dev->dev,
93 "timeout waiting for write to complete\n");
95 mutex_unlock(&aaci->ac97_sem);
99 * Read an AC'97 register.
101 static unsigned short aaci_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
103 struct aaci *aaci = ac97->private_data;
111 mutex_lock(&aaci->ac97_sem);
113 aaci_ac97_select_codec(aaci, ac97);
116 * Write the register address to slot 1.
118 writel((reg << 12) | (1 << 19), aaci->base + AACI_SL1TX);
121 * Wait for the transmission to complete.
124 v = readl(aaci->base + AACI_SLFR);
125 } while ((v & SLFR_1TXB) && --timeout);
128 dev_err(&aaci->dev->dev, "timeout on slot 1 TX busy\n");
134 * Give the AC'97 codec more than enough time
135 * to respond. (42us = ~2 frames at 48kHz.)
140 * Wait for slot 2 to indicate data.
145 v = readl(aaci->base + AACI_SLFR) & (SLFR_1RXV|SLFR_2RXV);
146 } while ((v != (SLFR_1RXV|SLFR_2RXV)) && --timeout);
149 dev_err(&aaci->dev->dev, "timeout on RX valid\n");
155 v = readl(aaci->base + AACI_SL1RX) >> 12;
157 v = readl(aaci->base + AACI_SL2RX) >> 4;
159 } else if (--retries) {
160 dev_warn(&aaci->dev->dev,
161 "ac97 read back fail. retry\n");
164 dev_warn(&aaci->dev->dev,
165 "wrong ac97 register read back (%x != %x)\n",
171 mutex_unlock(&aaci->ac97_sem);
176 aaci_chan_wait_ready(struct aaci_runtime *aacirun, unsigned long mask)
182 val = readl(aacirun->base + AACI_SR);
183 } while (val & mask && timeout--);
191 static void aaci_fifo_irq(struct aaci *aaci, int channel, u32 mask)
193 if (mask & ISR_ORINTR) {
194 dev_warn(&aaci->dev->dev, "RX overrun on chan %d\n", channel);
195 writel(ICLR_RXOEC1 << channel, aaci->base + AACI_INTCLR);
198 if (mask & ISR_RXTOINTR) {
199 dev_warn(&aaci->dev->dev, "RX timeout on chan %d\n", channel);
200 writel(ICLR_RXTOFEC1 << channel, aaci->base + AACI_INTCLR);
203 if (mask & ISR_RXINTR) {
204 struct aaci_runtime *aacirun = &aaci->capture;
207 if (!aacirun->substream || !aacirun->start) {
208 dev_warn(&aaci->dev->dev, "RX interrupt???\n");
209 writel(0, aacirun->base + AACI_IE);
213 spin_lock(&aacirun->lock);
217 unsigned int len = aacirun->fifosz;
220 if (aacirun->bytes <= 0) {
221 aacirun->bytes += aacirun->period;
223 spin_unlock(&aacirun->lock);
224 snd_pcm_period_elapsed(aacirun->substream);
225 spin_lock(&aacirun->lock);
227 if (!(aacirun->cr & CR_EN))
230 val = readl(aacirun->base + AACI_SR);
231 if (!(val & SR_RXHF))
233 if (!(val & SR_RXFF))
236 aacirun->bytes -= len;
238 /* reading 16 bytes at a time */
239 for( ; len > 0; len -= 16) {
241 "ldmia %1, {r0, r1, r2, r3}\n\t"
242 "stmia %0!, {r0, r1, r2, r3}"
244 : "r" (aacirun->fifo)
245 : "r0", "r1", "r2", "r3", "cc");
247 if (ptr >= aacirun->end)
248 ptr = aacirun->start;
254 spin_unlock(&aacirun->lock);
257 if (mask & ISR_URINTR) {
258 dev_dbg(&aaci->dev->dev, "TX underrun on chan %d\n", channel);
259 writel(ICLR_TXUEC1 << channel, aaci->base + AACI_INTCLR);
262 if (mask & ISR_TXINTR) {
263 struct aaci_runtime *aacirun = &aaci->playback;
266 if (!aacirun->substream || !aacirun->start) {
267 dev_warn(&aaci->dev->dev, "TX interrupt???\n");
268 writel(0, aacirun->base + AACI_IE);
272 spin_lock(&aacirun->lock);
276 unsigned int len = aacirun->fifosz;
279 if (aacirun->bytes <= 0) {
280 aacirun->bytes += aacirun->period;
282 spin_unlock(&aacirun->lock);
283 snd_pcm_period_elapsed(aacirun->substream);
284 spin_lock(&aacirun->lock);
286 if (!(aacirun->cr & CR_EN))
289 val = readl(aacirun->base + AACI_SR);
290 if (!(val & SR_TXHE))
292 if (!(val & SR_TXFE))
295 aacirun->bytes -= len;
297 /* writing 16 bytes at a time */
298 for ( ; len > 0; len -= 16) {
300 "ldmia %0!, {r0, r1, r2, r3}\n\t"
301 "stmia %1, {r0, r1, r2, r3}"
303 : "r" (aacirun->fifo)
304 : "r0", "r1", "r2", "r3", "cc");
306 if (ptr >= aacirun->end)
307 ptr = aacirun->start;
313 spin_unlock(&aacirun->lock);
317 static irqreturn_t aaci_irq(int irq, void *devid)
319 struct aaci *aaci = devid;
323 mask = readl(aaci->base + AACI_ALLINTS);
326 for (i = 0; i < 4; i++, m >>= 7) {
328 aaci_fifo_irq(aaci, i, m);
333 return mask ? IRQ_HANDLED : IRQ_NONE;
341 static struct snd_pcm_hardware aaci_hw_info = {
342 .info = SNDRV_PCM_INFO_MMAP |
343 SNDRV_PCM_INFO_MMAP_VALID |
344 SNDRV_PCM_INFO_INTERLEAVED |
345 SNDRV_PCM_INFO_BLOCK_TRANSFER |
346 SNDRV_PCM_INFO_RESUME,
349 * ALSA doesn't support 18-bit or 20-bit packed into 32-bit
350 * words. It also doesn't support 12-bit at all.
352 .formats = SNDRV_PCM_FMTBIT_S16_LE,
354 /* rates are setup from the AC'97 codec */
357 .buffer_bytes_max = 64 * 1024,
358 .period_bytes_min = 256,
359 .period_bytes_max = PAGE_SIZE,
361 .periods_max = PAGE_SIZE / 16,
364 static int __aaci_pcm_open(struct aaci *aaci,
365 struct snd_pcm_substream *substream,
366 struct aaci_runtime *aacirun)
368 struct snd_pcm_runtime *runtime = substream->runtime;
371 aacirun->substream = substream;
372 runtime->private_data = aacirun;
373 runtime->hw = aaci_hw_info;
374 runtime->hw.rates = aacirun->pcm->rates;
375 snd_pcm_limit_hw_rates(runtime);
377 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK &&
378 aacirun->pcm->r[1].slots)
379 snd_ac97_pcm_double_rate_rules(runtime);
382 * FIXME: ALSA specifies fifo_size in bytes. If we're in normal
383 * mode, each 32-bit word contains one sample. If we're in
384 * compact mode, each 32-bit word contains two samples, effectively
385 * halving the FIFO size. However, we don't know for sure which
386 * we'll be using at this point. We set this to the lower limit.
388 runtime->hw.fifo_size = aaci->fifosize * 2;
390 ret = request_irq(aaci->dev->irq[0], aaci_irq, IRQF_SHARED|IRQF_DISABLED,
405 static int aaci_pcm_close(struct snd_pcm_substream *substream)
407 struct aaci *aaci = substream->private_data;
408 struct aaci_runtime *aacirun = substream->runtime->private_data;
410 WARN_ON(aacirun->cr & CR_EN);
412 aacirun->substream = NULL;
413 free_irq(aaci->dev->irq[0], aaci);
418 static int aaci_pcm_hw_free(struct snd_pcm_substream *substream)
420 struct aaci_runtime *aacirun = substream->runtime->private_data;
423 * This must not be called with the device enabled.
425 WARN_ON(aacirun->cr & CR_EN);
427 if (aacirun->pcm_open)
428 snd_ac97_pcm_close(aacirun->pcm);
429 aacirun->pcm_open = 0;
432 * Clear out the DMA and any allocated buffers.
434 snd_pcm_lib_free_pages(substream);
439 static int aaci_pcm_hw_params(struct snd_pcm_substream *substream,
440 struct aaci_runtime *aacirun,
441 struct snd_pcm_hw_params *params)
445 aaci_pcm_hw_free(substream);
446 if (aacirun->pcm_open) {
447 snd_ac97_pcm_close(aacirun->pcm);
448 aacirun->pcm_open = 0;
451 err = snd_pcm_lib_malloc_pages(substream,
452 params_buffer_bytes(params));
454 unsigned int rate = params_rate(params);
455 int dbl = rate > 48000;
457 err = snd_ac97_pcm_open(aacirun->pcm, rate,
458 params_channels(params),
459 aacirun->pcm->r[dbl].slots);
461 aacirun->pcm_open = err == 0;
462 aacirun->cr = CR_FEN | CR_COMPACT | CR_SZ16;
463 aacirun->fifosz = aaci->fifosize * 4;
465 if (aacirun->cr & CR_COMPACT)
466 aacirun->fifosz >>= 1;
472 static int aaci_pcm_prepare(struct snd_pcm_substream *substream)
474 struct snd_pcm_runtime *runtime = substream->runtime;
475 struct aaci_runtime *aacirun = runtime->private_data;
477 aacirun->start = runtime->dma_area;
478 aacirun->end = aacirun->start + snd_pcm_lib_buffer_bytes(substream);
479 aacirun->ptr = aacirun->start;
481 aacirun->bytes = frames_to_bytes(runtime, runtime->period_size);
486 static snd_pcm_uframes_t aaci_pcm_pointer(struct snd_pcm_substream *substream)
488 struct snd_pcm_runtime *runtime = substream->runtime;
489 struct aaci_runtime *aacirun = runtime->private_data;
490 ssize_t bytes = aacirun->ptr - aacirun->start;
492 return bytes_to_frames(runtime, bytes);
497 * Playback specific ALSA stuff
499 static const u32 channels_to_txmask[] = {
500 [2] = CR_SL3 | CR_SL4,
501 [4] = CR_SL3 | CR_SL4 | CR_SL7 | CR_SL8,
502 [6] = CR_SL3 | CR_SL4 | CR_SL7 | CR_SL8 | CR_SL6 | CR_SL9,
506 * We can support two and four channel audio. Unfortunately
507 * six channel audio requires a non-standard channel ordering:
509 * 4 -> FL(3), FR(4), SL(7), SR(8)
510 * 6 -> FL(3), FR(4), SL(7), SR(8), C(6), LFE(9) (required)
511 * FL(3), FR(4), C(6), SL(7), SR(8), LFE(9) (actual)
512 * This requires an ALSA configuration file to correct.
514 static unsigned int channel_list[] = { 2, 4, 6 };
517 aaci_rule_channels(struct snd_pcm_hw_params *p, struct snd_pcm_hw_rule *rule)
519 struct aaci *aaci = rule->private;
520 unsigned int chan_mask = 1 << 0, slots;
523 * pcms[0] is the our 5.1 PCM instance.
525 slots = aaci->ac97_bus->pcms[0].r[0].slots;
526 if (slots & (1 << AC97_SLOT_PCM_SLEFT)) {
528 if (slots & (1 << AC97_SLOT_LFE))
532 return snd_interval_list(hw_param_interval(p, rule->var),
533 ARRAY_SIZE(channel_list), channel_list,
537 static int aaci_pcm_open(struct snd_pcm_substream *substream)
539 struct aaci *aaci = substream->private_data;
543 * Add rule describing channel dependency.
545 ret = snd_pcm_hw_rule_add(substream->runtime, 0,
546 SNDRV_PCM_HW_PARAM_CHANNELS,
547 aaci_rule_channels, aaci,
548 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
552 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
553 ret = __aaci_pcm_open(aaci, substream, &aaci->playback);
555 ret = __aaci_pcm_open(aaci, substream, &aaci->capture);
560 static int aaci_pcm_playback_hw_params(struct snd_pcm_substream *substream,
561 struct snd_pcm_hw_params *params)
563 struct aaci *aaci = substream->private_data;
564 struct aaci_runtime *aacirun = substream->runtime->private_data;
565 unsigned int channels = params_channels(params);
568 WARN_ON(channels >= ARRAY_SIZE(channels_to_txmask) ||
569 !channels_to_txmask[channels]);
571 ret = aaci_pcm_hw_params(substream, aacirun, params);
574 * Enable FIFO, compact mode, 16 bits per sample.
575 * FIXME: double rate slots?
578 aacirun->cr |= channels_to_txmask[channels];
583 static void aaci_pcm_playback_stop(struct aaci_runtime *aacirun)
587 ie = readl(aacirun->base + AACI_IE);
588 ie &= ~(IE_URIE|IE_TXIE);
589 writel(ie, aacirun->base + AACI_IE);
590 aacirun->cr &= ~CR_EN;
591 aaci_chan_wait_ready(aacirun, SR_TXB);
592 writel(aacirun->cr, aacirun->base + AACI_TXCR);
595 static void aaci_pcm_playback_start(struct aaci_runtime *aacirun)
599 aaci_chan_wait_ready(aacirun, SR_TXB);
600 aacirun->cr |= CR_EN;
602 ie = readl(aacirun->base + AACI_IE);
603 ie |= IE_URIE | IE_TXIE;
604 writel(ie, aacirun->base + AACI_IE);
605 writel(aacirun->cr, aacirun->base + AACI_TXCR);
608 static int aaci_pcm_playback_trigger(struct snd_pcm_substream *substream, int cmd)
610 struct aaci_runtime *aacirun = substream->runtime->private_data;
614 spin_lock_irqsave(&aacirun->lock, flags);
617 case SNDRV_PCM_TRIGGER_START:
618 aaci_pcm_playback_start(aacirun);
621 case SNDRV_PCM_TRIGGER_RESUME:
622 aaci_pcm_playback_start(aacirun);
625 case SNDRV_PCM_TRIGGER_STOP:
626 aaci_pcm_playback_stop(aacirun);
629 case SNDRV_PCM_TRIGGER_SUSPEND:
630 aaci_pcm_playback_stop(aacirun);
633 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
636 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
643 spin_unlock_irqrestore(&aacirun->lock, flags);
648 static struct snd_pcm_ops aaci_playback_ops = {
649 .open = aaci_pcm_open,
650 .close = aaci_pcm_close,
651 .ioctl = snd_pcm_lib_ioctl,
652 .hw_params = aaci_pcm_playback_hw_params,
653 .hw_free = aaci_pcm_hw_free,
654 .prepare = aaci_pcm_prepare,
655 .trigger = aaci_pcm_playback_trigger,
656 .pointer = aaci_pcm_pointer,
659 static int aaci_pcm_capture_hw_params(struct snd_pcm_substream *substream,
660 struct snd_pcm_hw_params *params)
662 struct aaci *aaci = substream->private_data;
663 struct aaci_runtime *aacirun = substream->runtime->private_data;
666 ret = aaci_pcm_hw_params(substream, aacirun, params);
668 /* Line in record: slot 3 and 4 */
669 aacirun->cr |= CR_SL3 | CR_SL4;
674 static void aaci_pcm_capture_stop(struct aaci_runtime *aacirun)
678 aaci_chan_wait_ready(aacirun, SR_RXB);
680 ie = readl(aacirun->base + AACI_IE);
681 ie &= ~(IE_ORIE | IE_RXIE);
682 writel(ie, aacirun->base+AACI_IE);
684 aacirun->cr &= ~CR_EN;
686 writel(aacirun->cr, aacirun->base + AACI_RXCR);
689 static void aaci_pcm_capture_start(struct aaci_runtime *aacirun)
693 aaci_chan_wait_ready(aacirun, SR_RXB);
696 /* RX Timeout value: bits 28:17 in RXCR */
697 aacirun->cr |= 0xf << 17;
700 aacirun->cr |= CR_EN;
701 writel(aacirun->cr, aacirun->base + AACI_RXCR);
703 ie = readl(aacirun->base + AACI_IE);
704 ie |= IE_ORIE |IE_RXIE; // overrun and rx interrupt -- half full
705 writel(ie, aacirun->base + AACI_IE);
708 static int aaci_pcm_capture_trigger(struct snd_pcm_substream *substream, int cmd)
710 struct aaci_runtime *aacirun = substream->runtime->private_data;
714 spin_lock_irqsave(&aacirun->lock, flags);
717 case SNDRV_PCM_TRIGGER_START:
718 aaci_pcm_capture_start(aacirun);
721 case SNDRV_PCM_TRIGGER_RESUME:
722 aaci_pcm_capture_start(aacirun);
725 case SNDRV_PCM_TRIGGER_STOP:
726 aaci_pcm_capture_stop(aacirun);
729 case SNDRV_PCM_TRIGGER_SUSPEND:
730 aaci_pcm_capture_stop(aacirun);
733 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
736 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
743 spin_unlock_irqrestore(&aacirun->lock, flags);
748 static int aaci_pcm_capture_prepare(struct snd_pcm_substream *substream)
750 struct snd_pcm_runtime *runtime = substream->runtime;
751 struct aaci *aaci = substream->private_data;
753 aaci_pcm_prepare(substream);
755 /* allow changing of sample rate */
756 aaci_ac97_write(aaci->ac97, AC97_EXTENDED_STATUS, 0x0001); /* VRA */
757 aaci_ac97_write(aaci->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
758 aaci_ac97_write(aaci->ac97, AC97_PCM_MIC_ADC_RATE, runtime->rate);
760 /* Record select: Mic: 0, Aux: 3, Line: 4 */
761 aaci_ac97_write(aaci->ac97, AC97_REC_SEL, 0x0404);
766 static struct snd_pcm_ops aaci_capture_ops = {
767 .open = aaci_pcm_open,
768 .close = aaci_pcm_close,
769 .ioctl = snd_pcm_lib_ioctl,
770 .hw_params = aaci_pcm_capture_hw_params,
771 .hw_free = aaci_pcm_hw_free,
772 .prepare = aaci_pcm_capture_prepare,
773 .trigger = aaci_pcm_capture_trigger,
774 .pointer = aaci_pcm_pointer,
781 static int aaci_do_suspend(struct snd_card *card, unsigned int state)
783 struct aaci *aaci = card->private_data;
784 snd_power_change_state(card, SNDRV_CTL_POWER_D3cold);
785 snd_pcm_suspend_all(aaci->pcm);
789 static int aaci_do_resume(struct snd_card *card, unsigned int state)
791 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
795 static int aaci_suspend(struct amba_device *dev, pm_message_t state)
797 struct snd_card *card = amba_get_drvdata(dev);
798 return card ? aaci_do_suspend(card) : 0;
801 static int aaci_resume(struct amba_device *dev)
803 struct snd_card *card = amba_get_drvdata(dev);
804 return card ? aaci_do_resume(card) : 0;
807 #define aaci_do_suspend NULL
808 #define aaci_do_resume NULL
809 #define aaci_suspend NULL
810 #define aaci_resume NULL
814 static struct ac97_pcm ac97_defs[] __devinitdata = {
815 [0] = { /* Front PCM */
819 .slots = (1 << AC97_SLOT_PCM_LEFT) |
820 (1 << AC97_SLOT_PCM_RIGHT) |
821 (1 << AC97_SLOT_PCM_CENTER) |
822 (1 << AC97_SLOT_PCM_SLEFT) |
823 (1 << AC97_SLOT_PCM_SRIGHT) |
824 (1 << AC97_SLOT_LFE),
827 .slots = (1 << AC97_SLOT_PCM_LEFT) |
828 (1 << AC97_SLOT_PCM_RIGHT) |
829 (1 << AC97_SLOT_PCM_LEFT_0) |
830 (1 << AC97_SLOT_PCM_RIGHT_0),
839 .slots = (1 << AC97_SLOT_PCM_LEFT) |
840 (1 << AC97_SLOT_PCM_RIGHT),
849 .slots = (1 << AC97_SLOT_MIC),
855 static struct snd_ac97_bus_ops aaci_bus_ops = {
856 .write = aaci_ac97_write,
857 .read = aaci_ac97_read,
860 static int __devinit aaci_probe_ac97(struct aaci *aaci)
862 struct snd_ac97_template ac97_template;
863 struct snd_ac97_bus *ac97_bus;
864 struct snd_ac97 *ac97;
867 writel(0, aaci->base + AC97_POWERDOWN);
869 * Assert AACIRESET for 2us
871 writel(0, aaci->base + AACI_RESET);
873 writel(RESET_NRST, aaci->base + AACI_RESET);
876 * Give the AC'97 codec more than enough time
877 * to wake up. (42us = ~2 frames at 48kHz.)
881 ret = snd_ac97_bus(aaci->card, 0, &aaci_bus_ops, aaci, &ac97_bus);
885 ac97_bus->clock = 48000;
886 aaci->ac97_bus = ac97_bus;
888 memset(&ac97_template, 0, sizeof(struct snd_ac97_template));
889 ac97_template.private_data = aaci;
890 ac97_template.num = 0;
891 ac97_template.scaps = AC97_SCAP_SKIP_MODEM;
893 ret = snd_ac97_mixer(ac97_bus, &ac97_template, &ac97);
899 * Disable AC97 PC Beep input on audio codecs.
901 if (ac97_is_audio(ac97))
902 snd_ac97_write_cache(ac97, AC97_PC_BEEP, 0x801e);
904 ret = snd_ac97_pcm_assign(ac97_bus, ARRAY_SIZE(ac97_defs), ac97_defs);
908 aaci->playback.pcm = &ac97_bus->pcms[0];
909 aaci->capture.pcm = &ac97_bus->pcms[1];
915 static void aaci_free_card(struct snd_card *card)
917 struct aaci *aaci = card->private_data;
922 static struct aaci * __devinit aaci_init_card(struct amba_device *dev)
925 struct snd_card *card;
928 err = snd_card_create(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
929 THIS_MODULE, sizeof(struct aaci), &card);
933 card->private_free = aaci_free_card;
935 strlcpy(card->driver, DRIVER_NAME, sizeof(card->driver));
936 strlcpy(card->shortname, "ARM AC'97 Interface", sizeof(card->shortname));
937 snprintf(card->longname, sizeof(card->longname),
938 "%s at 0x%016llx, irq %d",
939 card->shortname, (unsigned long long)dev->res.start,
942 aaci = card->private_data;
943 mutex_init(&aaci->ac97_sem);
947 /* Set MAINCR to allow slot 1 and 2 data IO */
948 aaci->maincr = MAINCR_IE | MAINCR_SL1RXEN | MAINCR_SL1TXEN |
949 MAINCR_SL2RXEN | MAINCR_SL2TXEN;
954 static int __devinit aaci_init_pcm(struct aaci *aaci)
959 ret = snd_pcm_new(aaci->card, "AACI AC'97", 0, 1, 1, &pcm);
962 pcm->private_data = aaci;
965 strlcpy(pcm->name, DRIVER_NAME, sizeof(pcm->name));
967 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &aaci_playback_ops);
968 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &aaci_capture_ops);
969 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
976 static unsigned int __devinit aaci_size_fifo(struct aaci *aaci)
978 struct aaci_runtime *aacirun = &aaci->playback;
981 writel(CR_FEN | CR_SZ16 | CR_EN, aacirun->base + AACI_TXCR);
983 for (i = 0; !(readl(aacirun->base + AACI_SR) & SR_TXFF) && i < 4096; i++)
984 writel(0, aacirun->fifo);
986 writel(0, aacirun->base + AACI_TXCR);
989 * Re-initialise the AACI after the FIFO depth test, to
990 * ensure that the FIFOs are empty. Unfortunately, merely
991 * disabling the channel doesn't clear the FIFO.
993 writel(aaci->maincr & ~MAINCR_IE, aaci->base + AACI_MAINCR);
994 writel(aaci->maincr, aaci->base + AACI_MAINCR);
997 * If we hit 4096, we failed. Go back to the specified
1006 static int __devinit aaci_probe(struct amba_device *dev, struct amba_id *id)
1011 ret = amba_request_regions(dev, NULL);
1015 aaci = aaci_init_card(dev);
1021 aaci->base = ioremap(dev->res.start, resource_size(&dev->res));
1028 * Playback uses AACI channel 0
1030 spin_lock_init(&aaci->playback.lock);
1031 aaci->playback.base = aaci->base + AACI_CSCH1;
1032 aaci->playback.fifo = aaci->base + AACI_DR1;
1035 * Capture uses AACI channel 0
1037 spin_lock_init(&aaci->capture.lock);
1038 aaci->capture.base = aaci->base + AACI_CSCH1;
1039 aaci->capture.fifo = aaci->base + AACI_DR1;
1041 for (i = 0; i < 4; i++) {
1042 void __iomem *base = aaci->base + i * 0x14;
1044 writel(0, base + AACI_IE);
1045 writel(0, base + AACI_TXCR);
1046 writel(0, base + AACI_RXCR);
1049 writel(0x1fff, aaci->base + AACI_INTCLR);
1050 writel(aaci->maincr, aaci->base + AACI_MAINCR);
1052 ret = aaci_probe_ac97(aaci);
1057 * Size the FIFOs (must be multiple of 16).
1059 aaci->fifosize = aaci_size_fifo(aaci);
1060 if (aaci->fifosize & 15) {
1061 printk(KERN_WARNING "AACI: fifosize = %d not supported\n",
1067 ret = aaci_init_pcm(aaci);
1071 snd_card_set_dev(aaci->card, &dev->dev);
1073 ret = snd_card_register(aaci->card);
1075 dev_info(&dev->dev, "%s, fifo %d\n", aaci->card->longname,
1077 amba_set_drvdata(dev, aaci->card);
1083 snd_card_free(aaci->card);
1084 amba_release_regions(dev);
1088 static int __devexit aaci_remove(struct amba_device *dev)
1090 struct snd_card *card = amba_get_drvdata(dev);
1092 amba_set_drvdata(dev, NULL);
1095 struct aaci *aaci = card->private_data;
1096 writel(0, aaci->base + AACI_MAINCR);
1098 snd_card_free(card);
1099 amba_release_regions(dev);
1105 static struct amba_id aaci_ids[] = {
1113 static struct amba_driver aaci_driver = {
1115 .name = DRIVER_NAME,
1117 .probe = aaci_probe,
1118 .remove = __devexit_p(aaci_remove),
1119 .suspend = aaci_suspend,
1120 .resume = aaci_resume,
1121 .id_table = aaci_ids,
1124 static int __init aaci_init(void)
1126 return amba_driver_register(&aaci_driver);
1129 static void __exit aaci_exit(void)
1131 amba_driver_unregister(&aaci_driver);
1134 module_init(aaci_init);
1135 module_exit(aaci_exit);
1137 MODULE_LICENSE("GPL");
1138 MODULE_DESCRIPTION("ARM PrimeCell PL041 Advanced Audio CODEC Interface driver");