5 * Author: Hannu Mallat <hmallat@cc.hut.fi>
7 * Copyright © 1999 Hannu Mallat
10 * Created : Thu Sep 23 18:17:43 1999, hmallat
11 * Last modified: Tue Nov 2 21:19:47 1999, hmallat
13 * Lots of the information here comes from the Daryll Strauss' Banshee
14 * patches to the XF86 server, and the rest comes from the 3dfx
15 * Banshee specification. I'm very much indebted to Daryll for his
16 * work on the X server.
18 * Voodoo3 support was contributed Harold Oga. Lots of additions
19 * (proper acceleration, 24 bpp, hardware cursor) and bug fixes by Attila
20 * Kesmarki. Thanks guys!
22 * Voodoo1 and Voodoo2 support aren't relevant to this driver as they
23 * behave very differently from the Voodoo3/4/5. For anyone wanting to
24 * use frame buffer on the Voodoo1/2, see the sstfb driver (which is
25 * located at http://www.sourceforge.net/projects/sstfb).
27 * While I _am_ grateful to 3Dfx for releasing the specs for Banshee,
28 * I do wish the next version is a bit more complete. Without the XF86
29 * patches I couldn't have gotten even this far... for instance, the
30 * extensions to the VGA register set go completely unmentioned in the
31 * spec! Also, lots of references are made to the 'SST core', but no
32 * spec is publicly available, AFAIK.
34 * The structure of this driver comes pretty much from the Permedia
35 * driver by Ilario Nardinocchi, which in turn is based on skeletonfb.
38 * - multihead support (basically need to support an array of fb_infos)
39 * - support other architectures (PPC, Alpha); does the fact that the VGA
40 * core can be accessed only thru I/O (not memory mapped) complicate
45 * 0.1.4 (released 2002-05-28) ported over to new fbdev api by James Simmons
47 * 0.1.3 (released 1999-11-02) added Attila's panning support, code
48 * reorg, hwcursor address page size alignment
49 * (for mmaping both frame buffer and regs),
50 * and my changes to get rid of hardcoded
51 * VGA i/o register locations (uses PCI
52 * configuration info now)
53 * 0.1.2 (released 1999-10-19) added Attila Kesmarki's bug fixes and
55 * 0.1.1 (released 1999-10-07) added Voodoo3 support by Harold Oga.
56 * 0.1.0 (released 1999-10-06) initial version
60 #include <linux/module.h>
61 #include <linux/kernel.h>
62 #include <linux/errno.h>
63 #include <linux/string.h>
65 #include <linux/slab.h>
67 #include <linux/init.h>
68 #include <linux/pci.h>
70 #include <linux/spinlock.h>
72 #include <video/tdfx.h>
76 #define DPRINTK(a,b...) printk(KERN_DEBUG "fb: %s: " a, __FUNCTION__ , ## b)
78 #define DPRINTK(a,b...)
81 #define BANSHEE_MAX_PIXCLOCK 270000
82 #define VOODOO3_MAX_PIXCLOCK 300000
83 #define VOODOO5_MAX_PIXCLOCK 350000
85 static struct fb_fix_screeninfo tdfx_fix __devinitdata = {
87 .type = FB_TYPE_PACKED_PIXELS,
88 .visual = FB_VISUAL_PSEUDOCOLOR,
91 .accel = FB_ACCEL_3DFX_BANSHEE
94 static struct fb_var_screeninfo tdfx_var __devinitdata = {
95 /* "640x480, 8 bpp @ 60 Hz */
104 .activate = FB_ACTIVATE_NOW,
107 .accel_flags = FB_ACCELF_TEXT,
115 .vmode = FB_VMODE_NONINTERLACED
119 * PCI driver prototypes
121 static int __devinit tdfxfb_probe(struct pci_dev *pdev,
122 const struct pci_device_id *id);
123 static void __devexit tdfxfb_remove(struct pci_dev *pdev);
125 static struct pci_device_id tdfxfb_id_table[] = {
126 { PCI_VENDOR_ID_3DFX, PCI_DEVICE_ID_3DFX_BANSHEE,
127 PCI_ANY_ID, PCI_ANY_ID, PCI_BASE_CLASS_DISPLAY << 16,
129 { PCI_VENDOR_ID_3DFX, PCI_DEVICE_ID_3DFX_VOODOO3,
130 PCI_ANY_ID, PCI_ANY_ID, PCI_BASE_CLASS_DISPLAY << 16,
132 { PCI_VENDOR_ID_3DFX, PCI_DEVICE_ID_3DFX_VOODOO5,
133 PCI_ANY_ID, PCI_ANY_ID, PCI_BASE_CLASS_DISPLAY << 16,
138 static struct pci_driver tdfxfb_driver = {
140 .id_table = tdfxfb_id_table,
141 .probe = tdfxfb_probe,
142 .remove = __devexit_p(tdfxfb_remove),
145 MODULE_DEVICE_TABLE(pci, tdfxfb_id_table);
151 static int nowrap = 1; /* not implemented (yet) */
152 static int hwcursor = 1;
153 static char *mode_option __devinitdata = NULL;
155 /* -------------------------------------------------------------------------
156 * Hardware-specific funcions
157 * ------------------------------------------------------------------------- */
159 static inline u8 vga_inb(struct tdfx_par *par, u32 reg)
161 return inb(par->iobase + reg - 0x300);
164 static inline void vga_outb(struct tdfx_par *par, u32 reg, u8 val)
166 outb(val, par->iobase + reg - 0x300);
169 static inline void gra_outb(struct tdfx_par *par, u32 idx, u8 val)
171 vga_outb(par, GRA_I, idx);
173 vga_outb(par, GRA_D, val);
177 static inline void seq_outb(struct tdfx_par *par, u32 idx, u8 val)
179 vga_outb(par, SEQ_I, idx);
181 vga_outb(par, SEQ_D, val);
185 static inline u8 seq_inb(struct tdfx_par *par, u32 idx)
187 vga_outb(par, SEQ_I, idx);
189 return vga_inb(par, SEQ_D);
192 static inline void crt_outb(struct tdfx_par *par, u32 idx, u8 val)
194 vga_outb(par, CRT_I, idx);
196 vga_outb(par, CRT_D, val);
200 static inline u8 crt_inb(struct tdfx_par *par, u32 idx)
202 vga_outb(par, CRT_I, idx);
204 return vga_inb(par, CRT_D);
207 static inline void att_outb(struct tdfx_par *par, u32 idx, u8 val)
211 tmp = vga_inb(par, IS1_R);
212 vga_outb(par, ATT_IW, idx);
213 vga_outb(par, ATT_IW, val);
216 static inline void vga_disable_video(struct tdfx_par *par)
220 s = seq_inb(par, 0x01) | 0x20;
221 seq_outb(par, 0x00, 0x01);
222 seq_outb(par, 0x01, s);
223 seq_outb(par, 0x00, 0x03);
226 static inline void vga_enable_video(struct tdfx_par *par)
230 s = seq_inb(par, 0x01) & 0xdf;
231 seq_outb(par, 0x00, 0x01);
232 seq_outb(par, 0x01, s);
233 seq_outb(par, 0x00, 0x03);
236 static inline void vga_enable_palette(struct tdfx_par *par)
240 vga_outb(par, ATT_IW, 0x20);
243 static inline u32 tdfx_inl(struct tdfx_par *par, unsigned int reg)
245 return readl(par->regbase_virt + reg);
248 static inline void tdfx_outl(struct tdfx_par *par, unsigned int reg, u32 val)
250 writel(val, par->regbase_virt + reg);
253 static inline void banshee_make_room(struct tdfx_par *par, int size)
255 /* Note: The Voodoo3's onboard FIFO has 32 slots. This loop
256 * won't quit if you ask for more. */
257 while ((tdfx_inl(par, STATUS) & 0x1f) < size - 1) ;
260 static int banshee_wait_idle(struct fb_info *info)
262 struct tdfx_par *par = info->par;
265 banshee_make_room(par, 1);
266 tdfx_outl(par, COMMAND_3D, COMMAND_3D_NOP);
269 if ((tdfx_inl(par, STATUS) & STATUS_BUSY) == 0)
277 * Set the color of a palette entry in 8bpp mode
279 static inline void do_setpalentry(struct tdfx_par *par, unsigned regno, u32 c)
281 banshee_make_room(par, 2);
282 tdfx_outl(par, DACADDR, regno);
283 /* read after write makes it working */
284 tdfx_inl(par, DACADDR);
285 tdfx_outl(par, DACDATA, c);
288 static u32 do_calc_pll(int freq, int *freq_out)
290 int m, n, k, best_m, best_n, best_k, best_error;
294 best_n = best_m = best_k = 0;
296 for (k = 3; k >= 0; k--) {
297 for (m = 63; m >= 0; m--) {
299 * Estimate value of n that produces target frequency
300 * with current m and k
302 int n_estimated = ((freq * (m + 2) << k) / fref) - 2;
304 /* Search neighborhood of estimated n */
305 for (n = max(0, n_estimated);
306 n <= min(255, n_estimated + 1);
309 * Calculate PLL freqency with current m, k and
312 int f = (fref * (n + 2) / (m + 2)) >> k;
313 int error = abs(f - freq);
316 * If this is the closest we've come to the
317 * target frequency then remember n, m and k
319 if (error < best_error) {
332 *freq_out = (fref * (n + 2) / (m + 2)) >> k;
334 return (n << 8) | (m << 2) | k;
337 static void do_write_regs(struct fb_info *info, struct banshee_reg *reg)
339 struct tdfx_par *par = info->par;
342 banshee_wait_idle(info);
344 tdfx_outl(par, MISCINIT1, tdfx_inl(par, MISCINIT1) | 0x01);
346 crt_outb(par, 0x11, crt_inb(par, 0x11) & 0x7f); /* CRT unprotect */
348 banshee_make_room(par, 3);
349 tdfx_outl(par, VGAINIT1, reg->vgainit1 & 0x001FFFFF);
350 tdfx_outl(par, VIDPROCCFG, reg->vidcfg & ~0x00000001);
352 tdfx_outl(par, PLLCTRL1, reg->mempll);
353 tdfx_outl(par, PLLCTRL2, reg->gfxpll);
355 tdfx_outl(par, PLLCTRL0, reg->vidpll);
357 vga_outb(par, MISC_W, reg->misc[0x00] | 0x01);
359 for (i = 0; i < 5; i++)
360 seq_outb(par, i, reg->seq[i]);
362 for (i = 0; i < 25; i++)
363 crt_outb(par, i, reg->crt[i]);
365 for (i = 0; i < 9; i++)
366 gra_outb(par, i, reg->gra[i]);
368 for (i = 0; i < 21; i++)
369 att_outb(par, i, reg->att[i]);
371 crt_outb(par, 0x1a, reg->ext[0]);
372 crt_outb(par, 0x1b, reg->ext[1]);
374 vga_enable_palette(par);
375 vga_enable_video(par);
377 banshee_make_room(par, 9);
378 tdfx_outl(par, VGAINIT0, reg->vgainit0);
379 tdfx_outl(par, DACMODE, reg->dacmode);
380 tdfx_outl(par, VIDDESKSTRIDE, reg->stride);
381 tdfx_outl(par, HWCURPATADDR, reg->curspataddr);
383 tdfx_outl(par, VIDSCREENSIZE, reg->screensize);
384 tdfx_outl(par, VIDDESKSTART, reg->startaddr);
385 tdfx_outl(par, VIDPROCCFG, reg->vidcfg);
386 tdfx_outl(par, VGAINIT1, reg->vgainit1);
387 tdfx_outl(par, MISCINIT0, reg->miscinit0);
389 banshee_make_room(par, 8);
390 tdfx_outl(par, SRCBASE, reg->startaddr);
391 tdfx_outl(par, DSTBASE, reg->startaddr);
392 tdfx_outl(par, COMMANDEXTRA_2D, 0);
393 tdfx_outl(par, CLIP0MIN, 0);
394 tdfx_outl(par, CLIP0MAX, 0x0fff0fff);
395 tdfx_outl(par, CLIP1MIN, 0);
396 tdfx_outl(par, CLIP1MAX, 0x0fff0fff);
397 tdfx_outl(par, SRCXY, 0);
399 banshee_wait_idle(info);
402 static unsigned long do_lfb_size(struct tdfx_par *par, unsigned short dev_id)
404 u32 draminit0 = tdfx_inl(par, DRAMINIT0);
405 u32 draminit1 = tdfx_inl(par, DRAMINIT1);
407 int num_chips = (draminit0 & DRAMINIT0_SGRAM_NUM) ? 8 : 4;
408 int chip_size; /* in MB */
409 int has_sgram = draminit1 & DRAMINIT1_MEM_SDRAM;
411 if (dev_id < PCI_DEVICE_ID_3DFX_VOODOO5) {
412 /* Banshee/Voodoo3 */
414 if (has_sgram && (draminit0 & DRAMINIT0_SGRAM_TYPE))
419 chip_size = draminit0 & DRAMINIT0_SGRAM_TYPE_MASK;
420 chip_size = 1 << (chip_size >> DRAMINIT0_SGRAM_TYPE_SHIFT);
423 /* disable block writes for SDRAM */
424 miscinit1 = tdfx_inl(par, MISCINIT1);
425 miscinit1 |= has_sgram ? 0 : MISCINIT1_2DBLOCK_DIS;
426 miscinit1 |= MISCINIT1_CLUT_INV;
428 banshee_make_room(par, 1);
429 tdfx_outl(par, MISCINIT1, miscinit1);
430 return num_chips * chip_size * 1024l * 1024;
433 /* ------------------------------------------------------------------------- */
435 static int tdfxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
437 struct tdfx_par *par = info->par;
440 if (var->bits_per_pixel != 8 && var->bits_per_pixel != 16 &&
441 var->bits_per_pixel != 24 && var->bits_per_pixel != 32) {
442 DPRINTK("depth not supported: %u\n", var->bits_per_pixel);
446 if (var->xres != var->xres_virtual)
447 var->xres_virtual = var->xres;
449 if (var->yres > var->yres_virtual)
450 var->yres_virtual = var->yres;
453 DPRINTK("xoffset not supported\n");
458 /* Banshee doesn't support interlace, but Voodoo4/5 and probably Voodoo3 do. */
459 /* no direct information about device id now? use max_pixclock for this... */
460 if (((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) &&
461 (par->max_pixclock < VOODOO3_MAX_PIXCLOCK)) {
462 DPRINTK("interlace not supported\n");
466 var->xres = (var->xres + 15) & ~15; /* could sometimes be 8 */
467 lpitch = var->xres * ((var->bits_per_pixel + 7) >> 3);
469 if (var->xres < 320 || var->xres > 2048) {
470 DPRINTK("width not supported: %u\n", var->xres);
474 if (var->yres < 200 || var->yres > 2048) {
475 DPRINTK("height not supported: %u\n", var->yres);
479 if (lpitch * var->yres_virtual > info->fix.smem_len) {
480 var->yres_virtual = info->fix.smem_len / lpitch;
481 if (var->yres_virtual < var->yres) {
482 DPRINTK("no memory for screen (%ux%ux%u)\n",
483 var->xres, var->yres_virtual,
484 var->bits_per_pixel);
489 if (PICOS2KHZ(var->pixclock) > par->max_pixclock) {
490 DPRINTK("pixclock too high (%ldKHz)\n",
491 PICOS2KHZ(var->pixclock));
495 var->transp.offset = 0;
496 var->transp.length = 0;
497 switch (var->bits_per_pixel) {
499 var->red.length = var->green.length = var->blue.length = 8;
502 var->red.offset = 11;
504 var->green.offset = 5;
505 var->green.length = 6;
506 var->blue.offset = 0;
507 var->blue.length = 5;
510 var->transp.offset = 24;
511 var->transp.length = 8;
513 var->red.offset = 16;
514 var->green.offset = 8;
515 var->blue.offset = 0;
516 var->red.length = var->green.length = var->blue.length = 8;
519 var->height = var->width = -1;
521 var->accel_flags = FB_ACCELF_TEXT;
523 DPRINTK("Checking graphics mode at %dx%d depth %d\n",
524 var->xres, var->yres, var->bits_per_pixel);
528 static int tdfxfb_set_par(struct fb_info *info)
530 struct tdfx_par *par = info->par;
531 u32 hdispend = info->var.xres;
532 u32 hsyncsta = hdispend + info->var.right_margin;
533 u32 hsyncend = hsyncsta + info->var.hsync_len;
534 u32 htotal = hsyncend + info->var.left_margin;
535 u32 hd, hs, he, ht, hbs, hbe;
536 u32 vd, vs, ve, vt, vbs, vbe;
537 struct banshee_reg reg;
540 u32 cpp = (info->var.bits_per_pixel + 7) >> 3;
542 memset(®, 0, sizeof(reg));
544 reg.vidcfg = VIDCFG_VIDPROC_ENABLE | VIDCFG_DESK_ENABLE |
546 ((cpp - 1) << VIDCFG_PIXFMT_SHIFT) |
547 (cpp != 1 ? VIDCFG_CLUT_BYPASS : 0);
550 freq = PICOS2KHZ(info->var.pixclock);
552 reg.vidcfg &= ~VIDCFG_2X;
554 if (freq > par->max_pixclock / 2) {
555 freq = freq > par->max_pixclock ? par->max_pixclock : freq;
556 reg.dacmode |= DACMODE_2X;
557 reg.vidcfg |= VIDCFG_2X;
564 hd = wd = (hdispend >> 3) - 1;
565 hs = (hsyncsta >> 3) - 1;
566 he = (hsyncend >> 3) - 1;
567 ht = (htotal >> 3) - 1;
571 if ((info->var.vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) {
572 vbs = vd = (info->var.yres << 1) - 1;
573 vs = vd + (info->var.lower_margin << 1);
574 ve = vs + (info->var.vsync_len << 1);
575 vbe = vt = ve + (info->var.upper_margin << 1) - 1;
576 reg.screensize = info->var.xres | (info->var.yres << 13);
577 reg.vidcfg |= VIDCFG_HALF_MODE;
578 reg.crt[0x09] = 0x80;
580 vbs = vd = info->var.yres - 1;
581 vs = vd + info->var.lower_margin;
582 ve = vs + info->var.vsync_len;
583 vbe = vt = ve + info->var.upper_margin - 1;
584 reg.screensize = info->var.xres | (info->var.yres << 12);
585 reg.vidcfg &= ~VIDCFG_HALF_MODE;
588 /* this is all pretty standard VGA register stuffing */
589 reg.misc[0x00] = 0x0f |
590 (info->var.xres < 400 ? 0xa0 :
591 info->var.xres < 480 ? 0x60 :
592 info->var.xres < 768 ? 0xe0 : 0x20);
594 reg.gra[0x05] = 0x40;
595 reg.gra[0x06] = 0x05;
596 reg.gra[0x07] = 0x0f;
597 reg.gra[0x08] = 0xff;
599 reg.att[0x00] = 0x00;
600 reg.att[0x01] = 0x01;
601 reg.att[0x02] = 0x02;
602 reg.att[0x03] = 0x03;
603 reg.att[0x04] = 0x04;
604 reg.att[0x05] = 0x05;
605 reg.att[0x06] = 0x06;
606 reg.att[0x07] = 0x07;
607 reg.att[0x08] = 0x08;
608 reg.att[0x09] = 0x09;
609 reg.att[0x0a] = 0x0a;
610 reg.att[0x0b] = 0x0b;
611 reg.att[0x0c] = 0x0c;
612 reg.att[0x0d] = 0x0d;
613 reg.att[0x0e] = 0x0e;
614 reg.att[0x0f] = 0x0f;
615 reg.att[0x10] = 0x41;
616 reg.att[0x12] = 0x0f;
618 reg.seq[0x00] = 0x03;
619 reg.seq[0x01] = 0x01; /* fixme: clkdiv2? */
620 reg.seq[0x02] = 0x0f;
621 reg.seq[0x03] = 0x00;
622 reg.seq[0x04] = 0x0e;
624 reg.crt[0x00] = ht - 4;
627 reg.crt[0x03] = 0x80 | (hbe & 0x1f);
629 reg.crt[0x05] = ((hbe & 0x20) << 2) | (he & 0x1f);
631 reg.crt[0x07] = ((vs & 0x200) >> 2) |
632 ((vd & 0x200) >> 3) |
633 ((vt & 0x200) >> 4) | 0x10 |
634 ((vbs & 0x100) >> 5) |
635 ((vs & 0x100) >> 6) |
636 ((vd & 0x100) >> 7) |
638 reg.crt[0x09] |= 0x40 | ((vbs & 0x200) >> 4);
640 reg.crt[0x11] = (ve & 0x0f) | 0x20;
644 reg.crt[0x16] = vbe + 1;
645 reg.crt[0x17] = 0xc3;
646 reg.crt[0x18] = 0xff;
648 /* Banshee's nonvga stuff */
649 reg.ext[0x00] = (((ht & 0x100) >> 8) |
650 ((hd & 0x100) >> 6) |
651 ((hbs & 0x100) >> 4) |
652 ((hbe & 0x40) >> 1) |
653 ((hs & 0x100) >> 2) |
655 reg.ext[0x01] = (((vt & 0x400) >> 10) |
656 ((vd & 0x400) >> 8) |
657 ((vbs & 0x400) >> 6) |
658 ((vbe & 0x400) >> 4));
660 reg.vgainit0 = VGAINIT0_8BIT_DAC |
661 VGAINIT0_EXT_ENABLE |
662 VGAINIT0_WAKEUP_3C3 |
663 VGAINIT0_ALT_READBACK |
664 VGAINIT0_EXTSHIFTOUT;
665 reg.vgainit1 = tdfx_inl(par, VGAINIT1) & 0x1fffff;
668 reg.curspataddr = info->fix.smem_len;
673 reg.cursc1 = 0xffffff;
675 reg.stride = info->var.xres * cpp;
676 reg.startaddr = info->var.yoffset * reg.stride
677 + info->var.xoffset * cpp;
679 reg.vidpll = do_calc_pll(freq, &fout);
681 reg.mempll = do_calc_pll(..., &fout);
682 reg.gfxpll = do_calc_pll(..., &fout);
685 if ((info->var.vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED)
686 reg.vidcfg |= VIDCFG_INTERLACE;
687 reg.miscinit0 = tdfx_inl(par, MISCINIT0);
689 #if defined(__BIG_ENDIAN)
690 switch (info->var.bits_per_pixel) {
693 reg.miscinit0 &= ~(1 << 30);
694 reg.miscinit0 &= ~(1 << 31);
697 reg.miscinit0 |= (1 << 30);
698 reg.miscinit0 |= (1 << 31);
701 reg.miscinit0 |= (1 << 30);
702 reg.miscinit0 &= ~(1 << 31);
706 do_write_regs(info, ®);
708 /* Now change fb_fix_screeninfo according to changes in par */
709 info->fix.line_length = reg.stride;
710 info->fix.visual = (info->var.bits_per_pixel == 8)
711 ? FB_VISUAL_PSEUDOCOLOR
712 : FB_VISUAL_TRUECOLOR;
713 DPRINTK("Graphics mode is now set at %dx%d depth %d\n",
714 info->var.xres, info->var.yres, info->var.bits_per_pixel);
718 /* A handy macro shamelessly pinched from matroxfb */
719 #define CNVT_TOHW(val, width) ((((val)<<(width))+0x7FFF-(val))>>16)
721 static int tdfxfb_setcolreg(unsigned regno, unsigned red, unsigned green,
722 unsigned blue, unsigned transp,
723 struct fb_info *info)
725 struct tdfx_par *par = info->par;
728 if (regno >= info->cmap.len || regno > 255)
731 /* grayscale works only partially under directcolor */
732 if (info->var.grayscale) {
733 /* grayscale = 0.30*R + 0.59*G + 0.11*B */
734 red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
737 switch (info->fix.visual) {
738 case FB_VISUAL_PSEUDOCOLOR:
739 rgbcol =(((u32)red & 0xff00) << 8) |
740 (((u32)green & 0xff00) << 0) |
741 (((u32)blue & 0xff00) >> 8);
742 do_setpalentry(par, regno, rgbcol);
744 /* Truecolor has no hardware color palettes. */
745 case FB_VISUAL_TRUECOLOR:
747 rgbcol = (CNVT_TOHW(red, info->var.red.length) <<
748 info->var.red.offset) |
749 (CNVT_TOHW(green, info->var.green.length) <<
750 info->var.green.offset) |
751 (CNVT_TOHW(blue, info->var.blue.length) <<
752 info->var.blue.offset) |
753 (CNVT_TOHW(transp, info->var.transp.length) <<
754 info->var.transp.offset);
755 par->palette[regno] = rgbcol;
760 DPRINTK("bad depth %u\n", info->var.bits_per_pixel);
767 /* 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off */
768 static int tdfxfb_blank(int blank, struct fb_info *info)
770 struct tdfx_par *par = info->par;
772 u32 dacmode = tdfx_inl(par, DACMODE);
774 dacmode &= ~(BIT(1) | BIT(3));
777 case FB_BLANK_UNBLANK: /* Screen: On; HSync: On, VSync: On */
780 case FB_BLANK_NORMAL: /* Screen: Off; HSync: On, VSync: On */
782 case FB_BLANK_VSYNC_SUSPEND: /* Screen: Off; HSync: On, VSync: Off */
785 case FB_BLANK_HSYNC_SUSPEND: /* Screen: Off; HSync: Off, VSync: On */
788 case FB_BLANK_POWERDOWN: /* Screen: Off; HSync: Off, VSync: Off */
789 dacmode |= BIT(1) | BIT(3);
793 banshee_make_room(par, 1);
794 tdfx_outl(par, DACMODE, dacmode);
796 vga_disable_video(par);
798 vga_enable_video(par);
803 * Set the starting position of the visible screen to var->yoffset
805 static int tdfxfb_pan_display(struct fb_var_screeninfo *var,
806 struct fb_info *info)
808 struct tdfx_par *par = info->par;
809 u32 addr = var->yoffset * info->fix.line_length;
811 if (nopan || var->xoffset || (var->yoffset > var->yres_virtual))
813 if ((var->yoffset + var->yres > var->yres_virtual && nowrap))
816 banshee_make_room(par, 1);
817 tdfx_outl(par, VIDDESKSTART, addr);
819 info->var.xoffset = var->xoffset;
820 info->var.yoffset = var->yoffset;
824 #ifdef CONFIG_FB_3DFX_ACCEL
826 * FillRect 2D command (solidfill or invert (via ROP_XOR))
828 static void tdfxfb_fillrect(struct fb_info *info,
829 const struct fb_fillrect *rect)
831 struct tdfx_par *par = info->par;
832 u32 bpp = info->var.bits_per_pixel;
833 u32 stride = info->fix.line_length;
834 u32 fmt= stride | ((bpp + ((bpp == 8) ? 0 : 8)) << 13);
840 if (rect->rop == ROP_COPY)
841 tdfx_rop = TDFX_ROP_COPY;
843 tdfx_rop = TDFX_ROP_XOR;
845 /* asume always rect->height < 4096 */
846 if (dy + rect->height > 4095) {
847 dstbase = stride * dy;
850 /* asume always rect->width < 4096 */
851 if (dx + rect->width > 4095) {
852 dstbase += dx * bpp >> 3;
855 banshee_make_room(par, 6);
856 tdfx_outl(par, DSTFORMAT, fmt);
857 if (info->fix.visual == FB_VISUAL_PSEUDOCOLOR) {
858 tdfx_outl(par, COLORFORE, rect->color);
859 } else { /* FB_VISUAL_TRUECOLOR */
860 tdfx_outl(par, COLORFORE, par->palette[rect->color]);
862 tdfx_outl(par, COMMAND_2D, COMMAND_2D_FILLRECT | (tdfx_rop << 24));
863 tdfx_outl(par, DSTBASE, dstbase);
864 tdfx_outl(par, DSTSIZE, rect->width | (rect->height << 16));
865 tdfx_outl(par, LAUNCH_2D, dx | (dy << 16));
869 * Screen-to-Screen BitBlt 2D command (for the bmove fb op.)
871 static void tdfxfb_copyarea(struct fb_info *info,
872 const struct fb_copyarea *area)
874 struct tdfx_par *par = info->par;
875 u32 sx = area->sx, sy = area->sy, dx = area->dx, dy = area->dy;
876 u32 bpp = info->var.bits_per_pixel;
877 u32 stride = info->fix.line_length;
878 u32 blitcmd = COMMAND_2D_S2S_BITBLT | (TDFX_ROP_COPY << 24);
879 u32 fmt = stride | ((bpp + ((bpp == 8) ? 0 : 8)) << 13);
883 /* asume always area->height < 4096 */
884 if (sy + area->height > 4095) {
885 srcbase = stride * sy;
888 /* asume always area->width < 4096 */
889 if (sx + area->width > 4095) {
890 srcbase += sx * bpp >> 3;
893 /* asume always area->height < 4096 */
894 if (dy + area->height > 4095) {
895 dstbase = stride * dy;
898 /* asume always area->width < 4096 */
899 if (dx + area->width > 4095) {
900 dstbase += dx * bpp >> 3;
904 if (area->sx <= area->dx) {
907 sx += area->width - 1;
908 dx += area->width - 1;
910 if (area->sy <= area->dy) {
913 sy += area->height - 1;
914 dy += area->height - 1;
917 banshee_make_room(par, 8);
919 tdfx_outl(par, SRCFORMAT, fmt);
920 tdfx_outl(par, DSTFORMAT, fmt);
921 tdfx_outl(par, COMMAND_2D, blitcmd);
922 tdfx_outl(par, DSTSIZE, area->width | (area->height << 16));
923 tdfx_outl(par, DSTXY, dx | (dy << 16));
924 tdfx_outl(par, SRCBASE, srcbase);
925 tdfx_outl(par, DSTBASE, dstbase);
926 tdfx_outl(par, LAUNCH_2D, sx | (sy << 16));
929 static void tdfxfb_imageblit(struct fb_info *info, const struct fb_image *image)
931 struct tdfx_par *par = info->par;
932 int size = image->height * ((image->width * image->depth + 7) >> 3);
934 int i, stride = info->fix.line_length;
935 u32 bpp = info->var.bits_per_pixel;
936 u32 dstfmt = stride | ((bpp + ((bpp == 8) ? 0 : 8)) << 13);
937 u8 *chardata = (u8 *) image->data;
943 if (image->depth != 1) {
944 //banshee_make_room(par, 6 + ((size + 3) >> 2));
945 //srcfmt = stride | ((bpp+((bpp==8) ? 0 : 8)) << 13) | 0x400000;
946 cfb_imageblit(info, image);
949 banshee_make_room(par, 9);
950 switch (info->fix.visual) {
951 case FB_VISUAL_PSEUDOCOLOR:
952 tdfx_outl(par, COLORFORE, image->fg_color);
953 tdfx_outl(par, COLORBACK, image->bg_color);
955 case FB_VISUAL_TRUECOLOR:
957 tdfx_outl(par, COLORFORE,
958 par->palette[image->fg_color]);
959 tdfx_outl(par, COLORBACK,
960 par->palette[image->bg_color]);
963 srcfmt = 0x400000 | BIT(20);
967 /* asume always image->height < 4096 */
968 if (dy + image->height > 4095) {
969 dstbase = stride * dy;
972 /* asume always image->width < 4096 */
973 if (dx + image->width > 4095) {
974 dstbase += dx * bpp >> 3;
978 tdfx_outl(par, DSTBASE, dstbase);
979 tdfx_outl(par, SRCXY, 0);
980 tdfx_outl(par, DSTXY, dx | (dy << 16));
981 tdfx_outl(par, COMMAND_2D, COMMAND_2D_H2S_BITBLT | (TDFX_ROP_COPY << 24));
982 tdfx_outl(par, SRCFORMAT, srcfmt);
983 tdfx_outl(par, DSTFORMAT, dstfmt);
984 tdfx_outl(par, DSTSIZE, image->width | (image->height << 16));
986 /* A count of how many free FIFO entries we've requested.
987 * When this goes negative, we need to request more. */
990 /* Send four bytes at a time of data */
991 for (i = (size >> 2); i > 0; i--) {
992 if (--fifo_free < 0) {
994 banshee_make_room(par, fifo_free);
996 tdfx_outl(par, LAUNCH_2D, *(u32*)chardata);
1000 /* Send the leftovers now */
1001 banshee_make_room(par, 3);
1006 tdfx_outl(par, LAUNCH_2D, *chardata);
1009 tdfx_outl(par, LAUNCH_2D, *(u16*)chardata);
1012 tdfx_outl(par, LAUNCH_2D,
1013 *(u16*)chardata | ((chardata[3]) << 24));
1017 #endif /* CONFIG_FB_3DFX_ACCEL */
1019 static int tdfxfb_cursor(struct fb_info *info, struct fb_cursor *cursor)
1021 struct tdfx_par *par = info->par;
1025 return -EINVAL; /* just to force soft_cursor() call */
1027 /* Too large of a cursor or wrong bpp :-( */
1028 if (cursor->image.width > 64 ||
1029 cursor->image.height > 64 ||
1030 cursor->image.depth > 1)
1033 vidcfg = tdfx_inl(par, VIDPROCCFG);
1035 tdfx_outl(par, VIDPROCCFG, vidcfg | VIDCFG_HWCURSOR_ENABLE);
1037 tdfx_outl(par, VIDPROCCFG, vidcfg & ~VIDCFG_HWCURSOR_ENABLE);
1040 * If the cursor is not be changed this means either we want the
1041 * current cursor state (if enable is set) or we want to query what
1042 * we can do with the cursor (if enable is not set)
1047 /* fix cursor color - XFree86 forgets to restore it properly */
1048 if (cursor->set & FB_CUR_SETCMAP) {
1049 struct fb_cmap cmap = info->cmap;
1050 u32 bg_idx = cursor->image.bg_color;
1051 u32 fg_idx = cursor->image.fg_color;
1052 unsigned long bg_color, fg_color;
1054 fg_color = (((u32)cmap.red[fg_idx] & 0xff00) << 8) |
1055 (((u32)cmap.green[fg_idx] & 0xff00) << 0) |
1056 (((u32)cmap.blue[fg_idx] & 0xff00) >> 8);
1057 bg_color = (((u32)cmap.red[bg_idx] & 0xff00) << 8) |
1058 (((u32)cmap.green[bg_idx] & 0xff00) << 0) |
1059 (((u32)cmap.blue[bg_idx] & 0xff00) >> 8);
1060 banshee_make_room(par, 2);
1061 tdfx_outl(par, HWCURC0, bg_color);
1062 tdfx_outl(par, HWCURC1, fg_color);
1065 if (cursor->set & FB_CUR_SETPOS) {
1066 int x = cursor->image.dx;
1067 int y = cursor->image.dy - info->var.yoffset;
1071 banshee_make_room(par, 1);
1072 tdfx_outl(par, HWCURLOC, (y << 16) + x);
1074 if (cursor->set & (FB_CUR_SETIMAGE | FB_CUR_SETSHAPE)) {
1076 * Voodoo 3 and above cards use 2 monochrome cursor patterns.
1077 * The reason is so the card can fetch 8 words at a time
1078 * and are stored on chip for use for the next 8 scanlines.
1079 * This reduces the number of times for access to draw the
1080 * cursor for each screen refresh.
1081 * Each pattern is a bitmap of 64 bit wide and 64 bit high
1082 * (total of 8192 bits or 1024 bytes). The two patterns are
1083 * stored in such a way that pattern 0 always resides in the
1084 * lower half (least significant 64 bits) of a 128 bit word
1085 * and pattern 1 the upper half. If you examine the data of
1086 * the cursor image the graphics card uses then from the
1087 * begining you see line one of pattern 0, line one of
1088 * pattern 1, line two of pattern 0, line two of pattern 1,
1089 * etc etc. The linear stride for the cursor is always 16 bytes
1090 * (128 bits) which is the maximum cursor width times two for
1091 * the two monochrome patterns.
1093 u8 __iomem *cursorbase = info->screen_base + info->fix.smem_len;
1094 u8 *bitmap = (u8 *)cursor->image.data;
1095 u8 *mask = (u8 *)cursor->mask;
1098 fb_memset(cursorbase, 0, 1024);
1100 for (i = 0; i < cursor->image.height; i++) {
1102 int j = (cursor->image.width + 7) >> 3;
1104 for (; j > 0; j--) {
1105 u8 data = *mask ^ *bitmap;
1106 if (cursor->rop == ROP_COPY)
1107 data = *mask & *bitmap;
1108 /* Pattern 0. Copy the cursor mask to it */
1109 fb_writeb(*mask, cursorbase + h);
1111 /* Pattern 1. Copy the cursor bitmap to it */
1112 fb_writeb(data, cursorbase + h + 8);
1122 static struct fb_ops tdfxfb_ops = {
1123 .owner = THIS_MODULE,
1124 .fb_check_var = tdfxfb_check_var,
1125 .fb_set_par = tdfxfb_set_par,
1126 .fb_setcolreg = tdfxfb_setcolreg,
1127 .fb_blank = tdfxfb_blank,
1128 .fb_pan_display = tdfxfb_pan_display,
1129 .fb_sync = banshee_wait_idle,
1130 .fb_cursor = tdfxfb_cursor,
1131 #ifdef CONFIG_FB_3DFX_ACCEL
1132 .fb_fillrect = tdfxfb_fillrect,
1133 .fb_copyarea = tdfxfb_copyarea,
1134 .fb_imageblit = tdfxfb_imageblit,
1136 .fb_fillrect = cfb_fillrect,
1137 .fb_copyarea = cfb_copyarea,
1138 .fb_imageblit = cfb_imageblit,
1143 * tdfxfb_probe - Device Initializiation
1145 * @pdev: PCI Device to initialize
1146 * @id: PCI Device ID
1148 * Initializes and allocates resources for PCI device @pdev.
1151 static int __devinit tdfxfb_probe(struct pci_dev *pdev,
1152 const struct pci_device_id *id)
1154 struct tdfx_par *default_par;
1155 struct fb_info *info;
1158 if ((err = pci_enable_device(pdev))) {
1159 printk(KERN_WARNING "tdfxfb: Can't enable pdev: %d\n", err);
1163 info = framebuffer_alloc(sizeof(struct tdfx_par), &pdev->dev);
1168 default_par = info->par;
1170 /* Configure the default fb_fix_screeninfo first */
1171 switch (pdev->device) {
1172 case PCI_DEVICE_ID_3DFX_BANSHEE:
1173 strcat(tdfx_fix.id, " Banshee");
1174 default_par->max_pixclock = BANSHEE_MAX_PIXCLOCK;
1176 case PCI_DEVICE_ID_3DFX_VOODOO3:
1177 strcat(tdfx_fix.id, " Voodoo3");
1178 default_par->max_pixclock = VOODOO3_MAX_PIXCLOCK;
1180 case PCI_DEVICE_ID_3DFX_VOODOO5:
1181 strcat(tdfx_fix.id, " Voodoo5");
1182 default_par->max_pixclock = VOODOO5_MAX_PIXCLOCK;
1186 tdfx_fix.mmio_start = pci_resource_start(pdev, 0);
1187 tdfx_fix.mmio_len = pci_resource_len(pdev, 0);
1188 if (!request_mem_region(tdfx_fix.mmio_start, tdfx_fix.mmio_len,
1190 printk(KERN_WARNING "tdfxfb: Can't reserve regbase\n");
1194 default_par->regbase_virt =
1195 ioremap_nocache(tdfx_fix.mmio_start, tdfx_fix.mmio_len);
1196 if (!default_par->regbase_virt) {
1197 printk("fb: Can't remap %s register area.\n", tdfx_fix.id);
1198 goto out_err_regbase;
1201 tdfx_fix.smem_start = pci_resource_start(pdev, 1);
1202 if (!(tdfx_fix.smem_len = do_lfb_size(default_par, pdev->device))) {
1203 printk("fb: Can't count %s memory.\n", tdfx_fix.id);
1204 goto out_err_regbase;
1207 if (!request_mem_region(tdfx_fix.smem_start,
1208 pci_resource_len(pdev, 1), "tdfx smem")) {
1209 printk(KERN_WARNING "tdfxfb: Can't reserve smem\n");
1210 goto out_err_regbase;
1213 info->screen_base = ioremap_nocache(tdfx_fix.smem_start,
1215 if (!info->screen_base) {
1216 printk("fb: Can't remap %s framebuffer.\n", tdfx_fix.id);
1217 goto out_err_screenbase;
1220 default_par->iobase = pci_resource_start(pdev, 2);
1222 if (!request_region(pci_resource_start(pdev, 2),
1223 pci_resource_len(pdev, 2), "tdfx iobase")) {
1224 printk(KERN_WARNING "tdfxfb: Can't reserve iobase\n");
1225 goto out_err_screenbase;
1228 printk("fb: %s memory = %dK\n", tdfx_fix.id, tdfx_fix.smem_len >> 10);
1230 tdfx_fix.ypanstep = nopan ? 0 : 1;
1231 tdfx_fix.ywrapstep = nowrap ? 0 : 1;
1233 info->fbops = &tdfxfb_ops;
1234 info->fix = tdfx_fix;
1235 info->pseudo_palette = default_par->palette;
1236 info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
1237 #ifdef CONFIG_FB_3DFX_ACCEL
1238 info->flags |= FBINFO_HWACCEL_FILLRECT |
1239 FBINFO_HWACCEL_COPYAREA |
1240 FBINFO_HWACCEL_IMAGEBLIT |
1243 /* reserve 8192 bits for cursor */
1244 /* the 2.4 driver says PAGE_MASK boundary is not enough for Voodoo4 */
1246 info->fix.smem_len = (info->fix.smem_len - 1024) &
1250 mode_option = "640x480@60";
1252 err = fb_find_mode(&info->var, info, mode_option, NULL, 0, NULL, 8);
1253 if (!err || err == 4)
1254 info->var = tdfx_var;
1256 /* maximize virtual vertical length */
1257 lpitch = info->var.xres_virtual * ((info->var.bits_per_pixel + 7) >> 3);
1258 info->var.yres_virtual = info->fix.smem_len / lpitch;
1259 if (info->var.yres_virtual < info->var.yres)
1260 goto out_err_iobase;
1262 if (fb_alloc_cmap(&info->cmap, 256, 0) < 0) {
1263 printk(KERN_WARNING "tdfxfb: Can't allocate color map\n");
1264 goto out_err_iobase;
1267 if (register_framebuffer(info) < 0) {
1268 printk("tdfxfb: can't register framebuffer\n");
1269 fb_dealloc_cmap(&info->cmap);
1270 goto out_err_iobase;
1275 pci_set_drvdata(pdev, info);
1279 release_mem_region(pci_resource_start(pdev, 2),
1280 pci_resource_len(pdev, 2));
1282 if (info->screen_base)
1283 iounmap(info->screen_base);
1284 release_mem_region(tdfx_fix.smem_start, pci_resource_len(pdev, 1));
1287 * Cleanup after anything that was remapped/allocated.
1289 if (default_par->regbase_virt)
1290 iounmap(default_par->regbase_virt);
1291 release_mem_region(tdfx_fix.mmio_start, tdfx_fix.mmio_len);
1293 framebuffer_release(info);
1298 static void tdfxfb_setup(char *options)
1302 if (!options || !*options)
1305 while ((this_opt = strsep(&options, ",")) != NULL) {
1308 if (!strcmp(this_opt, "nopan")) {
1310 } else if (!strcmp(this_opt, "nowrap")) {
1312 } else if (!strcmp(this_opt, "hwcursor")) {
1313 hwcursor = simple_strtoul(opt + 9, NULL, 0);
1315 mode_option = this_opt;
1322 * tdfxfb_remove - Device removal
1324 * @pdev: PCI Device to cleanup
1326 * Releases all resources allocated during the course of the driver's
1327 * lifetime for the PCI device @pdev.
1330 static void __devexit tdfxfb_remove(struct pci_dev *pdev)
1332 struct fb_info *info = pci_get_drvdata(pdev);
1333 struct tdfx_par *par = info->par;
1335 unregister_framebuffer(info);
1336 iounmap(par->regbase_virt);
1337 iounmap(info->screen_base);
1339 /* Clean up after reserved regions */
1340 release_region(pci_resource_start(pdev, 2),
1341 pci_resource_len(pdev, 2));
1342 release_mem_region(pci_resource_start(pdev, 1),
1343 pci_resource_len(pdev, 1));
1344 release_mem_region(pci_resource_start(pdev, 0),
1345 pci_resource_len(pdev, 0));
1346 pci_set_drvdata(pdev, NULL);
1347 framebuffer_release(info);
1350 static int __init tdfxfb_init(void)
1353 char *option = NULL;
1355 if (fb_get_options("tdfxfb", &option))
1358 tdfxfb_setup(option);
1360 return pci_register_driver(&tdfxfb_driver);
1363 static void __exit tdfxfb_exit(void)
1365 pci_unregister_driver(&tdfxfb_driver);
1368 MODULE_AUTHOR("Hannu Mallat <hmallat@cc.hut.fi>");
1369 MODULE_DESCRIPTION("3Dfx framebuffer device driver");
1370 MODULE_LICENSE("GPL");
1372 module_param(hwcursor, int, 0644);
1373 MODULE_PARM_DESC(hwcursor, "Enable hardware cursor "
1374 "(1=enable, 0=disable, default=1)");
1376 module_init(tdfxfb_init);
1377 module_exit(tdfxfb_exit);