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   1 /* linux/drivers/video/sm501fb.c
   2  *
   3  * Copyright (c) 2006 Simtec Electronics
   4  *      Vincent Sanders <vince@simtec.co.uk>
   5  *      Ben Dooks <ben@simtec.co.uk>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * Framebuffer driver for the Silicon Motion SM501
  12  */
  13
  14 #include <linux/module.h>
  15 #include <linux/kernel.h>
  16 #include <linux/errno.h>
  17 #include <linux/string.h>
  18 #include <linux/mm.h>
  19 #include <linux/tty.h>
  20 #include <linux/slab.h>
  21 #include <linux/delay.h>
  22 #include <linux/fb.h>
  23 #include <linux/init.h>
  24 #include <linux/vmalloc.h>
  25 #include <linux/dma-mapping.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/workqueue.h>
  28 #include <linux/wait.h>
  29 #include <linux/platform_device.h>
  30 #include <linux/clk.h>
  31 #include <linux/console.h>
  32
  33 #include <asm/io.h>
  34 #include <asm/uaccess.h>
  35 #include <asm/div64.h>
  36
  37 #ifdef CONFIG_PM
  38 #include <linux/pm.h>
  39 #endif
  40
  41 #include <linux/sm501.h>
  42 #include <linux/sm501-regs.h>
  43
  44 #define NR_PALETTE      256
  45
  46 enum sm501_controller {
  47         HEAD_CRT        = 0,
  48         HEAD_PANEL      = 1,
  49 };
  50
  51 /* SM501 memory address */
  52 struct sm501_mem {
  53         unsigned long    size;
  54         unsigned long    sm_addr;
  55         void __iomem    *k_addr;
  56 };
  57
  58 /* private data that is shared between all frambuffers* */
  59 struct sm501fb_info {
  60         struct device           *dev;
  61         struct fb_info          *fb[2];         /* fb info for both heads */
  62         struct resource         *fbmem_res;     /* framebuffer resource */
  63         struct resource         *regs_res;      /* registers resource */
  64         struct sm501_platdata_fb *pdata;        /* our platform data */
  65
  66         unsigned long            pm_crt_ctrl;   /* pm: crt ctrl save */
  67
  68         int                      irq;
  69         int                      swap_endian;   /* set to swap rgb=>bgr */
  70         void __iomem            *regs;          /* remapped registers */
  71         void __iomem            *fbmem;         /* remapped framebuffer */
  72         size_t                   fbmem_len;     /* length of remapped region */
  73 };
  74
  75 /* per-framebuffer private data */
  76 struct sm501fb_par {
  77         u32                      pseudo_palette[16];
  78
  79         enum sm501_controller    head;
  80         struct sm501_mem         cursor;
  81         struct sm501_mem         screen;
  82         struct fb_ops            ops;
  83
  84         void                    *store_fb;
  85         void                    *store_cursor;
  86         void __iomem            *cursor_regs;
  87         struct sm501fb_info     *info;
  88 };
  89
  90 /* Helper functions */
  91
  92 static inline int h_total(struct fb_var_screeninfo *var)
  93 {
  94         return var->xres + var->left_margin +
  95                 var->right_margin + var->hsync_len;
  96 }
  97
  98 static inline int v_total(struct fb_var_screeninfo *var)
  99 {
 100         return var->yres + var->upper_margin +
 101                 var->lower_margin + var->vsync_len;
 102 }
 103
 104 /* sm501fb_sync_regs()
 105  *
 106  * This call is mainly for PCI bus systems where we need to
 107  * ensure that any writes to the bus are completed before the
 108  * next phase, or after completing a function.
 109 */
 110
 111 static inline void sm501fb_sync_regs(struct sm501fb_info *info)
 112 {
 113         readl(info->regs);
 114 }
 115
 116 /* sm501_alloc_mem
 117  *
 118  * This is an attempt to lay out memory for the two framebuffers and
 119  * everything else
 120  *
 121  * |fbmem_res->start                                           fbmem_res->end|
 122  * |                                                                         |
 123  * |fb[0].fix.smem_start    |         |fb[1].fix.smem_start    |     2K      |
 124  * |-> fb[0].fix.smem_len <-| spare   |-> fb[1].fix.smem_len <-|-> cursors <-|
 125  *
 126  * The "spare" space is for the 2d engine data
 127  * the fixed is space for the cursors (2x1Kbyte)
 128  *
 129  * we need to allocate memory for the 2D acceleration engine
 130  * command list and the data for the engine to deal with.
 131  *
 132  * - all allocations must be 128bit aligned
 133  * - cursors are 64x64x2 bits (1Kbyte)
 134  *
 135  */
 136
 137 #define SM501_MEMF_CURSOR               (1)
 138 #define SM501_MEMF_PANEL                (2)
 139 #define SM501_MEMF_CRT                  (4)
 140 #define SM501_MEMF_ACCEL                (8)
 141
 142 static int sm501_alloc_mem(struct sm501fb_info *inf, struct sm501_mem *mem,
 143                            unsigned int why, size_t size)
 144 {
 145         unsigned int ptr = 0;
 146
 147         switch (why) {
 148         case SM501_MEMF_CURSOR:
 149                 ptr = inf->fbmem_len - size;
 150                 inf->fbmem_len = ptr;
 151                 break;
 152
 153         case SM501_MEMF_PANEL:
 154                 ptr = inf->fbmem_len - size;
 155                 if (ptr < inf->fb[0]->fix.smem_len)
 156                         return -ENOMEM;
 157
 158                 break;
 159
 160         case SM501_MEMF_CRT:
 161                 ptr = 0;
 162                 break;
 163
 164         case SM501_MEMF_ACCEL:
 165                 ptr = inf->fb[0]->fix.smem_len;
 166
 167                 if ((ptr + size) >
 168                     (inf->fb[1]->fix.smem_start - inf->fbmem_res->start))
 169                         return -ENOMEM;
 170                 break;
 171
 172         default:
 173                 return -EINVAL;
 174         }
 175
 176         mem->size    = size;
 177         mem->sm_addr = ptr;
 178         mem->k_addr  = inf->fbmem + ptr;
 179
 180         dev_dbg(inf->dev, "%s: result %08lx, %p - %u, %zd\n",
 181                 __func__, mem->sm_addr, mem->k_addr, why, size);
 182
 183         return 0;
 184 }
 185
 186 /* sm501fb_ps_to_hz
 187  *
 188  * Converts a period in picoseconds to Hz.
 189  *
 190  * Note, we try to keep this in Hz to minimise rounding with
 191  * the limited PLL settings on the SM501.
 192 */
 193
 194 static unsigned long sm501fb_ps_to_hz(unsigned long psvalue)
 195 {
 196         unsigned long long numerator=1000000000000ULL;
 197
 198         /* 10^12 / picosecond period gives frequency in Hz */
 199         do_div(numerator, psvalue);
 200         return (unsigned long)numerator;
 201 }
 202
 203 /* sm501fb_hz_to_ps is identical to the oposite transform */
 204
 205 #define sm501fb_hz_to_ps(x) sm501fb_ps_to_hz(x)
 206
 207 /* sm501fb_setup_gamma
 208  *
 209  * Programs a linear 1.0 gamma ramp in case the gamma
 210  * correction is enabled without programming anything else.
 211 */
 212
 213 static void sm501fb_setup_gamma(struct sm501fb_info *fbi,
 214                                 unsigned long palette)
 215 {
 216         unsigned long value = 0;
 217         int offset;
 218
 219         /* set gamma values */
 220         for (offset = 0; offset < 256 * 4; offset += 4) {
 221                 writel(value, fbi->regs + palette + offset);
 222                 value += 0x010101;      /* Advance RGB by 1,1,1.*/
 223         }
 224 }
 225
 226 /* sm501fb_check_var
 227  *
 228  * check common variables for both panel and crt
 229 */
 230
 231 static int sm501fb_check_var(struct fb_var_screeninfo *var,
 232                              struct fb_info *info)
 233 {
 234         struct sm501fb_par  *par = info->par;
 235         struct sm501fb_info *sm  = par->info;
 236         unsigned long tmp;
 237
 238         /* check we can fit these values into the registers */
 239
 240         if (var->hsync_len > 255 || var->vsync_len > 63)
 241                 return -EINVAL;
 242
 243         /* hdisplay end and hsync start */
 244         if ((var->xres + var->right_margin) > 4096)
 245                 return -EINVAL;
 246
 247         /* vdisplay end and vsync start */
 248         if ((var->yres + var->lower_margin) > 2048)
 249                 return -EINVAL;
 250
 251         /* hard limits of device */
 252
 253         if (h_total(var) > 4096 || v_total(var) > 2048)
 254                 return -EINVAL;
 255
 256         /* check our line length is going to be 128 bit aligned */
 257
 258         tmp = (var->xres * var->bits_per_pixel) / 8;
 259         if ((tmp & 15) != 0)
 260                 return -EINVAL;
 261
 262         /* check the virtual size */
 263
 264         if (var->xres_virtual > 4096 || var->yres_virtual > 2048)
 265                 return -EINVAL;
 266
 267         /* can cope with 8,16 or 32bpp */
 268
 269         if (var->bits_per_pixel <= 8)
 270                 var->bits_per_pixel = 8;
 271         else if (var->bits_per_pixel <= 16)
 272                 var->bits_per_pixel = 16;
 273         else if (var->bits_per_pixel == 24)
 274                 var->bits_per_pixel = 32;
 275
 276         /* set r/g/b positions and validate bpp */
 277         switch(var->bits_per_pixel) {
 278         case 8:
 279                 var->red.length         = var->bits_per_pixel;
 280                 var->red.offset         = 0;
 281                 var->green.length       = var->bits_per_pixel;
 282                 var->green.offset       = 0;
 283                 var->blue.length        = var->bits_per_pixel;
 284                 var->blue.offset        = 0;
 285                 var->transp.length      = 0;
 286                 var->transp.offset      = 0;
 287
 288                 break;
 289
 290         case 16:
 291                 if (sm->pdata->flags & SM501_FBPD_SWAP_FB_ENDIAN) {
 292                         var->blue.offset        = 11;
 293                         var->green.offset       = 5;
 294                         var->red.offset         = 0;
 295                 } else {
 296                         var->red.offset         = 11;
 297                         var->green.offset       = 5;
 298                         var->blue.offset        = 0;
 299                 }
 300                 var->transp.offset      = 0;
 301
 302                 var->red.length         = 5;
 303                 var->green.length       = 6;
 304                 var->blue.length        = 5;
 305                 var->transp.length      = 0;
 306                 break;
 307
 308         case 32:
 309                 if (sm->pdata->flags & SM501_FBPD_SWAP_FB_ENDIAN) {
 310                         var->transp.offset      = 0;
 311                         var->red.offset         = 8;
 312                         var->green.offset       = 16;
 313                         var->blue.offset        = 24;
 314                 } else {
 315                         var->transp.offset      = 24;
 316                         var->red.offset         = 16;
 317                         var->green.offset       = 8;
 318                         var->blue.offset        = 0;
 319                 }
 320
 321                 var->red.length         = 8;
 322                 var->green.length       = 8;
 323                 var->blue.length        = 8;
 324                 var->transp.length      = 0;
 325                 break;
 326
 327         default:
 328                 return -EINVAL;
 329         }
 330
 331         return 0;
 332 }
 333
 334 /*
 335  * sm501fb_check_var_crt():
 336  *
 337  * check the parameters for the CRT head, and either bring them
 338  * back into range, or return -EINVAL.
 339 */
 340
 341 static int sm501fb_check_var_crt(struct fb_var_screeninfo *var,
 342                                  struct fb_info *info)
 343 {
 344         return sm501fb_check_var(var, info);
 345 }
 346
 347 /* sm501fb_check_var_pnl():
 348  *
 349  * check the parameters for the CRT head, and either bring them
 350  * back into range, or return -EINVAL.
 351 */
 352
 353 static int sm501fb_check_var_pnl(struct fb_var_screeninfo *var,
 354                                  struct fb_info *info)
 355 {
 356         return sm501fb_check_var(var, info);
 357 }
 358
 359 /* sm501fb_set_par_common
 360  *
 361  * set common registers for framebuffers
 362 */
 363
 364 static int sm501fb_set_par_common(struct fb_info *info,
 365                                   struct fb_var_screeninfo *var)
 366 {
 367         struct sm501fb_par  *par = info->par;
 368         struct sm501fb_info *fbi = par->info;
 369         unsigned long pixclock;      /* pixelclock in Hz */
 370         unsigned long sm501pixclock; /* pixelclock the 501 can achive in Hz */
 371         unsigned int mem_type;
 372         unsigned int clock_type;
 373         unsigned int head_addr;
 374
 375         dev_dbg(fbi->dev, "%s: %dx%d, bpp = %d, virtual %dx%d\n",
 376                 __func__, var->xres, var->yres, var->bits_per_pixel,
 377                 var->xres_virtual, var->yres_virtual);
 378
 379         switch (par->head) {
 380         case HEAD_CRT:
 381                 mem_type = SM501_MEMF_CRT;
 382                 clock_type = SM501_CLOCK_V2XCLK;
 383                 head_addr = SM501_DC_CRT_FB_ADDR;
 384                 break;
 385
 386         case HEAD_PANEL:
 387                 mem_type = SM501_MEMF_PANEL;
 388                 clock_type = SM501_CLOCK_P2XCLK;
 389                 head_addr = SM501_DC_PANEL_FB_ADDR;
 390                 break;
 391
 392         default:
 393                 mem_type = 0;           /* stop compiler warnings */
 394                 head_addr = 0;
 395                 clock_type = 0;
 396         }
 397
 398         switch (var->bits_per_pixel) {
 399         case 8:
 400                 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
 401                 break;
 402
 403         case 16:
 404                 info->fix.visual = FB_VISUAL_TRUECOLOR;
 405                 break;
 406
 407         case 32:
 408                 info->fix.visual = FB_VISUAL_TRUECOLOR;
 409                 break;
 410         }
 411
 412         /* allocate fb memory within 501 */
 413         info->fix.line_length = (var->xres_virtual * var->bits_per_pixel)/8;
 414         info->fix.smem_len    = info->fix.line_length * var->yres_virtual;
 415
 416         dev_dbg(fbi->dev, "%s: line length = %u\n", __func__,
 417                 info->fix.line_length);
 418
 419         if (sm501_alloc_mem(fbi, &par->screen, mem_type,
 420                             info->fix.smem_len)) {
 421                 dev_err(fbi->dev, "no memory available\n");
 422                 return -ENOMEM;
 423         }
 424
 425         info->fix.smem_start = fbi->fbmem_res->start + par->screen.sm_addr;
 426
 427         info->screen_base = fbi->fbmem + par->screen.sm_addr;
 428         info->screen_size = info->fix.smem_len;
 429
 430         /* set start of framebuffer to the screen */
 431
 432         writel(par->screen.sm_addr | SM501_ADDR_FLIP, fbi->regs + head_addr);
 433
 434         /* program CRT clock  */
 435
 436         pixclock = sm501fb_ps_to_hz(var->pixclock);
 437
 438         sm501pixclock = sm501_set_clock(fbi->dev->parent, clock_type,
 439                                         pixclock);
 440
 441         /* update fb layer with actual clock used */
 442         var->pixclock = sm501fb_hz_to_ps(sm501pixclock);
 443
 444         dev_dbg(fbi->dev, "%s: pixclock(ps) = %u, pixclock(Hz)  = %lu, "
 445                "sm501pixclock = %lu,  error = %ld%%\n",
 446                __func__, var->pixclock, pixclock, sm501pixclock,
 447                ((pixclock - sm501pixclock)*100)/pixclock);
 448
 449         return 0;
 450 }
 451
 452 /* sm501fb_set_par_geometry
 453  *
 454  * set the geometry registers for specified framebuffer.
 455 */
 456
 457 static void sm501fb_set_par_geometry(struct fb_info *info,
 458                                      struct fb_var_screeninfo *var)
 459 {
 460         struct sm501fb_par  *par = info->par;
 461         struct sm501fb_info *fbi = par->info;
 462         void __iomem *base = fbi->regs;
 463         unsigned long reg;
 464
 465         if (par->head == HEAD_CRT)
 466                 base += SM501_DC_CRT_H_TOT;
 467         else
 468                 base += SM501_DC_PANEL_H_TOT;
 469
 470         /* set framebuffer width and display width */
 471
 472         reg = info->fix.line_length;
 473         reg |= ((var->xres * var->bits_per_pixel)/8) << 16;
 474
 475         writel(reg, fbi->regs + (par->head == HEAD_CRT ?
 476                     SM501_DC_CRT_FB_OFFSET :  SM501_DC_PANEL_FB_OFFSET));
 477
 478         /* program horizontal total */
 479
 480         reg  = (h_total(var) - 1) << 16;
 481         reg |= (var->xres - 1);
 482
 483         writel(reg, base + SM501_OFF_DC_H_TOT);
 484
 485         /* program horizontal sync */
 486
 487         reg  = var->hsync_len << 16;
 488         reg |= var->xres + var->right_margin - 1;
 489
 490         writel(reg, base + SM501_OFF_DC_H_SYNC);
 491
 492         /* program vertical total */
 493
 494         reg  = (v_total(var) - 1) << 16;
 495         reg |= (var->yres - 1);
 496
 497         writel(reg, base + SM501_OFF_DC_V_TOT);
 498
 499         /* program vertical sync */
 500         reg  = var->vsync_len << 16;
 501         reg |= var->yres + var->lower_margin - 1;
 502
 503         writel(reg, base + SM501_OFF_DC_V_SYNC);
 504 }
 505
 506 /* sm501fb_pan_crt
 507  *
 508  * pan the CRT display output within an virtual framebuffer
 509 */
 510
 511 static int sm501fb_pan_crt(struct fb_var_screeninfo *var,
 512                            struct fb_info *info)
 513 {
 514         struct sm501fb_par  *par = info->par;
 515         struct sm501fb_info *fbi = par->info;
 516         unsigned int bytes_pixel = var->bits_per_pixel / 8;
 517         unsigned long reg;
 518         unsigned long xoffs;
 519
 520         xoffs = var->xoffset * bytes_pixel;
 521
 522         reg = readl(fbi->regs + SM501_DC_CRT_CONTROL);
 523
 524         reg &= ~SM501_DC_CRT_CONTROL_PIXEL_MASK;
 525         reg |= ((xoffs & 15) / bytes_pixel) << 4;
 526         writel(reg, fbi->regs + SM501_DC_CRT_CONTROL);
 527
 528         reg = (par->screen.sm_addr + xoffs +
 529                var->yoffset * info->fix.line_length);
 530         writel(reg | SM501_ADDR_FLIP, fbi->regs + SM501_DC_CRT_FB_ADDR);
 531
 532         sm501fb_sync_regs(fbi);
 533         return 0;
 534 }
 535
 536 /* sm501fb_pan_pnl
 537  *
 538  * pan the panel display output within an virtual framebuffer
 539 */
 540
 541 static int sm501fb_pan_pnl(struct fb_var_screeninfo *var,
 542                            struct fb_info *info)
 543 {
 544         struct sm501fb_par  *par = info->par;
 545         struct sm501fb_info *fbi = par->info;
 546         unsigned long reg;
 547
 548         reg = var->xoffset | (var->xres_virtual << 16);
 549         writel(reg, fbi->regs + SM501_DC_PANEL_FB_WIDTH);
 550
 551         reg = var->yoffset | (var->yres_virtual << 16);
 552         writel(reg, fbi->regs + SM501_DC_PANEL_FB_HEIGHT);
 553
 554         sm501fb_sync_regs(fbi);
 555         return 0;
 556 }
 557
 558 /* sm501fb_set_par_crt
 559  *
 560  * Set the CRT video mode from the fb_info structure
 561 */
 562
 563 static int sm501fb_set_par_crt(struct fb_info *info)
 564 {
 565         struct sm501fb_par  *par = info->par;
 566         struct sm501fb_info *fbi = par->info;
 567         struct fb_var_screeninfo *var = &info->var;
 568         unsigned long control;       /* control register */
 569         int ret;
 570
 571         /* activate new configuration */
 572
 573         dev_dbg(fbi->dev, "%s(%p)\n", __func__, info);
 574
 575         /* enable CRT DAC - note 0 is on!*/
 576         sm501_misc_control(fbi->dev->parent, 0, SM501_MISC_DAC_POWER);
 577
 578         control = readl(fbi->regs + SM501_DC_CRT_CONTROL);
 579
 580         control &= (SM501_DC_CRT_CONTROL_PIXEL_MASK |
 581                     SM501_DC_CRT_CONTROL_GAMMA |
 582                     SM501_DC_CRT_CONTROL_BLANK |
 583                     SM501_DC_CRT_CONTROL_SEL |
 584                     SM501_DC_CRT_CONTROL_CP |
 585                     SM501_DC_CRT_CONTROL_TVP);
 586
 587         /* set the sync polarities before we check data source  */
 588
 589         if ((var->sync & FB_SYNC_HOR_HIGH_ACT) == 0)
 590                 control |= SM501_DC_CRT_CONTROL_HSP;
 591
 592         if ((var->sync & FB_SYNC_VERT_HIGH_ACT) == 0)
 593                 control |= SM501_DC_CRT_CONTROL_VSP;
 594
 595         if ((control & SM501_DC_CRT_CONTROL_SEL) == 0) {
 596                 /* the head is displaying panel data... */
 597
 598                 sm501_alloc_mem(fbi, &par->screen, SM501_MEMF_CRT, 0);
 599                 goto out_update;
 600         }
 601
 602         ret = sm501fb_set_par_common(info, var);
 603         if (ret) {
 604                 dev_err(fbi->dev, "failed to set common parameters\n");
 605                 return ret;
 606         }
 607
 608         sm501fb_pan_crt(var, info);
 609         sm501fb_set_par_geometry(info, var);
 610
 611         control |= SM501_FIFO_3;        /* fill if >3 free slots */
 612
 613         switch(var->bits_per_pixel) {
 614         case 8:
 615                 control |= SM501_DC_CRT_CONTROL_8BPP;
 616                 break;
 617
 618         case 16:
 619                 control |= SM501_DC_CRT_CONTROL_16BPP;
 620                 sm501fb_setup_gamma(fbi, SM501_DC_CRT_PALETTE);
 621                 break;
 622
 623         case 32:
 624                 control |= SM501_DC_CRT_CONTROL_32BPP;
 625                 sm501fb_setup_gamma(fbi, SM501_DC_CRT_PALETTE);
 626                 break;
 627
 628         default:
 629                 BUG();
 630         }
 631
 632         control |= SM501_DC_CRT_CONTROL_SEL;    /* CRT displays CRT data */
 633         control |= SM501_DC_CRT_CONTROL_TE;     /* enable CRT timing */
 634         control |= SM501_DC_CRT_CONTROL_ENABLE; /* enable CRT plane */
 635
 636  out_update:
 637         dev_dbg(fbi->dev, "new control is %08lx\n", control);
 638
 639         writel(control, fbi->regs + SM501_DC_CRT_CONTROL);
 640         sm501fb_sync_regs(fbi);
 641
 642         return 0;
 643 }
 644
 645 static void sm501fb_panel_power(struct sm501fb_info *fbi, int to)
 646 {
 647         unsigned long control;
 648         void __iomem *ctrl_reg = fbi->regs + SM501_DC_PANEL_CONTROL;
 649         struct sm501_platdata_fbsub *pd = fbi->pdata->fb_pnl;
 650
 651         control = readl(ctrl_reg);
 652
 653         if (to && (control & SM501_DC_PANEL_CONTROL_VDD) == 0) {
 654                 /* enable panel power */
 655
 656                 control |= SM501_DC_PANEL_CONTROL_VDD;  /* FPVDDEN */
 657                 writel(control, ctrl_reg);
 658                 sm501fb_sync_regs(fbi);
 659                 mdelay(10);
 660
 661                 control |= SM501_DC_PANEL_CONTROL_DATA; /* DATA */
 662                 writel(control, ctrl_reg);
 663                 sm501fb_sync_regs(fbi);
 664                 mdelay(10);
 665
 666                 /* VBIASEN */
 667
 668                 if (!(pd->flags & SM501FB_FLAG_PANEL_NO_VBIASEN)) {
 669                         if (pd->flags & SM501FB_FLAG_PANEL_INV_VBIASEN)
 670                                 control &= ~SM501_DC_PANEL_CONTROL_BIAS;
 671                         else
 672                                 control |= SM501_DC_PANEL_CONTROL_BIAS;
 673
 674                         writel(control, ctrl_reg);
 675                         sm501fb_sync_regs(fbi);
 676                         mdelay(10);
 677                 }
 678
 679                 if (!(pd->flags & SM501FB_FLAG_PANEL_NO_FPEN)) {
 680                         if (pd->flags & SM501FB_FLAG_PANEL_INV_FPEN)
 681                                 control &= ~SM501_DC_PANEL_CONTROL_FPEN;
 682                         else
 683                                 control |= SM501_DC_PANEL_CONTROL_FPEN;
 684
 685                         writel(control, ctrl_reg);
 686                         sm501fb_sync_regs(fbi);
 687                         mdelay(10);
 688                 }
 689         } else if (!to && (control & SM501_DC_PANEL_CONTROL_VDD) != 0) {
 690                 /* disable panel power */
 691                 if (!(pd->flags & SM501FB_FLAG_PANEL_NO_FPEN)) {
 692                         if (pd->flags & SM501FB_FLAG_PANEL_INV_FPEN)
 693                                 control |= SM501_DC_PANEL_CONTROL_FPEN;
 694                         else
 695                                 control &= ~SM501_DC_PANEL_CONTROL_FPEN;
 696
 697                         writel(control, ctrl_reg);
 698                         sm501fb_sync_regs(fbi);
 699                         mdelay(10);
 700                 }
 701
 702                 if (!(pd->flags & SM501FB_FLAG_PANEL_NO_VBIASEN)) {
 703                         if (pd->flags & SM501FB_FLAG_PANEL_INV_VBIASEN)
 704                                 control |= SM501_DC_PANEL_CONTROL_BIAS;
 705                         else
 706                                 control &= ~SM501_DC_PANEL_CONTROL_BIAS;
 707
 708                         writel(control, ctrl_reg);
 709                         sm501fb_sync_regs(fbi);
 710                         mdelay(10);
 711                 }
 712
 713                 control &= ~SM501_DC_PANEL_CONTROL_DATA;
 714                 writel(control, ctrl_reg);
 715                 sm501fb_sync_regs(fbi);
 716                 mdelay(10);
 717
 718                 control &= ~SM501_DC_PANEL_CONTROL_VDD;
 719                 writel(control, ctrl_reg);
 720                 sm501fb_sync_regs(fbi);
 721                 mdelay(10);
 722         }
 723
 724         sm501fb_sync_regs(fbi);
 725 }
 726
 727 /* sm501fb_set_par_pnl
 728  *
 729  * Set the panel video mode from the fb_info structure
 730 */
 731
 732 static int sm501fb_set_par_pnl(struct fb_info *info)
 733 {
 734         struct sm501fb_par  *par = info->par;
 735         struct sm501fb_info *fbi = par->info;
 736         struct fb_var_screeninfo *var = &info->var;
 737         unsigned long control;
 738         unsigned long reg;
 739         int ret;
 740
 741         dev_dbg(fbi->dev, "%s(%p)\n", __func__, info);
 742
 743         /* activate this new configuration */
 744
 745         ret = sm501fb_set_par_common(info, var);
 746         if (ret)
 747                 return ret;
 748
 749         sm501fb_pan_pnl(var, info);
 750         sm501fb_set_par_geometry(info, var);
 751
 752         /* update control register */
 753
 754         control = readl(fbi->regs + SM501_DC_PANEL_CONTROL);
 755         control &= (SM501_DC_PANEL_CONTROL_GAMMA |
 756                     SM501_DC_PANEL_CONTROL_VDD  |
 757                     SM501_DC_PANEL_CONTROL_DATA |
 758                     SM501_DC_PANEL_CONTROL_BIAS |
 759                     SM501_DC_PANEL_CONTROL_FPEN |
 760                     SM501_DC_PANEL_CONTROL_CP |
 761                     SM501_DC_PANEL_CONTROL_CK |
 762                     SM501_DC_PANEL_CONTROL_HP |
 763                     SM501_DC_PANEL_CONTROL_VP |
 764                     SM501_DC_PANEL_CONTROL_HPD |
 765                     SM501_DC_PANEL_CONTROL_VPD);
 766
 767         control |= SM501_FIFO_3;        /* fill if >3 free slots */
 768
 769         switch(var->bits_per_pixel) {
 770         case 8:
 771                 control |= SM501_DC_PANEL_CONTROL_8BPP;
 772                 break;
 773
 774         case 16:
 775                 control |= SM501_DC_PANEL_CONTROL_16BPP;
 776                 sm501fb_setup_gamma(fbi, SM501_DC_PANEL_PALETTE);
 777                 break;
 778
 779         case 32:
 780                 control |= SM501_DC_PANEL_CONTROL_32BPP;
 781                 sm501fb_setup_gamma(fbi, SM501_DC_PANEL_PALETTE);
 782                 break;
 783
 784         default:
 785                 BUG();
 786         }
 787
 788         writel(0x0, fbi->regs + SM501_DC_PANEL_PANNING_CONTROL);
 789
 790         /* panel plane top left and bottom right location */
 791
 792         writel(0x00, fbi->regs + SM501_DC_PANEL_TL_LOC);
 793
 794         reg  = var->xres - 1;
 795         reg |= (var->yres - 1) << 16;
 796
 797         writel(reg, fbi->regs + SM501_DC_PANEL_BR_LOC);
 798
 799         /* program panel control register */
 800
 801         control |= SM501_DC_PANEL_CONTROL_TE;   /* enable PANEL timing */
 802         control |= SM501_DC_PANEL_CONTROL_EN;   /* enable PANEL gfx plane */
 803
 804         if ((var->sync & FB_SYNC_HOR_HIGH_ACT) == 0)
 805                 control |= SM501_DC_PANEL_CONTROL_HSP;
 806
 807         if ((var->sync & FB_SYNC_VERT_HIGH_ACT) == 0)
 808                 control |= SM501_DC_PANEL_CONTROL_VSP;
 809
 810         writel(control, fbi->regs + SM501_DC_PANEL_CONTROL);
 811         sm501fb_sync_regs(fbi);
 812
 813         /* ensure the panel interface is not tristated at this point */
 814
 815         sm501_modify_reg(fbi->dev->parent, SM501_SYSTEM_CONTROL,
 816                          0, SM501_SYSCTRL_PANEL_TRISTATE);
 817
 818         /* power the panel up */
 819         sm501fb_panel_power(fbi, 1);
 820         return 0;
 821 }
 822
 823
 824 /* chan_to_field
 825  *
 826  * convert a colour value into a field position
 827  *
 828  * from pxafb.c
 829 */
 830
 831 static inline unsigned int chan_to_field(unsigned int chan,
 832                                          struct fb_bitfield *bf)
 833 {
 834         chan &= 0xffff;
 835         chan >>= 16 - bf->length;
 836         return chan << bf->offset;
 837 }
 838
 839 /* sm501fb_setcolreg
 840  *
 841  * set the colour mapping for modes that support palettised data
 842 */
 843
 844 static int sm501fb_setcolreg(unsigned regno,
 845                              unsigned red, unsigned green, unsigned blue,
 846                              unsigned transp, struct fb_info *info)
 847 {
 848         struct sm501fb_par  *par = info->par;
 849         struct sm501fb_info *fbi = par->info;
 850         void __iomem *base = fbi->regs;
 851         unsigned int val;
 852
 853         if (par->head == HEAD_CRT)
 854                 base += SM501_DC_CRT_PALETTE;
 855         else
 856                 base += SM501_DC_PANEL_PALETTE;
 857
 858         switch (info->fix.visual) {
 859         case FB_VISUAL_TRUECOLOR:
 860                 /* true-colour, use pseuo-palette */
 861
 862                 if (regno < 16) {
 863                         u32 *pal = par->pseudo_palette;
 864
 865                         val  = chan_to_field(red,   &info->var.red);
 866                         val |= chan_to_field(green, &info->var.green);
 867                         val |= chan_to_field(blue,  &info->var.blue);
 868
 869                         pal[regno] = val;
 870                 }
 871                 break;
 872
 873         case FB_VISUAL_PSEUDOCOLOR:
 874                 if (regno < 256) {
 875                         val = (red >> 8) << 16;
 876                         val |= (green >> 8) << 8;
 877                         val |= blue >> 8;
 878
 879                         writel(val, base + (regno * 4));
 880                 }
 881
 882                 break;
 883
 884         default:
 885                 return 1;   /* unknown type */
 886         }
 887
 888         return 0;
 889 }
 890
 891 /* sm501fb_blank_pnl
 892  *
 893  * Blank or un-blank the panel interface
 894 */
 895
 896 static int sm501fb_blank_pnl(int blank_mode, struct fb_info *info)
 897 {
 898         struct sm501fb_par  *par = info->par;
 899         struct sm501fb_info *fbi = par->info;
 900
 901         dev_dbg(fbi->dev, "%s(mode=%d, %p)\n", __func__, blank_mode, info);
 902
 903         switch (blank_mode) {
 904         case FB_BLANK_POWERDOWN:
 905                 sm501fb_panel_power(fbi, 0);
 906                 break;
 907
 908         case FB_BLANK_UNBLANK:
 909                 sm501fb_panel_power(fbi, 1);
 910                 break;
 911
 912         case FB_BLANK_NORMAL:
 913         case FB_BLANK_VSYNC_SUSPEND:
 914         case FB_BLANK_HSYNC_SUSPEND:
 915         default:
 916                 return 1;
 917         }
 918
 919         return 0;
 920 }
 921
 922 /* sm501fb_blank_crt
 923  *
 924  * Blank or un-blank the crt interface
 925 */
 926
 927 static int sm501fb_blank_crt(int blank_mode, struct fb_info *info)
 928 {
 929         struct sm501fb_par  *par = info->par;
 930         struct sm501fb_info *fbi = par->info;
 931         unsigned long ctrl;
 932
 933         dev_dbg(fbi->dev, "%s(mode=%d, %p)\n", __func__, blank_mode, info);
 934
 935         ctrl = readl(fbi->regs + SM501_DC_CRT_CONTROL);
 936
 937         switch (blank_mode) {
 938         case FB_BLANK_POWERDOWN:
 939                 ctrl &= ~SM501_DC_CRT_CONTROL_ENABLE;
 940                 sm501_misc_control(fbi->dev->parent, SM501_MISC_DAC_POWER, 0);
 941
 942         case FB_BLANK_NORMAL:
 943                 ctrl |= SM501_DC_CRT_CONTROL_BLANK;
 944                 break;
 945
 946         case FB_BLANK_UNBLANK:
 947                 ctrl &= ~SM501_DC_CRT_CONTROL_BLANK;
 948                 ctrl |=  SM501_DC_CRT_CONTROL_ENABLE;
 949                 sm501_misc_control(fbi->dev->parent, 0, SM501_MISC_DAC_POWER);
 950                 break;
 951
 952         case FB_BLANK_VSYNC_SUSPEND:
 953         case FB_BLANK_HSYNC_SUSPEND:
 954         default:
 955                 return 1;
 956
 957         }
 958
 959         writel(ctrl, fbi->regs + SM501_DC_CRT_CONTROL);
 960         sm501fb_sync_regs(fbi);
 961
 962         return 0;
 963 }
 964
 965 /* sm501fb_cursor
 966  *
 967  * set or change the hardware cursor parameters
 968 */
 969
 970 static int sm501fb_cursor(struct fb_info *info, struct fb_cursor *cursor)
 971 {
 972         struct sm501fb_par  *par = info->par;
 973         struct sm501fb_info *fbi = par->info;
 974         void __iomem *base = fbi->regs;
 975         unsigned long hwc_addr;
 976         unsigned long fg, bg;
 977
 978         dev_dbg(fbi->dev, "%s(%p,%p)\n", __func__, info, cursor);
 979
 980         if (par->head == HEAD_CRT)
 981                 base += SM501_DC_CRT_HWC_BASE;
 982         else
 983                 base += SM501_DC_PANEL_HWC_BASE;
 984
 985         /* check not being asked to exceed capabilities */
 986
 987         if (cursor->image.width > 64)
 988                 return -EINVAL;
 989
 990         if (cursor->image.height > 64)
 991                 return -EINVAL;
 992
 993         if (cursor->image.depth > 1)
 994                 return -EINVAL;
 995
 996         hwc_addr = readl(base + SM501_OFF_HWC_ADDR);
 997
 998         if (cursor->enable)
 999                 writel(hwc_addr | SM501_HWC_EN, base + SM501_OFF_HWC_ADDR);
1000         else
1001                 writel(hwc_addr & ~SM501_HWC_EN, base + SM501_OFF_HWC_ADDR);
1002
1003         /* set data */
1004         if (cursor->set & FB_CUR_SETPOS) {
1005                 unsigned int x = cursor->image.dx;
1006                 unsigned int y = cursor->image.dy;
1007
1008                 if (x >= 2048 || y >= 2048 )
1009                         return -EINVAL;
1010
1011                 dev_dbg(fbi->dev, "set position %d,%d\n", x, y);
1012
1013                 //y += cursor->image.height;
1014
1015                 writel(x | (y << 16), base + SM501_OFF_HWC_LOC);
1016         }
1017
1018         if (cursor->set & FB_CUR_SETCMAP) {
1019                 unsigned int bg_col = cursor->image.bg_color;
1020                 unsigned int fg_col = cursor->image.fg_color;
1021
1022                 dev_dbg(fbi->dev, "%s: update cmap (%08x,%08x)\n",
1023                         __func__, bg_col, fg_col);
1024
1025                 bg = ((info->cmap.red[bg_col] & 0xF8) << 8) |
1026                         ((info->cmap.green[bg_col] & 0xFC) << 3) |
1027                         ((info->cmap.blue[bg_col] & 0xF8) >> 3);
1028
1029                 fg = ((info->cmap.red[fg_col] & 0xF8) << 8) |
1030                         ((info->cmap.green[fg_col] & 0xFC) << 3) |
1031                         ((info->cmap.blue[fg_col] & 0xF8) >> 3);
1032
1033                 dev_dbg(fbi->dev, "fgcol %08lx, bgcol %08lx\n", fg, bg);
1034
1035                 writel(bg, base + SM501_OFF_HWC_COLOR_1_2);
1036                 writel(fg, base + SM501_OFF_HWC_COLOR_3);
1037         }
1038
1039         if (cursor->set & FB_CUR_SETSIZE ||
1040             cursor->set & (FB_CUR_SETIMAGE | FB_CUR_SETSHAPE)) {
1041                 /* SM501 cursor is a two bpp 64x64 bitmap this routine
1042                  * clears it to transparent then combines the cursor
1043                  * shape plane with the colour plane to set the
1044                  * cursor */
1045                 int x, y;
1046                 const unsigned char *pcol = cursor->image.data;
1047                 const unsigned char *pmsk = cursor->mask;
1048                 void __iomem   *dst = par->cursor.k_addr;
1049                 unsigned char  dcol = 0;
1050                 unsigned char  dmsk = 0;
1051                 unsigned int   op;
1052
1053                 dev_dbg(fbi->dev, "%s: setting shape (%d,%d)\n",
1054                         __func__, cursor->image.width, cursor->image.height);
1055
1056                 for (op = 0; op < (64*64*2)/8; op+=4)
1057                         writel(0x0, dst + op);
1058
1059                 for (y = 0; y < cursor->image.height; y++) {
1060                         for (x = 0; x < cursor->image.width; x++) {
1061                                 if ((x % 8) == 0) {
1062                                         dcol = *pcol++;
1063                                         dmsk = *pmsk++;
1064                                 } else {
1065                                         dcol >>= 1;
1066                                         dmsk >>= 1;
1067                                 }
1068
1069                                 if (dmsk & 1) {
1070                                         op = (dcol & 1) ? 1 : 3;
1071                                         op <<= ((x % 4) * 2);
1072
1073                                         op |= readb(dst + (x / 4));
1074                                         writeb(op, dst + (x / 4));
1075                                 }
1076                         }
1077                         dst += (64*2)/8;
1078                 }
1079         }
1080
1081         sm501fb_sync_regs(fbi); /* ensure cursor data flushed */
1082         return 0;
1083 }
1084
1085 /* sm501fb_crtsrc_show
1086  *
1087  * device attribute code to show where the crt output is sourced from
1088 */
1089
1090 static ssize_t sm501fb_crtsrc_show(struct device *dev,
1091                                struct device_attribute *attr, char *buf)
1092 {
1093         struct sm501fb_info *info = dev_get_drvdata(dev);
1094         unsigned long ctrl;
1095
1096         ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1097         ctrl &= SM501_DC_CRT_CONTROL_SEL;
1098
1099         return snprintf(buf, PAGE_SIZE, "%s\n", ctrl ? "crt" : "panel");
1100 }
1101
1102 /* sm501fb_crtsrc_show
1103  *
1104  * device attribute code to set where the crt output is sourced from
1105 */
1106
1107 static ssize_t sm501fb_crtsrc_store(struct device *dev,
1108                                 struct device_attribute *attr,
1109                                 const char *buf, size_t len)
1110 {
1111         struct sm501fb_info *info = dev_get_drvdata(dev);
1112         enum sm501_controller head;
1113         unsigned long ctrl;
1114
1115         if (len < 1)
1116                 return -EINVAL;
1117
1118         if (strnicmp(buf, "crt", 3) == 0)
1119                 head = HEAD_CRT;
1120         else if (strnicmp(buf, "panel", 5) == 0)
1121                 head = HEAD_PANEL;
1122         else
1123                 return -EINVAL;
1124
1125         dev_info(dev, "setting crt source to head %d\n", head);
1126
1127         ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1128
1129         if (head == HEAD_CRT) {
1130                 ctrl |= SM501_DC_CRT_CONTROL_SEL;
1131                 ctrl |= SM501_DC_CRT_CONTROL_ENABLE;
1132                 ctrl |= SM501_DC_CRT_CONTROL_TE;
1133         } else {
1134                 ctrl &= ~SM501_DC_CRT_CONTROL_SEL;
1135                 ctrl &= ~SM501_DC_CRT_CONTROL_ENABLE;
1136                 ctrl &= ~SM501_DC_CRT_CONTROL_TE;
1137         }
1138
1139         writel(ctrl, info->regs + SM501_DC_CRT_CONTROL);
1140         sm501fb_sync_regs(info);
1141
1142         return len;
1143 }
1144
1145 /* Prepare the device_attr for registration with sysfs later */
1146 static DEVICE_ATTR(crt_src, 0666, sm501fb_crtsrc_show, sm501fb_crtsrc_store);
1147
1148 /* sm501fb_show_regs
1149  *
1150  * show the primary sm501 registers
1151 */
1152 static int sm501fb_show_regs(struct sm501fb_info *info, char *ptr,
1153                              unsigned int start, unsigned int len)
1154 {
1155         void __iomem *mem = info->regs;
1156         char *buf = ptr;
1157         unsigned int reg;
1158
1159         for (reg = start; reg < (len + start); reg += 4)
1160                 ptr += sprintf(ptr, "%08x = %08x\n", reg, readl(mem + reg));
1161
1162         return ptr - buf;
1163 }
1164
1165 /* sm501fb_debug_show_crt
1166  *
1167  * show the crt control and cursor registers
1168 */
1169
1170 static ssize_t sm501fb_debug_show_crt(struct device *dev,
1171                                   struct device_attribute *attr, char *buf)
1172 {
1173         struct sm501fb_info *info = dev_get_drvdata(dev);
1174         char *ptr = buf;
1175
1176         ptr += sm501fb_show_regs(info, ptr, SM501_DC_CRT_CONTROL, 0x40);
1177         ptr += sm501fb_show_regs(info, ptr, SM501_DC_CRT_HWC_BASE, 0x10);
1178
1179         return ptr - buf;
1180 }
1181
1182 static DEVICE_ATTR(fbregs_crt, 0444, sm501fb_debug_show_crt, NULL);
1183
1184 /* sm501fb_debug_show_pnl
1185  *
1186  * show the panel control and cursor registers
1187 */
1188
1189 static ssize_t sm501fb_debug_show_pnl(struct device *dev,
1190                                   struct device_attribute *attr, char *buf)
1191 {
1192         struct sm501fb_info *info = dev_get_drvdata(dev);
1193         char *ptr = buf;
1194
1195         ptr += sm501fb_show_regs(info, ptr, 0x0, 0x40);
1196         ptr += sm501fb_show_regs(info, ptr, SM501_DC_PANEL_HWC_BASE, 0x10);
1197
1198         return ptr - buf;
1199 }
1200
1201 static DEVICE_ATTR(fbregs_pnl, 0444, sm501fb_debug_show_pnl, NULL);
1202
1203 /* framebuffer ops */
1204
1205 static struct fb_ops sm501fb_ops_crt = {
1206         .owner          = THIS_MODULE,
1207         .fb_check_var   = sm501fb_check_var_crt,
1208         .fb_set_par     = sm501fb_set_par_crt,
1209         .fb_blank       = sm501fb_blank_crt,
1210         .fb_setcolreg   = sm501fb_setcolreg,
1211         .fb_pan_display = sm501fb_pan_crt,
1212         .fb_cursor      = sm501fb_cursor,
1213         .fb_fillrect    = cfb_fillrect,
1214         .fb_copyarea    = cfb_copyarea,
1215         .fb_imageblit   = cfb_imageblit,
1216 };
1217
1218 static struct fb_ops sm501fb_ops_pnl = {
1219         .owner          = THIS_MODULE,
1220         .fb_check_var   = sm501fb_check_var_pnl,
1221         .fb_set_par     = sm501fb_set_par_pnl,
1222         .fb_pan_display = sm501fb_pan_pnl,
1223         .fb_blank       = sm501fb_blank_pnl,
1224         .fb_setcolreg   = sm501fb_setcolreg,
1225         .fb_cursor      = sm501fb_cursor,
1226         .fb_fillrect    = cfb_fillrect,
1227         .fb_copyarea    = cfb_copyarea,
1228         .fb_imageblit   = cfb_imageblit,
1229 };
1230
1231 /* sm501fb_info_alloc
1232  *
1233  * creates and initialises an sm501fb_info structure
1234 */
1235
1236 static struct sm501fb_info *sm501fb_info_alloc(struct fb_info *fbinfo_crt,
1237                                                struct fb_info *fbinfo_pnl)
1238 {
1239         struct sm501fb_info *info;
1240         struct sm501fb_par  *par;
1241
1242         info = kzalloc(sizeof(struct sm501fb_info), GFP_KERNEL);
1243         if (info) {
1244                 /* set the references back */
1245
1246                 par = fbinfo_crt->par;
1247                 par->info = info;
1248                 par->head = HEAD_CRT;
1249                 fbinfo_crt->pseudo_palette = &par->pseudo_palette;
1250
1251                 par = fbinfo_pnl->par;
1252                 par->info = info;
1253                 par->head = HEAD_PANEL;
1254                 fbinfo_pnl->pseudo_palette = &par->pseudo_palette;
1255
1256                 /* store the two fbs into our info */
1257                 info->fb[HEAD_CRT] = fbinfo_crt;
1258                 info->fb[HEAD_PANEL] = fbinfo_pnl;
1259         }
1260
1261         return info;
1262 }
1263
1264 /* sm501_init_cursor
1265  *
1266  * initialise hw cursor parameters
1267 */
1268
1269 static int sm501_init_cursor(struct fb_info *fbi, unsigned int reg_base)
1270 {
1271         struct sm501fb_par *par = fbi->par;
1272         struct sm501fb_info *info = par->info;
1273         int ret;
1274
1275         par->cursor_regs = info->regs + reg_base;
1276
1277         ret = sm501_alloc_mem(info, &par->cursor, SM501_MEMF_CURSOR, 1024);
1278         if (ret < 0)
1279                 return ret;
1280
1281         /* initialise the colour registers */
1282
1283         writel(par->cursor.sm_addr, par->cursor_regs + SM501_OFF_HWC_ADDR);
1284
1285         writel(0x00, par->cursor_regs + SM501_OFF_HWC_LOC);
1286         writel(0x00, par->cursor_regs + SM501_OFF_HWC_COLOR_1_2);
1287         writel(0x00, par->cursor_regs + SM501_OFF_HWC_COLOR_3);
1288         sm501fb_sync_regs(info);
1289
1290         return 0;
1291 }
1292
1293 /* sm501fb_info_start
1294  *
1295  * fills the par structure claiming resources and remapping etc.
1296 */
1297
1298 static int sm501fb_start(struct sm501fb_info *info,
1299                          struct platform_device *pdev)
1300 {
1301         struct resource *res;
1302         struct device *dev;
1303         int k;
1304         int ret;
1305
1306         info->dev = dev = &pdev->dev;
1307         platform_set_drvdata(pdev, info);
1308
1309         info->irq = ret = platform_get_irq(pdev, 0);
1310         if (ret < 0) {
1311                 /* we currently do not use the IRQ */
1312                 dev_warn(dev, "no irq for device\n");
1313         }
1314
1315         /* allocate, reserve and remap resources for registers */
1316         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1317         if (res == NULL) {
1318                 dev_err(dev, "no resource definition for registers\n");
1319                 ret = -ENOENT;
1320                 goto err_release;
1321         }
1322
1323         info->regs_res = request_mem_region(res->start,
1324                                             res->end - res->start,
1325                                             pdev->name);
1326
1327         if (info->regs_res == NULL) {
1328                 dev_err(dev, "cannot claim registers\n");
1329                 ret = -ENXIO;
1330                 goto err_release;
1331         }
1332
1333         info->regs = ioremap(res->start, (res->end - res->start)+1);
1334         if (info->regs == NULL) {
1335                 dev_err(dev, "cannot remap registers\n");
1336                 ret = -ENXIO;
1337                 goto err_regs_res;
1338         }
1339
1340         /* allocate, reserve resources for framebuffer */
1341         res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
1342         if (res == NULL) {
1343                 dev_err(dev, "no memory resource defined\n");
1344                 ret = -ENXIO;
1345                 goto err_regs_map;
1346         }
1347
1348         info->fbmem_res = request_mem_region(res->start,
1349                                              (res->end - res->start)+1,
1350                                              pdev->name);
1351         if (info->fbmem_res == NULL) {
1352                 dev_err(dev, "cannot claim framebuffer\n");
1353                 ret = -ENXIO;
1354                 goto err_regs_map;
1355         }
1356
1357         info->fbmem = ioremap(res->start, (res->end - res->start)+1);
1358         if (info->fbmem == NULL) {
1359                 dev_err(dev, "cannot remap framebuffer\n");
1360                 goto err_mem_res;
1361         }
1362
1363         info->fbmem_len = (res->end - res->start)+1;
1364
1365         /* clear framebuffer memory - avoids garbage data on unused fb */
1366         memset(info->fbmem, 0, info->fbmem_len);
1367
1368         /* clear palette ram - undefined at power on */
1369         for (k = 0; k < (256 * 3); k++)
1370                 writel(0, info->regs + SM501_DC_PANEL_PALETTE + (k * 4));
1371
1372         /* enable display controller */
1373         sm501_unit_power(dev->parent, SM501_GATE_DISPLAY, 1);
1374
1375         /* setup cursors */
1376
1377         sm501_init_cursor(info->fb[HEAD_CRT], SM501_DC_CRT_HWC_ADDR);
1378         sm501_init_cursor(info->fb[HEAD_PANEL], SM501_DC_PANEL_HWC_ADDR);
1379
1380         return 0; /* everything is setup */
1381
1382  err_mem_res:
1383         release_resource(info->fbmem_res);
1384         kfree(info->fbmem_res);
1385
1386  err_regs_map:
1387         iounmap(info->regs);
1388
1389  err_regs_res:
1390         release_resource(info->regs_res);
1391         kfree(info->regs_res);
1392
1393  err_release:
1394         return ret;
1395 }
1396
1397 static void sm501fb_stop(struct sm501fb_info *info)
1398 {
1399         /* disable display controller */
1400         sm501_unit_power(info->dev->parent, SM501_GATE_DISPLAY, 0);
1401
1402         iounmap(info->fbmem);
1403         release_resource(info->fbmem_res);
1404         kfree(info->fbmem_res);
1405
1406         iounmap(info->regs);
1407         release_resource(info->regs_res);
1408         kfree(info->regs_res);
1409 }
1410
1411 static void sm501fb_info_release(struct sm501fb_info *info)
1412 {
1413         kfree(info);
1414 }
1415
1416 static int sm501fb_init_fb(struct fb_info *fb,
1417                            enum sm501_controller head,
1418                            const char *fbname)
1419 {
1420         struct sm501_platdata_fbsub *pd;
1421         struct sm501fb_par *par = fb->par;
1422         struct sm501fb_info *info = par->info;
1423         unsigned long ctrl;
1424         unsigned int enable;
1425         int ret;
1426
1427         switch (head) {
1428         case HEAD_CRT:
1429                 pd = info->pdata->fb_crt;
1430                 ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1431                 enable = (ctrl & SM501_DC_CRT_CONTROL_ENABLE) ? 1 : 0;
1432
1433                 /* ensure we set the correct source register */
1434                 if (info->pdata->fb_route != SM501_FB_CRT_PANEL) {
1435                         ctrl |= SM501_DC_CRT_CONTROL_SEL;
1436                         writel(ctrl, info->regs + SM501_DC_CRT_CONTROL);
1437                 }
1438
1439                 break;
1440
1441         case HEAD_PANEL:
1442                 pd = info->pdata->fb_pnl;
1443                 ctrl = readl(info->regs + SM501_DC_PANEL_CONTROL);
1444                 enable = (ctrl & SM501_DC_PANEL_CONTROL_EN) ? 1 : 0;
1445                 break;
1446
1447         default:
1448                 pd = NULL;              /* stop compiler warnings */
1449                 ctrl = 0;
1450                 enable = 0;
1451                 BUG();
1452         }
1453
1454         dev_info(info->dev, "fb %s %sabled at start\n",
1455                  fbname, enable ? "en" : "dis");
1456
1457         /* check to see if our routing allows this */
1458
1459         if (head == HEAD_CRT && info->pdata->fb_route == SM501_FB_CRT_PANEL) {
1460                 ctrl &= ~SM501_DC_CRT_CONTROL_SEL;
1461                 writel(ctrl, info->regs + SM501_DC_CRT_CONTROL);
1462                 enable = 0;
1463         }
1464
1465         strlcpy(fb->fix.id, fbname, sizeof(fb->fix.id));
1466
1467         memcpy(&par->ops,
1468                (head == HEAD_CRT) ? &sm501fb_ops_crt : &sm501fb_ops_pnl,
1469                sizeof(struct fb_ops));
1470
1471         /* update ops dependant on what we've been passed */
1472
1473         if ((pd->flags & SM501FB_FLAG_USE_HWCURSOR) == 0)
1474                 par->ops.fb_cursor = NULL;
1475
1476         fb->fbops = &par->ops;
1477         fb->flags = FBINFO_FLAG_DEFAULT |
1478                 FBINFO_HWACCEL_XPAN | FBINFO_HWACCEL_YPAN;
1479
1480         /* fixed data */
1481
1482         fb->fix.type            = FB_TYPE_PACKED_PIXELS;
1483         fb->fix.type_aux        = 0;
1484         fb->fix.xpanstep        = 1;
1485         fb->fix.ypanstep        = 1;
1486         fb->fix.ywrapstep       = 0;
1487         fb->fix.accel           = FB_ACCEL_NONE;
1488
1489         /* screenmode */
1490
1491         fb->var.nonstd          = 0;
1492         fb->var.activate        = FB_ACTIVATE_NOW;
1493         fb->var.accel_flags     = 0;
1494         fb->var.vmode           = FB_VMODE_NONINTERLACED;
1495         fb->var.bits_per_pixel  = 16;
1496
1497         if (enable && (pd->flags & SM501FB_FLAG_USE_INIT_MODE) && 0) {
1498                 /* TODO read the mode from the current display */
1499
1500         } else {
1501                 if (pd->def_mode) {
1502                         dev_info(info->dev, "using supplied mode\n");
1503                         fb_videomode_to_var(&fb->var, pd->def_mode);
1504
1505                         fb->var.bits_per_pixel = pd->def_bpp ? pd->def_bpp : 8;
1506                         fb->var.xres_virtual = fb->var.xres;
1507                         fb->var.yres_virtual = fb->var.yres;
1508                 } else {
1509                         ret = fb_find_mode(&fb->var, fb,
1510                                            NULL, NULL, 0, NULL, 8);
1511
1512                         if (ret == 0 || ret == 4) {
1513                                 dev_err(info->dev,
1514                                         "failed to get initial mode\n");
1515                                 return -EINVAL;
1516                         }
1517                 }
1518         }
1519
1520         /* initialise and set the palette */
1521         fb_alloc_cmap(&fb->cmap, NR_PALETTE, 0);
1522         fb_set_cmap(&fb->cmap, fb);
1523
1524         ret = (fb->fbops->fb_check_var)(&fb->var, fb);
1525         if (ret)
1526                 dev_err(info->dev, "check_var() failed on initial setup?\n");
1527
1528         /* ensure we've activated our new configuration */
1529         (fb->fbops->fb_set_par)(fb);
1530
1531         return 0;
1532 }
1533
1534 /* default platform data if none is supplied (ie, PCI device) */
1535
1536 static struct sm501_platdata_fbsub sm501fb_pdata_crt = {
1537         .flags          = (SM501FB_FLAG_USE_INIT_MODE |
1538                            SM501FB_FLAG_USE_HWCURSOR |
1539                            SM501FB_FLAG_USE_HWACCEL |
1540                            SM501FB_FLAG_DISABLE_AT_EXIT),
1541
1542 };
1543
1544 static struct sm501_platdata_fbsub sm501fb_pdata_pnl = {
1545         .flags          = (SM501FB_FLAG_USE_INIT_MODE |
1546                            SM501FB_FLAG_USE_HWCURSOR |
1547                            SM501FB_FLAG_USE_HWACCEL |
1548                            SM501FB_FLAG_DISABLE_AT_EXIT),
1549 };
1550
1551 static struct sm501_platdata_fb sm501fb_def_pdata = {
1552         .fb_route               = SM501_FB_OWN,
1553         .fb_crt                 = &sm501fb_pdata_crt,
1554         .fb_pnl                 = &sm501fb_pdata_pnl,
1555 };
1556
1557 static char driver_name_crt[] = "sm501fb-crt";
1558 static char driver_name_pnl[] = "sm501fb-panel";
1559
1560 static int __init sm501fb_probe(struct platform_device *pdev)
1561 {
1562         struct sm501fb_info *info;
1563         struct device       *dev = &pdev->dev;
1564         struct fb_info      *fbinfo_crt;
1565         struct fb_info      *fbinfo_pnl;
1566         int                  ret;
1567
1568         /* allocate our framebuffers */
1569
1570         fbinfo_crt = framebuffer_alloc(sizeof(struct sm501fb_par), dev);
1571         if (fbinfo_crt == NULL) {
1572                 dev_err(dev, "cannot allocate crt framebuffer\n");
1573                 return -ENOMEM;
1574         }
1575
1576         fbinfo_pnl = framebuffer_alloc(sizeof(struct sm501fb_par), dev);
1577         if (fbinfo_pnl == NULL) {
1578                 dev_err(dev, "cannot allocate panel framebuffer\n");
1579                 ret = -ENOMEM;
1580                 goto fbinfo_crt_alloc_fail;
1581         }
1582
1583         info = sm501fb_info_alloc(fbinfo_crt, fbinfo_pnl);
1584         if (info == NULL) {
1585                 dev_err(dev, "cannot allocate par\n");
1586                 ret = -ENOMEM;
1587                 goto sm501fb_alloc_fail;
1588         }
1589
1590         if (dev->parent->platform_data) {
1591                 struct sm501_platdata *pd = dev->parent->platform_data;
1592                 info->pdata = pd->fb;
1593         }
1594
1595         if (info->pdata == NULL) {
1596                 dev_info(dev, "using default configuration data\n");
1597                 info->pdata = &sm501fb_def_pdata;
1598         }
1599
1600         /* start the framebuffers */
1601
1602         ret = sm501fb_start(info, pdev);
1603         if (ret) {
1604                 dev_err(dev, "cannot initialise SM501\n");
1605                 goto sm501fb_start_fail;
1606         }
1607
1608         /* CRT framebuffer setup */
1609
1610         ret = sm501fb_init_fb(fbinfo_crt, HEAD_CRT, driver_name_crt);
1611         if (ret) {
1612                 dev_err(dev, "cannot initialise CRT fb\n");
1613                 goto sm501fb_start_fail;
1614         }
1615
1616         /* Panel framebuffer setup */
1617
1618         ret = sm501fb_init_fb(fbinfo_pnl, HEAD_PANEL, driver_name_pnl);
1619         if (ret) {
1620                 dev_err(dev, "cannot initialise Panel fb\n");
1621                 goto sm501fb_start_fail;
1622         }
1623
1624         /* register framebuffers */
1625
1626         ret = register_framebuffer(fbinfo_crt);
1627         if (ret < 0) {
1628                 dev_err(dev, "failed to register CRT fb (%d)\n", ret);
1629                 goto register_crt_fail;
1630         }
1631
1632         ret = register_framebuffer(fbinfo_pnl);
1633         if (ret < 0) {
1634                 dev_err(dev, "failed to register panel fb (%d)\n", ret);
1635                 goto register_pnl_fail;
1636         }
1637
1638         dev_info(dev, "fb%d: %s frame buffer device\n",
1639                  fbinfo_crt->node, fbinfo_crt->fix.id);
1640
1641         dev_info(dev, "fb%d: %s frame buffer device\n",
1642                fbinfo_pnl->node, fbinfo_pnl->fix.id);
1643
1644         /* create device files */
1645
1646         ret = device_create_file(dev, &dev_attr_crt_src);
1647         if (ret)
1648                 goto crtsrc_fail;
1649
1650         ret = device_create_file(dev, &dev_attr_fbregs_pnl);
1651         if (ret)
1652                 goto fbregs_pnl_fail;
1653
1654         ret = device_create_file(dev, &dev_attr_fbregs_crt);
1655         if (ret)
1656                 goto fbregs_crt_fail;
1657
1658         /* we registered, return ok */
1659         return 0;
1660
1661  fbregs_crt_fail:
1662         device_remove_file(dev, &dev_attr_fbregs_pnl);
1663
1664  fbregs_pnl_fail:
1665         device_remove_file(dev, &dev_attr_crt_src);
1666
1667  crtsrc_fail:
1668         unregister_framebuffer(fbinfo_pnl);
1669
1670  register_pnl_fail:
1671         unregister_framebuffer(fbinfo_crt);
1672
1673  register_crt_fail:
1674         sm501fb_stop(info);
1675
1676  sm501fb_start_fail:
1677         sm501fb_info_release(info);
1678
1679  sm501fb_alloc_fail:
1680         framebuffer_release(fbinfo_pnl);
1681
1682  fbinfo_crt_alloc_fail:
1683         framebuffer_release(fbinfo_crt);
1684
1685         return ret;
1686 }
1687
1688
1689 /*
1690  *  Cleanup
1691  */
1692 static int sm501fb_remove(struct platform_device *pdev)
1693 {
1694         struct sm501fb_info *info = platform_get_drvdata(pdev);
1695         struct fb_info     *fbinfo_crt = info->fb[0];
1696         struct fb_info     *fbinfo_pnl = info->fb[1];
1697
1698         device_remove_file(&pdev->dev, &dev_attr_fbregs_crt);
1699         device_remove_file(&pdev->dev, &dev_attr_fbregs_pnl);
1700         device_remove_file(&pdev->dev, &dev_attr_crt_src);
1701
1702         unregister_framebuffer(fbinfo_crt);
1703         unregister_framebuffer(fbinfo_pnl);
1704
1705         sm501fb_stop(info);
1706         sm501fb_info_release(info);
1707
1708         framebuffer_release(fbinfo_pnl);
1709         framebuffer_release(fbinfo_crt);
1710
1711         return 0;
1712 }
1713
1714 #ifdef CONFIG_PM
1715
1716 static int sm501fb_suspend_fb(struct sm501fb_info *info,
1717                               enum sm501_controller head)
1718 {
1719         struct fb_info *fbi = info->fb[head];
1720         struct sm501fb_par *par = fbi->par;
1721
1722         if (par->screen.size == 0)
1723                 return 0;
1724
1725         /* blank the relevant interface to ensure unit power minimised */
1726         (par->ops.fb_blank)(FB_BLANK_POWERDOWN, fbi);
1727
1728         /* tell console/fb driver we are suspending */
1729
1730         acquire_console_sem();
1731         fb_set_suspend(fbi, 1);
1732         release_console_sem();
1733
1734         /* backup copies in case chip is powered down over suspend */
1735
1736         par->store_fb = vmalloc(par->screen.size);
1737         if (par->store_fb == NULL) {
1738                 dev_err(info->dev, "no memory to store screen\n");
1739                 return -ENOMEM;
1740         }
1741
1742         par->store_cursor = vmalloc(par->cursor.size);
1743         if (par->store_cursor == NULL) {
1744                 dev_err(info->dev, "no memory to store cursor\n");
1745                 goto err_nocursor;
1746         }
1747
1748         dev_dbg(info->dev, "suspending screen to %p\n", par->store_fb);
1749         dev_dbg(info->dev, "suspending cursor to %p\n", par->store_cursor);
1750
1751         memcpy_fromio(par->store_fb, par->screen.k_addr, par->screen.size);
1752         memcpy_fromio(par->store_cursor, par->cursor.k_addr, par->cursor.size);
1753
1754         return 0;
1755
1756  err_nocursor:
1757         vfree(par->store_fb);
1758         par->store_fb = NULL;
1759
1760         return -ENOMEM;
1761 }
1762
1763 static void sm501fb_resume_fb(struct sm501fb_info *info,
1764                               enum sm501_controller head)
1765 {
1766         struct fb_info *fbi = info->fb[head];
1767         struct sm501fb_par *par = fbi->par;
1768
1769         if (par->screen.size == 0)
1770                 return;
1771
1772         /* re-activate the configuration */
1773
1774         (par->ops.fb_set_par)(fbi);
1775
1776         /* restore the data */
1777
1778         dev_dbg(info->dev, "restoring screen from %p\n", par->store_fb);
1779         dev_dbg(info->dev, "restoring cursor from %p\n", par->store_cursor);
1780
1781         if (par->store_fb)
1782                 memcpy_toio(par->screen.k_addr, par->store_fb,
1783                             par->screen.size);
1784
1785         if (par->store_cursor)
1786                 memcpy_toio(par->cursor.k_addr, par->store_cursor,
1787                             par->cursor.size);
1788
1789         acquire_console_sem();
1790         fb_set_suspend(fbi, 0);
1791         release_console_sem();
1792
1793         vfree(par->store_fb);
1794         vfree(par->store_cursor);
1795 }
1796
1797
1798 /* suspend and resume support */
1799
1800 static int sm501fb_suspend(struct platform_device *pdev, pm_message_t state)
1801 {
1802         struct sm501fb_info *info = platform_get_drvdata(pdev);
1803
1804         /* store crt control to resume with */
1805         info->pm_crt_ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1806
1807         sm501fb_suspend_fb(info, HEAD_CRT);
1808         sm501fb_suspend_fb(info, HEAD_PANEL);
1809
1810         /* turn off the clocks, in case the device is not powered down */
1811         sm501_unit_power(info->dev->parent, SM501_GATE_DISPLAY, 0);
1812
1813         return 0;
1814 }
1815
1816 #define SM501_CRT_CTRL_SAVE (SM501_DC_CRT_CONTROL_TVP |        \
1817                              SM501_DC_CRT_CONTROL_SEL)
1818
1819
1820 static int sm501fb_resume(struct platform_device *pdev)
1821 {
1822         struct sm501fb_info *info = platform_get_drvdata(pdev);
1823         unsigned long crt_ctrl;
1824
1825         sm501_unit_power(info->dev->parent, SM501_GATE_DISPLAY, 1);
1826
1827         /* restore the items we want to be saved for crt control */
1828
1829         crt_ctrl = readl(info->regs + SM501_DC_CRT_CONTROL);
1830         crt_ctrl &= ~SM501_CRT_CTRL_SAVE;
1831         crt_ctrl |= info->pm_crt_ctrl & SM501_CRT_CTRL_SAVE;
1832         writel(crt_ctrl, info->regs + SM501_DC_CRT_CONTROL);
1833
1834         sm501fb_resume_fb(info, HEAD_CRT);
1835         sm501fb_resume_fb(info, HEAD_PANEL);
1836
1837         return 0;
1838 }
1839
1840 #else
1841 #define sm501fb_suspend NULL
1842 #define sm501fb_resume  NULL
1843 #endif
1844
1845 static struct platform_driver sm501fb_driver = {
1846         .probe          = sm501fb_probe,
1847         .remove         = sm501fb_remove,
1848         .suspend        = sm501fb_suspend,
1849         .resume         = sm501fb_resume,
1850         .driver         = {
1851                 .name   = "sm501-fb",
1852                 .owner  = THIS_MODULE,
1853         },
1854 };
1855
1856 static int __devinit sm501fb_init(void)
1857 {
1858         return platform_driver_register(&sm501fb_driver);
1859 }
1860
1861 static void __exit sm501fb_cleanup(void)
1862 {
1863         platform_driver_unregister(&sm501fb_driver);
1864 }
1865
1866 module_init(sm501fb_init);
1867 module_exit(sm501fb_cleanup);
1868
1869 MODULE_AUTHOR("Ben Dooks, Vincent Sanders");
1870 MODULE_DESCRIPTION("SM501 Framebuffer driver");
1871 MODULE_LICENSE("GPL v2");