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   1 /*
   2  * SuperH Mobile LCDC Framebuffer
   3  *
   4  * Copyright (c) 2008 Magnus Damm
   5  *
   6  * This file is subject to the terms and conditions of the GNU General Public
   7  * License.  See the file "COPYING" in the main directory of this archive
   8  * for more details.
   9  */
  10
  11 #include <linux/kernel.h>
  12 #include <linux/init.h>
  13 #include <linux/delay.h>
  14 #include <linux/mm.h>
  15 #include <linux/fb.h>
  16 #include <linux/clk.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/dma-mapping.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/vmalloc.h>
  21 #include <video/sh_mobile_lcdc.h>
  22 #include <asm/atomic.h>
  23
  24 #define PALETTE_NR 16
  25
  26 struct sh_mobile_lcdc_priv;
  27 struct sh_mobile_lcdc_chan {
  28         struct sh_mobile_lcdc_priv *lcdc;
  29         unsigned long *reg_offs;
  30         unsigned long ldmt1r_value;
  31         unsigned long enabled; /* ME and SE in LDCNT2R */
  32         struct sh_mobile_lcdc_chan_cfg cfg;
  33         u32 pseudo_palette[PALETTE_NR];
  34         struct fb_info *info;
  35         dma_addr_t dma_handle;
  36         struct fb_deferred_io defio;
  37         struct scatterlist *sglist;
  38         unsigned long frame_end;
  39         wait_queue_head_t frame_end_wait;
  40 };
  41
  42 struct sh_mobile_lcdc_priv {
  43         void __iomem *base;
  44         int irq;
  45         atomic_t clk_usecnt;
  46         struct clk *dot_clk;
  47         struct clk *clk;
  48         unsigned long lddckr;
  49         struct sh_mobile_lcdc_chan ch[2];
  50         int started;
  51 };
  52
  53 /* shared registers */
  54 #define _LDDCKR 0x410
  55 #define _LDDCKSTPR 0x414
  56 #define _LDINTR 0x468
  57 #define _LDSR 0x46c
  58 #define _LDCNT1R 0x470
  59 #define _LDCNT2R 0x474
  60 #define _LDDDSR 0x47c
  61 #define _LDDWD0R 0x800
  62 #define _LDDRDR 0x840
  63 #define _LDDWAR 0x900
  64 #define _LDDRAR 0x904
  65
  66 /* per-channel registers */
  67 enum { LDDCKPAT1R, LDDCKPAT2R, LDMT1R, LDMT2R, LDMT3R, LDDFR, LDSM1R,
  68        LDSM2R, LDSA1R, LDMLSR, LDHCNR, LDHSYNR, LDVLNR, LDVSYNR, LDPMR };
  69
  70 static unsigned long lcdc_offs_mainlcd[] = {
  71         [LDDCKPAT1R] = 0x400,
  72         [LDDCKPAT2R] = 0x404,
  73         [LDMT1R] = 0x418,
  74         [LDMT2R] = 0x41c,
  75         [LDMT3R] = 0x420,
  76         [LDDFR] = 0x424,
  77         [LDSM1R] = 0x428,
  78         [LDSM2R] = 0x42c,
  79         [LDSA1R] = 0x430,
  80         [LDMLSR] = 0x438,
  81         [LDHCNR] = 0x448,
  82         [LDHSYNR] = 0x44c,
  83         [LDVLNR] = 0x450,
  84         [LDVSYNR] = 0x454,
  85         [LDPMR] = 0x460,
  86 };
  87
  88 static unsigned long lcdc_offs_sublcd[] = {
  89         [LDDCKPAT1R] = 0x408,
  90         [LDDCKPAT2R] = 0x40c,
  91         [LDMT1R] = 0x600,
  92         [LDMT2R] = 0x604,
  93         [LDMT3R] = 0x608,
  94         [LDDFR] = 0x60c,
  95         [LDSM1R] = 0x610,
  96         [LDSM2R] = 0x614,
  97         [LDSA1R] = 0x618,
  98         [LDMLSR] = 0x620,
  99         [LDHCNR] = 0x624,
 100         [LDHSYNR] = 0x628,
 101         [LDVLNR] = 0x62c,
 102         [LDVSYNR] = 0x630,
 103         [LDPMR] = 0x63c,
 104 };
 105
 106 #define START_LCDC      0x00000001
 107 #define LCDC_RESET      0x00000100
 108 #define DISPLAY_BEU     0x00000008
 109 #define LCDC_ENABLE     0x00000001
 110 #define LDINTR_FE       0x00000400
 111 #define LDINTR_FS       0x00000004
 112
 113 static void lcdc_write_chan(struct sh_mobile_lcdc_chan *chan,
 114                             int reg_nr, unsigned long data)
 115 {
 116         iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr]);
 117 }
 118
 119 static unsigned long lcdc_read_chan(struct sh_mobile_lcdc_chan *chan,
 120                                     int reg_nr)
 121 {
 122         return ioread32(chan->lcdc->base + chan->reg_offs[reg_nr]);
 123 }
 124
 125 static void lcdc_write(struct sh_mobile_lcdc_priv *priv,
 126                        unsigned long reg_offs, unsigned long data)
 127 {
 128         iowrite32(data, priv->base + reg_offs);
 129 }
 130
 131 static unsigned long lcdc_read(struct sh_mobile_lcdc_priv *priv,
 132                                unsigned long reg_offs)
 133 {
 134         return ioread32(priv->base + reg_offs);
 135 }
 136
 137 static void lcdc_wait_bit(struct sh_mobile_lcdc_priv *priv,
 138                           unsigned long reg_offs,
 139                           unsigned long mask, unsigned long until)
 140 {
 141         while ((lcdc_read(priv, reg_offs) & mask) != until)
 142                 cpu_relax();
 143 }
 144
 145 static int lcdc_chan_is_sublcd(struct sh_mobile_lcdc_chan *chan)
 146 {
 147         return chan->cfg.chan == LCDC_CHAN_SUBLCD;
 148 }
 149
 150 static void lcdc_sys_write_index(void *handle, unsigned long data)
 151 {
 152         struct sh_mobile_lcdc_chan *ch = handle;
 153
 154         lcdc_write(ch->lcdc, _LDDWD0R, data | 0x10000000);
 155         lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
 156         lcdc_write(ch->lcdc, _LDDWAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0));
 157         lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
 158 }
 159
 160 static void lcdc_sys_write_data(void *handle, unsigned long data)
 161 {
 162         struct sh_mobile_lcdc_chan *ch = handle;
 163
 164         lcdc_write(ch->lcdc, _LDDWD0R, data | 0x11000000);
 165         lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
 166         lcdc_write(ch->lcdc, _LDDWAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0));
 167         lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
 168 }
 169
 170 static unsigned long lcdc_sys_read_data(void *handle)
 171 {
 172         struct sh_mobile_lcdc_chan *ch = handle;
 173
 174         lcdc_write(ch->lcdc, _LDDRDR, 0x01000000);
 175         lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
 176         lcdc_write(ch->lcdc, _LDDRAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0));
 177         udelay(1);
 178         lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
 179
 180         return lcdc_read(ch->lcdc, _LDDRDR) & 0x3ffff;
 181 }
 182
 183 struct sh_mobile_lcdc_sys_bus_ops sh_mobile_lcdc_sys_bus_ops = {
 184         lcdc_sys_write_index,
 185         lcdc_sys_write_data,
 186         lcdc_sys_read_data,
 187 };
 188
 189 static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv)
 190 {
 191         if (atomic_inc_and_test(&priv->clk_usecnt)) {
 192                 clk_enable(priv->clk);
 193                 if (priv->dot_clk)
 194                         clk_enable(priv->dot_clk);
 195         }
 196 }
 197
 198 static void sh_mobile_lcdc_clk_off(struct sh_mobile_lcdc_priv *priv)
 199 {
 200         if (atomic_sub_return(1, &priv->clk_usecnt) == -1) {
 201                 if (priv->dot_clk)
 202                         clk_disable(priv->dot_clk);
 203                 clk_disable(priv->clk);
 204         }
 205 }
 206
 207 static int sh_mobile_lcdc_sginit(struct fb_info *info,
 208                                   struct list_head *pagelist)
 209 {
 210         struct sh_mobile_lcdc_chan *ch = info->par;
 211         unsigned int nr_pages_max = info->fix.smem_len >> PAGE_SHIFT;
 212         struct page *page;
 213         int nr_pages = 0;
 214
 215         sg_init_table(ch->sglist, nr_pages_max);
 216
 217         list_for_each_entry(page, pagelist, lru)
 218                 sg_set_page(&ch->sglist[nr_pages++], page, PAGE_SIZE, 0);
 219
 220         return nr_pages;
 221 }
 222
 223 static void sh_mobile_lcdc_deferred_io(struct fb_info *info,
 224                                        struct list_head *pagelist)
 225 {
 226         struct sh_mobile_lcdc_chan *ch = info->par;
 227         unsigned int nr_pages;
 228
 229         /* enable clocks before accessing hardware */
 230         sh_mobile_lcdc_clk_on(ch->lcdc);
 231
 232         nr_pages = sh_mobile_lcdc_sginit(info, pagelist);
 233         dma_map_sg(info->dev, ch->sglist, nr_pages, DMA_TO_DEVICE);
 234
 235         /* trigger panel update */
 236         lcdc_write_chan(ch, LDSM2R, 1);
 237
 238         dma_unmap_sg(info->dev, ch->sglist, nr_pages, DMA_TO_DEVICE);
 239 }
 240
 241 static void sh_mobile_lcdc_deferred_io_touch(struct fb_info *info)
 242 {
 243         struct fb_deferred_io *fbdefio = info->fbdefio;
 244
 245         if (fbdefio)
 246                 schedule_delayed_work(&info->deferred_work, fbdefio->delay);
 247 }
 248
 249 static irqreturn_t sh_mobile_lcdc_irq(int irq, void *data)
 250 {
 251         struct sh_mobile_lcdc_priv *priv = data;
 252         struct sh_mobile_lcdc_chan *ch;
 253         unsigned long tmp;
 254         int is_sub;
 255         int k;
 256
 257         /* acknowledge interrupt */
 258         tmp = lcdc_read(priv, _LDINTR);
 259         tmp &= 0xffffff00; /* mask in high 24 bits */
 260         tmp |= 0x000000ff ^ LDINTR_FS; /* status in low 8 */
 261         lcdc_write(priv, _LDINTR, tmp);
 262
 263         /* figure out if this interrupt is for main or sub lcd */
 264         is_sub = (lcdc_read(priv, _LDSR) & (1 << 10)) ? 1 : 0;
 265
 266         /* wake up channel and disable clocks*/
 267         for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
 268                 ch = &priv->ch[k];
 269
 270                 if (!ch->enabled)
 271                         continue;
 272
 273                 if (is_sub == lcdc_chan_is_sublcd(ch)) {
 274                         ch->frame_end = 1;
 275                         wake_up(&ch->frame_end_wait);
 276
 277                         sh_mobile_lcdc_clk_off(priv);
 278                 }
 279         }
 280
 281         return IRQ_HANDLED;
 282 }
 283
 284 static void sh_mobile_lcdc_start_stop(struct sh_mobile_lcdc_priv *priv,
 285                                       int start)
 286 {
 287         unsigned long tmp = lcdc_read(priv, _LDCNT2R);
 288         int k;
 289
 290         /* start or stop the lcdc */
 291         if (start)
 292                 lcdc_write(priv, _LDCNT2R, tmp | START_LCDC);
 293         else
 294                 lcdc_write(priv, _LDCNT2R, tmp & ~START_LCDC);
 295
 296         /* wait until power is applied/stopped on all channels */
 297         for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
 298                 if (lcdc_read(priv, _LDCNT2R) & priv->ch[k].enabled)
 299                         while (1) {
 300                                 tmp = lcdc_read_chan(&priv->ch[k], LDPMR) & 3;
 301                                 if (start && tmp == 3)
 302                                         break;
 303                                 if (!start && tmp == 0)
 304                                         break;
 305                                 cpu_relax();
 306                         }
 307
 308         if (!start)
 309                 lcdc_write(priv, _LDDCKSTPR, 1); /* stop dotclock */
 310 }
 311
 312 static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv)
 313 {
 314         struct sh_mobile_lcdc_chan *ch;
 315         struct fb_videomode *lcd_cfg;
 316         struct sh_mobile_lcdc_board_cfg *board_cfg;
 317         unsigned long tmp;
 318         int k, m;
 319         int ret = 0;
 320
 321         /* enable clocks before accessing the hardware */
 322         for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
 323                 if (priv->ch[k].enabled)
 324                         sh_mobile_lcdc_clk_on(priv);
 325
 326         /* reset */
 327         lcdc_write(priv, _LDCNT2R, lcdc_read(priv, _LDCNT2R) | LCDC_RESET);
 328         lcdc_wait_bit(priv, _LDCNT2R, LCDC_RESET, 0);
 329
 330         /* enable LCDC channels */
 331         tmp = lcdc_read(priv, _LDCNT2R);
 332         tmp |= priv->ch[0].enabled;
 333         tmp |= priv->ch[1].enabled;
 334         lcdc_write(priv, _LDCNT2R, tmp);
 335
 336         /* read data from external memory, avoid using the BEU for now */
 337         lcdc_write(priv, _LDCNT2R, lcdc_read(priv, _LDCNT2R) & ~DISPLAY_BEU);
 338
 339         /* stop the lcdc first */
 340         sh_mobile_lcdc_start_stop(priv, 0);
 341
 342         /* configure clocks */
 343         tmp = priv->lddckr;
 344         for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
 345                 ch = &priv->ch[k];
 346
 347                 if (!priv->ch[k].enabled)
 348                         continue;
 349
 350                 m = ch->cfg.clock_divider;
 351                 if (!m)
 352                         continue;
 353
 354                 if (m == 1)
 355                         m = 1 << 6;
 356                 tmp |= m << (lcdc_chan_is_sublcd(ch) ? 8 : 0);
 357
 358                 lcdc_write_chan(ch, LDDCKPAT1R, 0x00000000);
 359                 lcdc_write_chan(ch, LDDCKPAT2R, (1 << (m/2)) - 1);
 360         }
 361
 362         lcdc_write(priv, _LDDCKR, tmp);
 363
 364         /* start dotclock again */
 365         lcdc_write(priv, _LDDCKSTPR, 0);
 366         lcdc_wait_bit(priv, _LDDCKSTPR, ~0, 0);
 367
 368         /* interrupts are disabled to begin with */
 369         lcdc_write(priv, _LDINTR, 0);
 370
 371         for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
 372                 ch = &priv->ch[k];
 373                 lcd_cfg = &ch->cfg.lcd_cfg;
 374
 375                 if (!ch->enabled)
 376                         continue;
 377
 378                 tmp = ch->ldmt1r_value;
 379                 tmp |= (lcd_cfg->sync & FB_SYNC_VERT_HIGH_ACT) ? 0 : 1 << 28;
 380                 tmp |= (lcd_cfg->sync & FB_SYNC_HOR_HIGH_ACT) ? 0 : 1 << 27;
 381                 tmp |= (ch->cfg.flags & LCDC_FLAGS_DWPOL) ? 1 << 26 : 0;
 382                 tmp |= (ch->cfg.flags & LCDC_FLAGS_DIPOL) ? 1 << 25 : 0;
 383                 tmp |= (ch->cfg.flags & LCDC_FLAGS_DAPOL) ? 1 << 24 : 0;
 384                 tmp |= (ch->cfg.flags & LCDC_FLAGS_HSCNT) ? 1 << 17 : 0;
 385                 tmp |= (ch->cfg.flags & LCDC_FLAGS_DWCNT) ? 1 << 16 : 0;
 386                 lcdc_write_chan(ch, LDMT1R, tmp);
 387
 388                 /* setup SYS bus */
 389                 lcdc_write_chan(ch, LDMT2R, ch->cfg.sys_bus_cfg.ldmt2r);
 390                 lcdc_write_chan(ch, LDMT3R, ch->cfg.sys_bus_cfg.ldmt3r);
 391
 392                 /* horizontal configuration */
 393                 tmp = lcd_cfg->xres + lcd_cfg->hsync_len;
 394                 tmp += lcd_cfg->left_margin;
 395                 tmp += lcd_cfg->right_margin;
 396                 tmp /= 8; /* HTCN */
 397                 tmp |= (lcd_cfg->xres / 8) << 16; /* HDCN */
 398                 lcdc_write_chan(ch, LDHCNR, tmp);
 399
 400                 tmp = lcd_cfg->xres;
 401                 tmp += lcd_cfg->right_margin;
 402                 tmp /= 8; /* HSYNP */
 403                 tmp |= (lcd_cfg->hsync_len / 8) << 16; /* HSYNW */
 404                 lcdc_write_chan(ch, LDHSYNR, tmp);
 405
 406                 /* power supply */
 407                 lcdc_write_chan(ch, LDPMR, 0);
 408
 409                 /* vertical configuration */
 410                 tmp = lcd_cfg->yres + lcd_cfg->vsync_len;
 411                 tmp += lcd_cfg->upper_margin;
 412                 tmp += lcd_cfg->lower_margin; /* VTLN */
 413                 tmp |= lcd_cfg->yres << 16; /* VDLN */
 414                 lcdc_write_chan(ch, LDVLNR, tmp);
 415
 416                 tmp = lcd_cfg->yres;
 417                 tmp += lcd_cfg->lower_margin; /* VSYNP */
 418                 tmp |= lcd_cfg->vsync_len << 16; /* VSYNW */
 419                 lcdc_write_chan(ch, LDVSYNR, tmp);
 420
 421                 board_cfg = &ch->cfg.board_cfg;
 422                 if (board_cfg->setup_sys)
 423                         ret = board_cfg->setup_sys(board_cfg->board_data, ch,
 424                                                    &sh_mobile_lcdc_sys_bus_ops);
 425                 if (ret)
 426                         return ret;
 427         }
 428
 429         /* word and long word swap */
 430         lcdc_write(priv, _LDDDSR, lcdc_read(priv, _LDDDSR) | 6);
 431
 432         for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
 433                 ch = &priv->ch[k];
 434
 435                 if (!priv->ch[k].enabled)
 436                         continue;
 437
 438                 /* set bpp format in PKF[4:0] */
 439                 tmp = lcdc_read_chan(ch, LDDFR);
 440                 tmp &= ~(0x0001001f);
 441                 tmp |= (ch->info->var.bits_per_pixel == 16) ? 3 : 0;
 442                 lcdc_write_chan(ch, LDDFR, tmp);
 443
 444                 /* point out our frame buffer */
 445                 lcdc_write_chan(ch, LDSA1R, ch->info->fix.smem_start);
 446
 447                 /* set line size */
 448                 lcdc_write_chan(ch, LDMLSR, ch->info->fix.line_length);
 449
 450                 /* setup deferred io if SYS bus */
 451                 tmp = ch->cfg.sys_bus_cfg.deferred_io_msec;
 452                 if (ch->ldmt1r_value & (1 << 12) && tmp) {
 453                         ch->defio.deferred_io = sh_mobile_lcdc_deferred_io;
 454                         ch->defio.delay = msecs_to_jiffies(tmp);
 455                         ch->info->fbdefio = &ch->defio;
 456                         fb_deferred_io_init(ch->info);
 457
 458                         /* one-shot mode */
 459                         lcdc_write_chan(ch, LDSM1R, 1);
 460
 461                         /* enable "Frame End Interrupt Enable" bit */
 462                         lcdc_write(priv, _LDINTR, LDINTR_FE);
 463
 464                 } else {
 465                         /* continuous read mode */
 466                         lcdc_write_chan(ch, LDSM1R, 0);
 467                 }
 468         }
 469
 470         /* display output */
 471         lcdc_write(priv, _LDCNT1R, LCDC_ENABLE);
 472
 473         /* start the lcdc */
 474         sh_mobile_lcdc_start_stop(priv, 1);
 475         priv->started = 1;
 476
 477         /* tell the board code to enable the panel */
 478         for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
 479                 ch = &priv->ch[k];
 480                 board_cfg = &ch->cfg.board_cfg;
 481                 if (board_cfg->display_on)
 482                         board_cfg->display_on(board_cfg->board_data);
 483         }
 484
 485         return 0;
 486 }
 487
 488 static void sh_mobile_lcdc_stop(struct sh_mobile_lcdc_priv *priv)
 489 {
 490         struct sh_mobile_lcdc_chan *ch;
 491         struct sh_mobile_lcdc_board_cfg *board_cfg;
 492         int k;
 493
 494         /* clean up deferred io and ask board code to disable panel */
 495         for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
 496                 ch = &priv->ch[k];
 497
 498                 /* deferred io mode:
 499                  * flush frame, and wait for frame end interrupt
 500                  * clean up deferred io and enable clock
 501                  */
 502                 if (ch->info->fbdefio) {
 503                         ch->frame_end = 0;
 504                         schedule_delayed_work(&ch->info->deferred_work, 0);
 505                         wait_event(ch->frame_end_wait, ch->frame_end);
 506                         fb_deferred_io_cleanup(ch->info);
 507                         ch->info->fbdefio = NULL;
 508                         sh_mobile_lcdc_clk_on(priv);
 509                 }
 510
 511                 board_cfg = &ch->cfg.board_cfg;
 512                 if (board_cfg->display_off)
 513                         board_cfg->display_off(board_cfg->board_data);
 514         }
 515
 516         /* stop the lcdc */
 517         if (priv->started) {
 518                 sh_mobile_lcdc_start_stop(priv, 0);
 519                 priv->started = 0;
 520         }
 521
 522         /* stop clocks */
 523         for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
 524                 if (priv->ch[k].enabled)
 525                         sh_mobile_lcdc_clk_off(priv);
 526 }
 527
 528 static int sh_mobile_lcdc_check_interface(struct sh_mobile_lcdc_chan *ch)
 529 {
 530         int ifm, miftyp;
 531
 532         switch (ch->cfg.interface_type) {
 533         case RGB8: ifm = 0; miftyp = 0; break;
 534         case RGB9: ifm = 0; miftyp = 4; break;
 535         case RGB12A: ifm = 0; miftyp = 5; break;
 536         case RGB12B: ifm = 0; miftyp = 6; break;
 537         case RGB16: ifm = 0; miftyp = 7; break;
 538         case RGB18: ifm = 0; miftyp = 10; break;
 539         case RGB24: ifm = 0; miftyp = 11; break;
 540         case SYS8A: ifm = 1; miftyp = 0; break;
 541         case SYS8B: ifm = 1; miftyp = 1; break;
 542         case SYS8C: ifm = 1; miftyp = 2; break;
 543         case SYS8D: ifm = 1; miftyp = 3; break;
 544         case SYS9: ifm = 1; miftyp = 4; break;
 545         case SYS12: ifm = 1; miftyp = 5; break;
 546         case SYS16A: ifm = 1; miftyp = 7; break;
 547         case SYS16B: ifm = 1; miftyp = 8; break;
 548         case SYS16C: ifm = 1; miftyp = 9; break;
 549         case SYS18: ifm = 1; miftyp = 10; break;
 550         case SYS24: ifm = 1; miftyp = 11; break;
 551         default: goto bad;
 552         }
 553
 554         /* SUBLCD only supports SYS interface */
 555         if (lcdc_chan_is_sublcd(ch)) {
 556                 if (ifm == 0)
 557                         goto bad;
 558                 else
 559                         ifm = 0;
 560         }
 561
 562         ch->ldmt1r_value = (ifm << 12) | miftyp;
 563         return 0;
 564  bad:
 565         return -EINVAL;
 566 }
 567
 568 static int sh_mobile_lcdc_setup_clocks(struct platform_device *pdev,
 569                                        int clock_source,
 570                                        struct sh_mobile_lcdc_priv *priv)
 571 {
 572         char clk_name[8];
 573         char *str;
 574         int icksel;
 575
 576         switch (clock_source) {
 577         case LCDC_CLK_BUS: str = "bus_clk"; icksel = 0; break;
 578         case LCDC_CLK_PERIPHERAL: str = "peripheral_clk"; icksel = 1; break;
 579         case LCDC_CLK_EXTERNAL: str = NULL; icksel = 2; break;
 580         default:
 581                 return -EINVAL;
 582         }
 583
 584         priv->lddckr = icksel << 16;
 585
 586         atomic_set(&priv->clk_usecnt, -1);
 587         snprintf(clk_name, sizeof(clk_name), "lcdc%d", pdev->id);
 588         priv->clk = clk_get(&pdev->dev, clk_name);
 589         if (IS_ERR(priv->clk)) {
 590                 dev_err(&pdev->dev, "cannot get clock \"%s\"\n", clk_name);
 591                 return PTR_ERR(priv->clk);
 592         }
 593
 594         if (str) {
 595                 priv->dot_clk = clk_get(&pdev->dev, str);
 596                 if (IS_ERR(priv->dot_clk)) {
 597                         dev_err(&pdev->dev, "cannot get dot clock %s\n", str);
 598                         clk_put(priv->clk);
 599                         return PTR_ERR(priv->dot_clk);
 600                 }
 601         }
 602
 603         return 0;
 604 }
 605
 606 static int sh_mobile_lcdc_setcolreg(u_int regno,
 607                                     u_int red, u_int green, u_int blue,
 608                                     u_int transp, struct fb_info *info)
 609 {
 610         u32 *palette = info->pseudo_palette;
 611
 612         if (regno >= PALETTE_NR)
 613                 return -EINVAL;
 614
 615         /* only FB_VISUAL_TRUECOLOR supported */
 616
 617         red >>= 16 - info->var.red.length;
 618         green >>= 16 - info->var.green.length;
 619         blue >>= 16 - info->var.blue.length;
 620         transp >>= 16 - info->var.transp.length;
 621
 622         palette[regno] = (red << info->var.red.offset) |
 623           (green << info->var.green.offset) |
 624           (blue << info->var.blue.offset) |
 625           (transp << info->var.transp.offset);
 626
 627         return 0;
 628 }
 629
 630 static struct fb_fix_screeninfo sh_mobile_lcdc_fix  = {
 631         .id =           "SH Mobile LCDC",
 632         .type =         FB_TYPE_PACKED_PIXELS,
 633         .visual =       FB_VISUAL_TRUECOLOR,
 634         .accel =        FB_ACCEL_NONE,
 635 };
 636
 637 static void sh_mobile_lcdc_fillrect(struct fb_info *info,
 638                                     const struct fb_fillrect *rect)
 639 {
 640         sys_fillrect(info, rect);
 641         sh_mobile_lcdc_deferred_io_touch(info);
 642 }
 643
 644 static void sh_mobile_lcdc_copyarea(struct fb_info *info,
 645                                     const struct fb_copyarea *area)
 646 {
 647         sys_copyarea(info, area);
 648         sh_mobile_lcdc_deferred_io_touch(info);
 649 }
 650
 651 static void sh_mobile_lcdc_imageblit(struct fb_info *info,
 652                                      const struct fb_image *image)
 653 {
 654         sys_imageblit(info, image);
 655         sh_mobile_lcdc_deferred_io_touch(info);
 656 }
 657
 658 static struct fb_ops sh_mobile_lcdc_ops = {
 659         .fb_setcolreg   = sh_mobile_lcdc_setcolreg,
 660         .fb_read        = fb_sys_read,
 661         .fb_write       = fb_sys_write,
 662         .fb_fillrect    = sh_mobile_lcdc_fillrect,
 663         .fb_copyarea    = sh_mobile_lcdc_copyarea,
 664         .fb_imageblit   = sh_mobile_lcdc_imageblit,
 665 };
 666
 667 static int sh_mobile_lcdc_set_bpp(struct fb_var_screeninfo *var, int bpp)
 668 {
 669         switch (bpp) {
 670         case 16: /* PKF[4:0] = 00011 - RGB 565 */
 671                 var->red.offset = 11;
 672                 var->red.length = 5;
 673                 var->green.offset = 5;
 674                 var->green.length = 6;
 675                 var->blue.offset = 0;
 676                 var->blue.length = 5;
 677                 var->transp.offset = 0;
 678                 var->transp.length = 0;
 679                 break;
 680
 681         case 32: /* PKF[4:0] = 00000 - RGB 888
 682                   * sh7722 pdf says 00RRGGBB but reality is GGBB00RR
 683                   * this may be because LDDDSR has word swap enabled..
 684                   */
 685                 var->red.offset = 0;
 686                 var->red.length = 8;
 687                 var->green.offset = 24;
 688                 var->green.length = 8;
 689                 var->blue.offset = 16;
 690                 var->blue.length = 8;
 691                 var->transp.offset = 0;
 692                 var->transp.length = 0;
 693                 break;
 694         default:
 695                 return -EINVAL;
 696         }
 697         var->bits_per_pixel = bpp;
 698         var->red.msb_right = 0;
 699         var->green.msb_right = 0;
 700         var->blue.msb_right = 0;
 701         var->transp.msb_right = 0;
 702         return 0;
 703 }
 704
 705 static int sh_mobile_lcdc_suspend(struct device *dev)
 706 {
 707         struct platform_device *pdev = to_platform_device(dev);
 708
 709         sh_mobile_lcdc_stop(platform_get_drvdata(pdev));
 710         return 0;
 711 }
 712
 713 static int sh_mobile_lcdc_resume(struct device *dev)
 714 {
 715         struct platform_device *pdev = to_platform_device(dev);
 716
 717         return sh_mobile_lcdc_start(platform_get_drvdata(pdev));
 718 }
 719
 720 static struct dev_pm_ops sh_mobile_lcdc_dev_pm_ops = {
 721         .suspend = sh_mobile_lcdc_suspend,
 722         .resume = sh_mobile_lcdc_resume,
 723 };
 724
 725 static int sh_mobile_lcdc_remove(struct platform_device *pdev);
 726
 727 static int __init sh_mobile_lcdc_probe(struct platform_device *pdev)
 728 {
 729         struct fb_info *info;
 730         struct sh_mobile_lcdc_priv *priv;
 731         struct sh_mobile_lcdc_info *pdata;
 732         struct sh_mobile_lcdc_chan_cfg *cfg;
 733         struct resource *res;
 734         int error;
 735         void *buf;
 736         int i, j;
 737
 738         if (!pdev->dev.platform_data) {
 739                 dev_err(&pdev->dev, "no platform data defined\n");
 740                 error = -EINVAL;
 741                 goto err0;
 742         }
 743
 744         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 745         i = platform_get_irq(pdev, 0);
 746         if (!res || i < 0) {
 747                 dev_err(&pdev->dev, "cannot get platform resources\n");
 748                 error = -ENOENT;
 749                 goto err0;
 750         }
 751
 752         priv = kzalloc(sizeof(*priv), GFP_KERNEL);
 753         if (!priv) {
 754                 dev_err(&pdev->dev, "cannot allocate device data\n");
 755                 error = -ENOMEM;
 756                 goto err0;
 757         }
 758
 759         error = request_irq(i, sh_mobile_lcdc_irq, IRQF_DISABLED,
 760                             dev_name(&pdev->dev), priv);
 761         if (error) {
 762                 dev_err(&pdev->dev, "unable to request irq\n");
 763                 goto err1;
 764         }
 765
 766         priv->irq = i;
 767         platform_set_drvdata(pdev, priv);
 768         pdata = pdev->dev.platform_data;
 769
 770         j = 0;
 771         for (i = 0; i < ARRAY_SIZE(pdata->ch); i++) {
 772                 priv->ch[j].lcdc = priv;
 773                 memcpy(&priv->ch[j].cfg, &pdata->ch[i], sizeof(pdata->ch[i]));
 774
 775                 error = sh_mobile_lcdc_check_interface(&priv->ch[i]);
 776                 if (error) {
 777                         dev_err(&pdev->dev, "unsupported interface type\n");
 778                         goto err1;
 779                 }
 780                 init_waitqueue_head(&priv->ch[i].frame_end_wait);
 781
 782                 switch (pdata->ch[i].chan) {
 783                 case LCDC_CHAN_MAINLCD:
 784                         priv->ch[j].enabled = 1 << 1;
 785                         priv->ch[j].reg_offs = lcdc_offs_mainlcd;
 786                         j++;
 787                         break;
 788                 case LCDC_CHAN_SUBLCD:
 789                         priv->ch[j].enabled = 1 << 2;
 790                         priv->ch[j].reg_offs = lcdc_offs_sublcd;
 791                         j++;
 792                         break;
 793                 }
 794         }
 795
 796         if (!j) {
 797                 dev_err(&pdev->dev, "no channels defined\n");
 798                 error = -EINVAL;
 799                 goto err1;
 800         }
 801
 802         error = sh_mobile_lcdc_setup_clocks(pdev, pdata->clock_source, priv);
 803         if (error) {
 804                 dev_err(&pdev->dev, "unable to setup clocks\n");
 805                 goto err1;
 806         }
 807
 808         priv->base = ioremap_nocache(res->start, (res->end - res->start) + 1);
 809
 810         for (i = 0; i < j; i++) {
 811                 cfg = &priv->ch[i].cfg;
 812
 813                 priv->ch[i].info = framebuffer_alloc(0, &pdev->dev);
 814                 if (!priv->ch[i].info) {
 815                         dev_err(&pdev->dev, "unable to allocate fb_info\n");
 816                         error = -ENOMEM;
 817                         break;
 818                 }
 819
 820                 info = priv->ch[i].info;
 821                 info->fbops = &sh_mobile_lcdc_ops;
 822                 info->var.xres = info->var.xres_virtual = cfg->lcd_cfg.xres;
 823                 info->var.yres = info->var.yres_virtual = cfg->lcd_cfg.yres;
 824                 info->var.width = cfg->lcd_size_cfg.width;
 825                 info->var.height = cfg->lcd_size_cfg.height;
 826                 info->var.activate = FB_ACTIVATE_NOW;
 827                 error = sh_mobile_lcdc_set_bpp(&info->var, cfg->bpp);
 828                 if (error)
 829                         break;
 830
 831                 info->fix = sh_mobile_lcdc_fix;
 832                 info->fix.line_length = cfg->lcd_cfg.xres * (cfg->bpp / 8);
 833                 info->fix.smem_len = info->fix.line_length * cfg->lcd_cfg.yres;
 834
 835                 buf = dma_alloc_coherent(&pdev->dev, info->fix.smem_len,
 836                                          &priv->ch[i].dma_handle, GFP_KERNEL);
 837                 if (!buf) {
 838                         dev_err(&pdev->dev, "unable to allocate buffer\n");
 839                         error = -ENOMEM;
 840                         break;
 841                 }
 842
 843                 info->pseudo_palette = &priv->ch[i].pseudo_palette;
 844                 info->flags = FBINFO_FLAG_DEFAULT;
 845
 846                 error = fb_alloc_cmap(&info->cmap, PALETTE_NR, 0);
 847                 if (error < 0) {
 848                         dev_err(&pdev->dev, "unable to allocate cmap\n");
 849                         dma_free_coherent(&pdev->dev, info->fix.smem_len,
 850                                           buf, priv->ch[i].dma_handle);
 851                         break;
 852                 }
 853
 854                 memset(buf, 0, info->fix.smem_len);
 855                 info->fix.smem_start = priv->ch[i].dma_handle;
 856                 info->screen_base = buf;
 857                 info->device = &pdev->dev;
 858                 info->par = &priv->ch[i];
 859         }
 860
 861         if (error)
 862                 goto err1;
 863
 864         error = sh_mobile_lcdc_start(priv);
 865         if (error) {
 866                 dev_err(&pdev->dev, "unable to start hardware\n");
 867                 goto err1;
 868         }
 869
 870         for (i = 0; i < j; i++) {
 871                 struct sh_mobile_lcdc_chan *ch = priv->ch + i;
 872
 873                 info = ch->info;
 874
 875                 if (info->fbdefio) {
 876                         priv->ch->sglist = vmalloc(sizeof(struct scatterlist) *
 877                                         info->fix.smem_len >> PAGE_SHIFT);
 878                         if (!priv->ch->sglist) {
 879                                 dev_err(&pdev->dev, "cannot allocate sglist\n");
 880                                 goto err1;
 881                         }
 882                 }
 883
 884                 error = register_framebuffer(info);
 885                 if (error < 0)
 886                         goto err1;
 887
 888                 dev_info(info->dev,
 889                          "registered %s/%s as %dx%d %dbpp.\n",
 890                          pdev->name,
 891                          (ch->cfg.chan == LCDC_CHAN_MAINLCD) ?
 892                          "mainlcd" : "sublcd",
 893                          (int) ch->cfg.lcd_cfg.xres,
 894                          (int) ch->cfg.lcd_cfg.yres,
 895                          ch->cfg.bpp);
 896
 897                 /* deferred io mode: disable clock to save power */
 898                 if (info->fbdefio)
 899                         sh_mobile_lcdc_clk_off(priv);
 900         }
 901
 902         return 0;
 903  err1:
 904         sh_mobile_lcdc_remove(pdev);
 905  err0:
 906         return error;
 907 }
 908
 909 static int sh_mobile_lcdc_remove(struct platform_device *pdev)
 910 {
 911         struct sh_mobile_lcdc_priv *priv = platform_get_drvdata(pdev);
 912         struct fb_info *info;
 913         int i;
 914
 915         for (i = 0; i < ARRAY_SIZE(priv->ch); i++)
 916                 if (priv->ch[i].info->dev)
 917                         unregister_framebuffer(priv->ch[i].info);
 918
 919         sh_mobile_lcdc_stop(priv);
 920
 921         for (i = 0; i < ARRAY_SIZE(priv->ch); i++) {
 922                 info = priv->ch[i].info;
 923
 924                 if (!info || !info->device)
 925                         continue;
 926
 927                 if (priv->ch[i].sglist)
 928                         vfree(priv->ch[i].sglist);
 929
 930                 dma_free_coherent(&pdev->dev, info->fix.smem_len,
 931                                   info->screen_base, priv->ch[i].dma_handle);
 932                 fb_dealloc_cmap(&info->cmap);
 933                 framebuffer_release(info);
 934         }
 935
 936         if (priv->dot_clk)
 937                 clk_put(priv->dot_clk);
 938         clk_put(priv->clk);
 939
 940         if (priv->base)
 941                 iounmap(priv->base);
 942
 943         if (priv->irq)
 944                 free_irq(priv->irq, priv);
 945         kfree(priv);
 946         return 0;
 947 }
 948
 949 static struct platform_driver sh_mobile_lcdc_driver = {
 950         .driver         = {
 951                 .name           = "sh_mobile_lcdc_fb",
 952                 .owner          = THIS_MODULE,
 953                 .pm             = &sh_mobile_lcdc_dev_pm_ops,
 954         },
 955         .probe          = sh_mobile_lcdc_probe,
 956         .remove         = sh_mobile_lcdc_remove,
 957 };
 958
 959 static int __init sh_mobile_lcdc_init(void)
 960 {
 961         return platform_driver_register(&sh_mobile_lcdc_driver);
 962 }
 963
 964 static void __exit sh_mobile_lcdc_exit(void)
 965 {
 966         platform_driver_unregister(&sh_mobile_lcdc_driver);
 967 }
 968
 969 module_init(sh_mobile_lcdc_init);
 970 module_exit(sh_mobile_lcdc_exit);
 971
 972 MODULE_DESCRIPTION("SuperH Mobile LCDC Framebuffer driver");
 973 MODULE_AUTHOR("Magnus Damm <damm@opensource.se>");
 974 MODULE_LICENSE("GPL v2");