atmel_lcdfb: wiring BGR to RGB color mode
[safe/jmp/linux-2.6] / drivers / video / atmel_lcdfb.c
1 /*
2  *  Driver for AT91/AT32 LCD Controller
3  *
4  *  Copyright (C) 2007 Atmel Corporation
5  *
6  * This file is subject to the terms and conditions of the GNU General Public
7  * License.  See the file COPYING in the main directory of this archive for
8  * more details.
9  */
10
11 #include <linux/kernel.h>
12 #include <linux/platform_device.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/interrupt.h>
15 #include <linux/clk.h>
16 #include <linux/fb.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/backlight.h>
20
21 #include <asm/arch/board.h>
22 #include <asm/arch/cpu.h>
23 #include <asm/arch/gpio.h>
24
25 #include <video/atmel_lcdc.h>
26
27 #define lcdc_readl(sinfo, reg)          __raw_readl((sinfo)->mmio+(reg))
28 #define lcdc_writel(sinfo, reg, val)    __raw_writel((val), (sinfo)->mmio+(reg))
29
30 /* configurable parameters */
31 #define ATMEL_LCDC_CVAL_DEFAULT         0xc8
32 #define ATMEL_LCDC_DMA_BURST_LEN        8
33
34 #if defined(CONFIG_ARCH_AT91SAM9263) || defined(CONFIG_ARCH_AT91CAP9)
35 #define ATMEL_LCDC_FIFO_SIZE            2048
36 #else
37 #define ATMEL_LCDC_FIFO_SIZE            512
38 #endif
39
40 #if defined(CONFIG_ARCH_AT91)
41 #define ATMEL_LCDFB_FBINFO_DEFAULT      FBINFO_DEFAULT
42
43 static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
44                                         struct fb_var_screeninfo *var)
45 {
46
47 }
48 #elif defined(CONFIG_AVR32)
49 #define ATMEL_LCDFB_FBINFO_DEFAULT      (FBINFO_DEFAULT \
50                                         | FBINFO_PARTIAL_PAN_OK \
51                                         | FBINFO_HWACCEL_XPAN \
52                                         | FBINFO_HWACCEL_YPAN)
53
54 static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
55                                      struct fb_var_screeninfo *var)
56 {
57         u32 dma2dcfg;
58         u32 pixeloff;
59
60         pixeloff = (var->xoffset * var->bits_per_pixel) & 0x1f;
61
62         dma2dcfg = ((var->xres_virtual - var->xres) * var->bits_per_pixel) / 8;
63         dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET;
64         lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg);
65
66         /* Update configuration */
67         lcdc_writel(sinfo, ATMEL_LCDC_DMACON,
68                     lcdc_readl(sinfo, ATMEL_LCDC_DMACON)
69                     | ATMEL_LCDC_DMAUPDT);
70 }
71 #endif
72
73 static const u32 contrast_ctr = ATMEL_LCDC_PS_DIV8
74                 | ATMEL_LCDC_POL_POSITIVE
75                 | ATMEL_LCDC_ENA_PWMENABLE;
76
77 #ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
78
79 /* some bl->props field just changed */
80 static int atmel_bl_update_status(struct backlight_device *bl)
81 {
82         struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
83         int                     power = sinfo->bl_power;
84         int                     brightness = bl->props.brightness;
85
86         /* REVISIT there may be a meaningful difference between
87          * fb_blank and power ... there seem to be some cases
88          * this doesn't handle correctly.
89          */
90         if (bl->props.fb_blank != sinfo->bl_power)
91                 power = bl->props.fb_blank;
92         else if (bl->props.power != sinfo->bl_power)
93                 power = bl->props.power;
94
95         if (brightness < 0 && power == FB_BLANK_UNBLANK)
96                 brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
97         else if (power != FB_BLANK_UNBLANK)
98                 brightness = 0;
99
100         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness);
101         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,
102                         brightness ? contrast_ctr : 0);
103
104         bl->props.fb_blank = bl->props.power = sinfo->bl_power = power;
105
106         return 0;
107 }
108
109 static int atmel_bl_get_brightness(struct backlight_device *bl)
110 {
111         struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
112
113         return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
114 }
115
116 static struct backlight_ops atmel_lcdc_bl_ops = {
117         .update_status = atmel_bl_update_status,
118         .get_brightness = atmel_bl_get_brightness,
119 };
120
121 static void init_backlight(struct atmel_lcdfb_info *sinfo)
122 {
123         struct backlight_device *bl;
124
125         sinfo->bl_power = FB_BLANK_UNBLANK;
126
127         if (sinfo->backlight)
128                 return;
129
130         bl = backlight_device_register("backlight", &sinfo->pdev->dev,
131                         sinfo, &atmel_lcdc_bl_ops);
132         if (IS_ERR(sinfo->backlight)) {
133                 dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n",
134                                 PTR_ERR(bl));
135                 return;
136         }
137         sinfo->backlight = bl;
138
139         bl->props.power = FB_BLANK_UNBLANK;
140         bl->props.fb_blank = FB_BLANK_UNBLANK;
141         bl->props.max_brightness = 0xff;
142         bl->props.brightness = atmel_bl_get_brightness(bl);
143 }
144
145 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
146 {
147         if (sinfo->backlight)
148                 backlight_device_unregister(sinfo->backlight);
149 }
150
151 #else
152
153 static void init_backlight(struct atmel_lcdfb_info *sinfo)
154 {
155         dev_warn(&sinfo->pdev->dev, "backlight control is not available\n");
156 }
157
158 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
159 {
160 }
161
162 #endif
163
164 static void init_contrast(struct atmel_lcdfb_info *sinfo)
165 {
166         /* have some default contrast/backlight settings */
167         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
168         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
169
170         if (sinfo->lcdcon_is_backlight)
171                 init_backlight(sinfo);
172 }
173
174
175 static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
176         .type           = FB_TYPE_PACKED_PIXELS,
177         .visual         = FB_VISUAL_TRUECOLOR,
178         .xpanstep       = 0,
179         .ypanstep       = 0,
180         .ywrapstep      = 0,
181         .accel          = FB_ACCEL_NONE,
182 };
183
184 static unsigned long compute_hozval(unsigned long xres, unsigned long lcdcon2)
185 {
186         unsigned long value;
187
188         if (!(cpu_is_at91sam9261() || cpu_is_at32ap7000()))
189                 return xres;
190
191         value = xres;
192         if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) {
193                 /* STN display */
194                 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) {
195                         value *= 3;
196                 }
197                 if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4
198                    || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8
199                       && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL ))
200                         value = DIV_ROUND_UP(value, 4);
201                 else
202                         value = DIV_ROUND_UP(value, 8);
203         }
204
205         return value;
206 }
207
208 static void atmel_lcdfb_update_dma(struct fb_info *info,
209                                struct fb_var_screeninfo *var)
210 {
211         struct atmel_lcdfb_info *sinfo = info->par;
212         struct fb_fix_screeninfo *fix = &info->fix;
213         unsigned long dma_addr;
214
215         dma_addr = (fix->smem_start + var->yoffset * fix->line_length
216                     + var->xoffset * var->bits_per_pixel / 8);
217
218         dma_addr &= ~3UL;
219
220         /* Set framebuffer DMA base address and pixel offset */
221         lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
222
223         atmel_lcdfb_update_dma2d(sinfo, var);
224 }
225
226 static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
227 {
228         struct fb_info *info = sinfo->info;
229
230         dma_free_writecombine(info->device, info->fix.smem_len,
231                                 info->screen_base, info->fix.smem_start);
232 }
233
234 /**
235  *      atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
236  *      @sinfo: the frame buffer to allocate memory for
237  */
238 static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
239 {
240         struct fb_info *info = sinfo->info;
241         struct fb_var_screeninfo *var = &info->var;
242
243         info->fix.smem_len = (var->xres_virtual * var->yres_virtual
244                             * ((var->bits_per_pixel + 7) / 8));
245
246         info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len,
247                                         (dma_addr_t *)&info->fix.smem_start, GFP_KERNEL);
248
249         if (!info->screen_base) {
250                 return -ENOMEM;
251         }
252
253         memset(info->screen_base, 0, info->fix.smem_len);
254
255         return 0;
256 }
257
258 /**
259  *      atmel_lcdfb_check_var - Validates a var passed in.
260  *      @var: frame buffer variable screen structure
261  *      @info: frame buffer structure that represents a single frame buffer
262  *
263  *      Checks to see if the hardware supports the state requested by
264  *      var passed in. This function does not alter the hardware
265  *      state!!!  This means the data stored in struct fb_info and
266  *      struct atmel_lcdfb_info do not change. This includes the var
267  *      inside of struct fb_info.  Do NOT change these. This function
268  *      can be called on its own if we intent to only test a mode and
269  *      not actually set it. The stuff in modedb.c is a example of
270  *      this. If the var passed in is slightly off by what the
271  *      hardware can support then we alter the var PASSED in to what
272  *      we can do. If the hardware doesn't support mode change a
273  *      -EINVAL will be returned by the upper layers. You don't need
274  *      to implement this function then. If you hardware doesn't
275  *      support changing the resolution then this function is not
276  *      needed. In this case the driver would just provide a var that
277  *      represents the static state the screen is in.
278  *
279  *      Returns negative errno on error, or zero on success.
280  */
281 static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
282                              struct fb_info *info)
283 {
284         struct device *dev = info->device;
285         struct atmel_lcdfb_info *sinfo = info->par;
286         unsigned long clk_value_khz;
287
288         clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
289
290         dev_dbg(dev, "%s:\n", __func__);
291         dev_dbg(dev, "  resolution: %ux%u\n", var->xres, var->yres);
292         dev_dbg(dev, "  pixclk:     %lu KHz\n", PICOS2KHZ(var->pixclock));
293         dev_dbg(dev, "  bpp:        %u\n", var->bits_per_pixel);
294         dev_dbg(dev, "  clk:        %lu KHz\n", clk_value_khz);
295
296         if ((PICOS2KHZ(var->pixclock) * var->bits_per_pixel / 8) > clk_value_khz) {
297                 dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
298                 return -EINVAL;
299         }
300
301         /* Force same alignment for each line */
302         var->xres = (var->xres + 3) & ~3UL;
303         var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
304
305         var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
306         var->transp.msb_right = 0;
307         var->transp.offset = var->transp.length = 0;
308         var->xoffset = var->yoffset = 0;
309
310         /* Saturate vertical and horizontal timings at maximum values */
311         var->vsync_len = min_t(u32, var->vsync_len,
312                         (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
313         var->upper_margin = min_t(u32, var->upper_margin,
314                         ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
315         var->lower_margin = min_t(u32, var->lower_margin,
316                         ATMEL_LCDC_VFP);
317         var->right_margin = min_t(u32, var->right_margin,
318                         (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
319         var->hsync_len = min_t(u32, var->hsync_len,
320                         (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
321         var->left_margin = min_t(u32, var->left_margin,
322                         ATMEL_LCDC_HBP + 1);
323
324         /* Some parameters can't be zero */
325         var->vsync_len = max_t(u32, var->vsync_len, 1);
326         var->right_margin = max_t(u32, var->right_margin, 1);
327         var->hsync_len = max_t(u32, var->hsync_len, 1);
328         var->left_margin = max_t(u32, var->left_margin, 1);
329
330         switch (var->bits_per_pixel) {
331         case 1:
332         case 2:
333         case 4:
334         case 8:
335                 var->red.offset = var->green.offset = var->blue.offset = 0;
336                 var->red.length = var->green.length = var->blue.length
337                         = var->bits_per_pixel;
338                 break;
339         case 15:
340         case 16:
341                 if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
342                         /* RGB:565 mode */
343                         var->red.offset = 11;
344                         var->blue.offset = 0;
345                         var->green.length = 6;
346                 } else {
347                         /* BGR:555 mode */
348                         var->red.offset = 0;
349                         var->blue.offset = 10;
350                         var->green.length = 5;
351                 }
352                 var->green.offset = 5;
353                 var->red.length = var->blue.length = 5;
354                 break;
355         case 32:
356                 var->transp.offset = 24;
357                 var->transp.length = 8;
358                 /* fall through */
359         case 24:
360                 if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
361                         /* RGB:888 mode */
362                         var->red.offset = 16;
363                         var->blue.offset = 0;
364                 } else {
365                         /* BGR:888 mode */
366                         var->red.offset = 0;
367                         var->blue.offset = 16;
368                 }
369                 var->green.offset = 8;
370                 var->red.length = var->green.length = var->blue.length = 8;
371                 break;
372         default:
373                 dev_err(dev, "color depth %d not supported\n",
374                                         var->bits_per_pixel);
375                 return -EINVAL;
376         }
377
378         return 0;
379 }
380
381 /**
382  *      atmel_lcdfb_set_par - Alters the hardware state.
383  *      @info: frame buffer structure that represents a single frame buffer
384  *
385  *      Using the fb_var_screeninfo in fb_info we set the resolution
386  *      of the this particular framebuffer. This function alters the
387  *      par AND the fb_fix_screeninfo stored in fb_info. It doesn't
388  *      not alter var in fb_info since we are using that data. This
389  *      means we depend on the data in var inside fb_info to be
390  *      supported by the hardware.  atmel_lcdfb_check_var is always called
391  *      before atmel_lcdfb_set_par to ensure this.  Again if you can't
392  *      change the resolution you don't need this function.
393  *
394  */
395 static int atmel_lcdfb_set_par(struct fb_info *info)
396 {
397         struct atmel_lcdfb_info *sinfo = info->par;
398         unsigned long hozval_linesz;
399         unsigned long value;
400         unsigned long clk_value_khz;
401         unsigned long bits_per_line;
402
403         dev_dbg(info->device, "%s:\n", __func__);
404         dev_dbg(info->device, "  * resolution: %ux%u (%ux%u virtual)\n",
405                  info->var.xres, info->var.yres,
406                  info->var.xres_virtual, info->var.yres_virtual);
407
408         /* Turn off the LCD controller and the DMA controller */
409         lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
410
411         /* Wait for the LCDC core to become idle */
412         while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
413                 msleep(10);
414
415         lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
416
417         if (info->var.bits_per_pixel == 1)
418                 info->fix.visual = FB_VISUAL_MONO01;
419         else if (info->var.bits_per_pixel <= 8)
420                 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
421         else
422                 info->fix.visual = FB_VISUAL_TRUECOLOR;
423
424         bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel;
425         info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8);
426
427         /* Re-initialize the DMA engine... */
428         dev_dbg(info->device, "  * update DMA engine\n");
429         atmel_lcdfb_update_dma(info, &info->var);
430
431         /* ...set frame size and burst length = 8 words (?) */
432         value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;
433         value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
434         lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);
435
436         /* Now, the LCDC core... */
437
438         /* Set pixel clock */
439         clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
440
441         value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
442
443         value = (value / 2) - 1;
444         dev_dbg(info->device, "  * programming CLKVAL = 0x%08lx\n", value);
445
446         if (value <= 0) {
447                 dev_notice(info->device, "Bypassing pixel clock divider\n");
448                 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
449         } else {
450                 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, value << ATMEL_LCDC_CLKVAL_OFFSET);
451                 info->var.pixclock = KHZ2PICOS(clk_value_khz / (2 * (value + 1)));
452                 dev_dbg(info->device, "  updated pixclk:     %lu KHz\n",
453                                         PICOS2KHZ(info->var.pixclock));
454         }
455
456
457         /* Initialize control register 2 */
458         value = sinfo->default_lcdcon2;
459
460         if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
461                 value |= ATMEL_LCDC_INVLINE_INVERTED;
462         if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
463                 value |= ATMEL_LCDC_INVFRAME_INVERTED;
464
465         switch (info->var.bits_per_pixel) {
466                 case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break;
467                 case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;
468                 case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;
469                 case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;
470                 case 15: /* fall through */
471                 case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;
472                 case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;
473                 case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;
474                 default: BUG(); break;
475         }
476         dev_dbg(info->device, "  * LCDCON2 = %08lx\n", value);
477         lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);
478
479         /* Vertical timing */
480         value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
481         value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;
482         value |= info->var.lower_margin;
483         dev_dbg(info->device, "  * LCDTIM1 = %08lx\n", value);
484         lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
485
486         /* Horizontal timing */
487         value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
488         value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
489         value |= (info->var.left_margin - 1);
490         dev_dbg(info->device, "  * LCDTIM2 = %08lx\n", value);
491         lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
492
493         /* Horizontal value (aka line size) */
494         hozval_linesz = compute_hozval(info->var.xres,
495                                         lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2));
496
497         /* Display size */
498         value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
499         value |= info->var.yres - 1;
500         dev_dbg(info->device, "  * LCDFRMCFG = %08lx\n", value);
501         lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
502
503         /* FIFO Threshold: Use formula from data sheet */
504         value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
505         lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);
506
507         /* Toggle LCD_MODE every frame */
508         lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);
509
510         /* Disable all interrupts */
511         lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
512
513         /* ...wait for DMA engine to become idle... */
514         while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
515                 msleep(10);
516
517         dev_dbg(info->device, "  * re-enable DMA engine\n");
518         /* ...and enable it with updated configuration */
519         lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
520
521         dev_dbg(info->device, "  * re-enable LCDC core\n");
522         lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
523                 (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET) | ATMEL_LCDC_PWR);
524
525         dev_dbg(info->device, "  * DONE\n");
526
527         return 0;
528 }
529
530 static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf)
531 {
532         chan &= 0xffff;
533         chan >>= 16 - bf->length;
534         return chan << bf->offset;
535 }
536
537 /**
538  *      atmel_lcdfb_setcolreg - Optional function. Sets a color register.
539  *      @regno: Which register in the CLUT we are programming
540  *      @red: The red value which can be up to 16 bits wide
541  *      @green: The green value which can be up to 16 bits wide
542  *      @blue:  The blue value which can be up to 16 bits wide.
543  *      @transp: If supported the alpha value which can be up to 16 bits wide.
544  *      @info: frame buffer info structure
545  *
546  *      Set a single color register. The values supplied have a 16 bit
547  *      magnitude which needs to be scaled in this function for the hardware.
548  *      Things to take into consideration are how many color registers, if
549  *      any, are supported with the current color visual. With truecolor mode
550  *      no color palettes are supported. Here a psuedo palette is created
551  *      which we store the value in pseudo_palette in struct fb_info. For
552  *      pseudocolor mode we have a limited color palette. To deal with this
553  *      we can program what color is displayed for a particular pixel value.
554  *      DirectColor is similar in that we can program each color field. If
555  *      we have a static colormap we don't need to implement this function.
556  *
557  *      Returns negative errno on error, or zero on success. In an
558  *      ideal world, this would have been the case, but as it turns
559  *      out, the other drivers return 1 on failure, so that's what
560  *      we're going to do.
561  */
562 static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
563                              unsigned int green, unsigned int blue,
564                              unsigned int transp, struct fb_info *info)
565 {
566         struct atmel_lcdfb_info *sinfo = info->par;
567         unsigned int val;
568         u32 *pal;
569         int ret = 1;
570
571         if (info->var.grayscale)
572                 red = green = blue = (19595 * red + 38470 * green
573                                       + 7471 * blue) >> 16;
574
575         switch (info->fix.visual) {
576         case FB_VISUAL_TRUECOLOR:
577                 if (regno < 16) {
578                         pal = info->pseudo_palette;
579
580                         val  = chan_to_field(red, &info->var.red);
581                         val |= chan_to_field(green, &info->var.green);
582                         val |= chan_to_field(blue, &info->var.blue);
583
584                         pal[regno] = val;
585                         ret = 0;
586                 }
587                 break;
588
589         case FB_VISUAL_PSEUDOCOLOR:
590                 if (regno < 256) {
591                         val  = ((red   >> 11) & 0x001f);
592                         val |= ((green >>  6) & 0x03e0);
593                         val |= ((blue  >>  1) & 0x7c00);
594
595                         /*
596                          * TODO: intensity bit. Maybe something like
597                          *   ~(red[10] ^ green[10] ^ blue[10]) & 1
598                          */
599
600                         lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
601                         ret = 0;
602                 }
603                 break;
604
605         case FB_VISUAL_MONO01:
606                 if (regno < 2) {
607                         val = (regno == 0) ? 0x00 : 0x1F;
608                         lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
609                         ret = 0;
610                 }
611                 break;
612
613         }
614
615         return ret;
616 }
617
618 static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
619                                struct fb_info *info)
620 {
621         dev_dbg(info->device, "%s\n", __func__);
622
623         atmel_lcdfb_update_dma(info, var);
624
625         return 0;
626 }
627
628 static struct fb_ops atmel_lcdfb_ops = {
629         .owner          = THIS_MODULE,
630         .fb_check_var   = atmel_lcdfb_check_var,
631         .fb_set_par     = atmel_lcdfb_set_par,
632         .fb_setcolreg   = atmel_lcdfb_setcolreg,
633         .fb_pan_display = atmel_lcdfb_pan_display,
634         .fb_fillrect    = cfb_fillrect,
635         .fb_copyarea    = cfb_copyarea,
636         .fb_imageblit   = cfb_imageblit,
637 };
638
639 static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)
640 {
641         struct fb_info *info = dev_id;
642         struct atmel_lcdfb_info *sinfo = info->par;
643         u32 status;
644
645         status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);
646         lcdc_writel(sinfo, ATMEL_LCDC_IDR, status);
647         return IRQ_HANDLED;
648 }
649
650 static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
651 {
652         struct fb_info *info = sinfo->info;
653         int ret = 0;
654
655         info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
656
657         dev_info(info->device,
658                "%luKiB frame buffer at %08lx (mapped at %p)\n",
659                (unsigned long)info->fix.smem_len / 1024,
660                (unsigned long)info->fix.smem_start,
661                info->screen_base);
662
663         /* Allocate colormap */
664         ret = fb_alloc_cmap(&info->cmap, 256, 0);
665         if (ret < 0)
666                 dev_err(info->device, "Alloc color map failed\n");
667
668         return ret;
669 }
670
671 static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
672 {
673         if (sinfo->bus_clk)
674                 clk_enable(sinfo->bus_clk);
675         clk_enable(sinfo->lcdc_clk);
676 }
677
678 static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
679 {
680         if (sinfo->bus_clk)
681                 clk_disable(sinfo->bus_clk);
682         clk_disable(sinfo->lcdc_clk);
683 }
684
685
686 static int __init atmel_lcdfb_probe(struct platform_device *pdev)
687 {
688         struct device *dev = &pdev->dev;
689         struct fb_info *info;
690         struct atmel_lcdfb_info *sinfo;
691         struct atmel_lcdfb_info *pdata_sinfo;
692         struct resource *regs = NULL;
693         struct resource *map = NULL;
694         int ret;
695
696         dev_dbg(dev, "%s BEGIN\n", __func__);
697
698         ret = -ENOMEM;
699         info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);
700         if (!info) {
701                 dev_err(dev, "cannot allocate memory\n");
702                 goto out;
703         }
704
705         sinfo = info->par;
706
707         if (dev->platform_data) {
708                 pdata_sinfo = (struct atmel_lcdfb_info *)dev->platform_data;
709                 sinfo->default_bpp = pdata_sinfo->default_bpp;
710                 sinfo->default_dmacon = pdata_sinfo->default_dmacon;
711                 sinfo->default_lcdcon2 = pdata_sinfo->default_lcdcon2;
712                 sinfo->default_monspecs = pdata_sinfo->default_monspecs;
713                 sinfo->atmel_lcdfb_power_control = pdata_sinfo->atmel_lcdfb_power_control;
714                 sinfo->guard_time = pdata_sinfo->guard_time;
715                 sinfo->lcdcon_is_backlight = pdata_sinfo->lcdcon_is_backlight;
716                 sinfo->lcd_wiring_mode = pdata_sinfo->lcd_wiring_mode;
717         } else {
718                 dev_err(dev, "cannot get default configuration\n");
719                 goto free_info;
720         }
721         sinfo->info = info;
722         sinfo->pdev = pdev;
723
724         strcpy(info->fix.id, sinfo->pdev->name);
725         info->flags = ATMEL_LCDFB_FBINFO_DEFAULT;
726         info->pseudo_palette = sinfo->pseudo_palette;
727         info->fbops = &atmel_lcdfb_ops;
728
729         memcpy(&info->monspecs, sinfo->default_monspecs, sizeof(info->monspecs));
730         info->fix = atmel_lcdfb_fix;
731
732         /* Enable LCDC Clocks */
733         if (cpu_is_at91sam9261() || cpu_is_at32ap7000()) {
734                 sinfo->bus_clk = clk_get(dev, "hck1");
735                 if (IS_ERR(sinfo->bus_clk)) {
736                         ret = PTR_ERR(sinfo->bus_clk);
737                         goto free_info;
738                 }
739         }
740         sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
741         if (IS_ERR(sinfo->lcdc_clk)) {
742                 ret = PTR_ERR(sinfo->lcdc_clk);
743                 goto put_bus_clk;
744         }
745         atmel_lcdfb_start_clock(sinfo);
746
747         ret = fb_find_mode(&info->var, info, NULL, info->monspecs.modedb,
748                         info->monspecs.modedb_len, info->monspecs.modedb,
749                         sinfo->default_bpp);
750         if (!ret) {
751                 dev_err(dev, "no suitable video mode found\n");
752                 goto stop_clk;
753         }
754
755
756         regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
757         if (!regs) {
758                 dev_err(dev, "resources unusable\n");
759                 ret = -ENXIO;
760                 goto stop_clk;
761         }
762
763         sinfo->irq_base = platform_get_irq(pdev, 0);
764         if (sinfo->irq_base < 0) {
765                 dev_err(dev, "unable to get irq\n");
766                 ret = sinfo->irq_base;
767                 goto stop_clk;
768         }
769
770         /* Initialize video memory */
771         map = platform_get_resource(pdev, IORESOURCE_MEM, 1);
772         if (map) {
773                 /* use a pre-allocated memory buffer */
774                 info->fix.smem_start = map->start;
775                 info->fix.smem_len = map->end - map->start + 1;
776                 if (!request_mem_region(info->fix.smem_start,
777                                         info->fix.smem_len, pdev->name)) {
778                         ret = -EBUSY;
779                         goto stop_clk;
780                 }
781
782                 info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
783                 if (!info->screen_base)
784                         goto release_intmem;
785
786                 /*
787                  * Don't clear the framebuffer -- someone may have set
788                  * up a splash image.
789                  */
790         } else {
791                 /* alocate memory buffer */
792                 ret = atmel_lcdfb_alloc_video_memory(sinfo);
793                 if (ret < 0) {
794                         dev_err(dev, "cannot allocate framebuffer: %d\n", ret);
795                         goto stop_clk;
796                 }
797         }
798
799         /* LCDC registers */
800         info->fix.mmio_start = regs->start;
801         info->fix.mmio_len = regs->end - regs->start + 1;
802
803         if (!request_mem_region(info->fix.mmio_start,
804                                 info->fix.mmio_len, pdev->name)) {
805                 ret = -EBUSY;
806                 goto free_fb;
807         }
808
809         sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
810         if (!sinfo->mmio) {
811                 dev_err(dev, "cannot map LCDC registers\n");
812                 goto release_mem;
813         }
814
815         /* Initialize PWM for contrast or backlight ("off") */
816         init_contrast(sinfo);
817
818         /* interrupt */
819         ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
820         if (ret) {
821                 dev_err(dev, "request_irq failed: %d\n", ret);
822                 goto unmap_mmio;
823         }
824
825         ret = atmel_lcdfb_init_fbinfo(sinfo);
826         if (ret < 0) {
827                 dev_err(dev, "init fbinfo failed: %d\n", ret);
828                 goto unregister_irqs;
829         }
830
831         /*
832          * This makes sure that our colour bitfield
833          * descriptors are correctly initialised.
834          */
835         atmel_lcdfb_check_var(&info->var, info);
836
837         ret = fb_set_var(info, &info->var);
838         if (ret) {
839                 dev_warn(dev, "unable to set display parameters\n");
840                 goto free_cmap;
841         }
842
843         dev_set_drvdata(dev, info);
844
845         /*
846          * Tell the world that we're ready to go
847          */
848         ret = register_framebuffer(info);
849         if (ret < 0) {
850                 dev_err(dev, "failed to register framebuffer device: %d\n", ret);
851                 goto free_cmap;
852         }
853
854         /* Power up the LCDC screen */
855         if (sinfo->atmel_lcdfb_power_control)
856                 sinfo->atmel_lcdfb_power_control(1);
857
858         dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %lu\n",
859                        info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
860
861         return 0;
862
863
864 free_cmap:
865         fb_dealloc_cmap(&info->cmap);
866 unregister_irqs:
867         free_irq(sinfo->irq_base, info);
868 unmap_mmio:
869         exit_backlight(sinfo);
870         iounmap(sinfo->mmio);
871 release_mem:
872         release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
873 free_fb:
874         if (map)
875                 iounmap(info->screen_base);
876         else
877                 atmel_lcdfb_free_video_memory(sinfo);
878
879 release_intmem:
880         if (map)
881                 release_mem_region(info->fix.smem_start, info->fix.smem_len);
882 stop_clk:
883         atmel_lcdfb_stop_clock(sinfo);
884         clk_put(sinfo->lcdc_clk);
885 put_bus_clk:
886         if (sinfo->bus_clk)
887                 clk_put(sinfo->bus_clk);
888 free_info:
889         framebuffer_release(info);
890 out:
891         dev_dbg(dev, "%s FAILED\n", __func__);
892         return ret;
893 }
894
895 static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
896 {
897         struct device *dev = &pdev->dev;
898         struct fb_info *info = dev_get_drvdata(dev);
899         struct atmel_lcdfb_info *sinfo = info->par;
900
901         if (!sinfo)
902                 return 0;
903
904         exit_backlight(sinfo);
905         if (sinfo->atmel_lcdfb_power_control)
906                 sinfo->atmel_lcdfb_power_control(0);
907         unregister_framebuffer(info);
908         atmel_lcdfb_stop_clock(sinfo);
909         clk_put(sinfo->lcdc_clk);
910         if (sinfo->bus_clk)
911                 clk_put(sinfo->bus_clk);
912         fb_dealloc_cmap(&info->cmap);
913         free_irq(sinfo->irq_base, info);
914         iounmap(sinfo->mmio);
915         release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
916         if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {
917                 iounmap(info->screen_base);
918                 release_mem_region(info->fix.smem_start, info->fix.smem_len);
919         } else {
920                 atmel_lcdfb_free_video_memory(sinfo);
921         }
922
923         dev_set_drvdata(dev, NULL);
924         framebuffer_release(info);
925
926         return 0;
927 }
928
929 #ifdef CONFIG_PM
930
931 static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg)
932 {
933         struct fb_info *info = platform_get_drvdata(pdev);
934         struct atmel_lcdfb_info *sinfo = info->par;
935
936         sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
937         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0);
938         if (sinfo->atmel_lcdfb_power_control)
939                 sinfo->atmel_lcdfb_power_control(0);
940         atmel_lcdfb_stop_clock(sinfo);
941         return 0;
942 }
943
944 static int atmel_lcdfb_resume(struct platform_device *pdev)
945 {
946         struct fb_info *info = platform_get_drvdata(pdev);
947         struct atmel_lcdfb_info *sinfo = info->par;
948
949         atmel_lcdfb_start_clock(sinfo);
950         if (sinfo->atmel_lcdfb_power_control)
951                 sinfo->atmel_lcdfb_power_control(1);
952         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon);
953         return 0;
954 }
955
956 #else
957 #define atmel_lcdfb_suspend     NULL
958 #define atmel_lcdfb_resume      NULL
959 #endif
960
961 static struct platform_driver atmel_lcdfb_driver = {
962         .remove         = __exit_p(atmel_lcdfb_remove),
963         .suspend        = atmel_lcdfb_suspend,
964         .resume         = atmel_lcdfb_resume,
965
966         .driver         = {
967                 .name   = "atmel_lcdfb",
968                 .owner  = THIS_MODULE,
969         },
970 };
971
972 static int __init atmel_lcdfb_init(void)
973 {
974         return platform_driver_probe(&atmel_lcdfb_driver, atmel_lcdfb_probe);
975 }
976
977 static void __exit atmel_lcdfb_exit(void)
978 {
979         platform_driver_unregister(&atmel_lcdfb_driver);
980 }
981
982 module_init(atmel_lcdfb_init);
983 module_exit(atmel_lcdfb_exit);
984
985 MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
986 MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
987 MODULE_LICENSE("GPL");